CN105977338B - Low-dark current PIN detector and its processing method - Google Patents
Low-dark current PIN detector and its processing method Download PDFInfo
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- CN105977338B CN105977338B CN201610562077.7A CN201610562077A CN105977338B CN 105977338 B CN105977338 B CN 105977338B CN 201610562077 A CN201610562077 A CN 201610562077A CN 105977338 B CN105977338 B CN 105977338B
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract
Present invention is disclosed a kind of low-dark current PIN detectors, including substrate, the upper surface growth of the substrate has p-type ohmic contact layer, at least one p-type Ohm contact electrode touched therewith is provided on the p-type ohmic contact layer, the substrate upper surface growth has the anti-reflection film of the specific thicknesses for different wave length, the upper surface of the substrate opens up that there are two the isolated grooves blocked for realizing device inside electric field and device edge, the isolated groove is located at the both sides of the p-type ohmic contact layer, barrier material is filled in the isolated groove, region of the upper surface of the substrate in addition to the shape slot is all covered with barrier layer, from top to bottom covering growth has N-type ohmic contact layer and N-type Ohm contact electrode successively for the lower face of the substrate.The present invention can effectively reduce the dark current of device inside, and using effect is excellent, have very high use and promotional value.
Description
Technical field
The present invention relates to a kind of photodetectors, and in particular to a kind of low-dark current PIN detector belongs to semiconductor optoelectronic
Devices field.
Background technology
PIN detector is as important " carrier " for realizing optical signal detection, with simple for process, detection efficient is high, performance
The advantages that stablizing plays weight in the application fields such as remotely monitored sensing, industry, military and national defense, medical treatment, aerospace, survey of deep space
Supporting role is wanted, is the commanding elevation that every country is seized.Such as in the high energy radial imaging such as safety check, medical treatment, PIN photodetections
Device coordinates with scintillator, and low light signals are converted to electric signal and export the process of imaging by realization.
The dark current of PIN detector can be divided into according to the relationship with device size：With the relevant line dark current of perimeter and
With the relevant face dark current of area, and the dark current compensation unrelated with size.Line dark current mainly determines by sidewall leakage stream,
Face dark current is then determined by factors such as the dissufion current of device inside, thermally stimulated current, generation-recombination currents.With integrated level
Raising, the size of photodetector constantly reducing, and integrated level is continuously improved, at the same reduce system power attenuation and at
This.But experimental data shows to be less than 1 mm when the device gross area2When, line dark current is 25 times of face dark current or more.
Specifically, the factors such as line dark current is mainly derived from sidewall leakage, and scribing process or side wall passivation are bad can
Improve the line dark current of device.Since PIN detector is generally operational under low bias even zero-bias, by its internal electric field
Major part is accounted in the caused online dark current of sidewall leakage.Again because of the deeper therefore traditional ion of the junction depth of PIN detector
Injection technology is difficult to be directly applied for the production and processing of PIN detector.
In conclusion how to design a kind of novel PIN detector, reduce the dark current of device from structure, simultaneously
Isolation and the relevant line dark current of electric field as much as possible, just becomes staff's urgent problem to be solved in the art.
Invention content
In view of the prior art, there are drawbacks described above, and the purpose of the present invention is to propose to a kind of low-dark current PIN detectors.
The purpose of the present invention will be achieved by the following technical programs：
A kind of low-dark current PIN detector can be used for infrared, visible light, the light in ultraviolet or THz wave segment limit
Detection, including substrate, the Grown have p-type ohmic contact layer, anti-reflection film are covered on the p-type ohmic contact layer,
At least one p-type Ohm contact electrode touched with the p-type ohmic contact layer is provided on the anti-reflection film, the substrate
Upper surface offers the isolated groove that a circle blocks for realizing device inside electric field and device edge, and the isolated groove is located at
The peripheral side of the p-type ohmic contact layer, the isolated groove is interior to be filled with barrier material, and the upper surface of the substrate is except described
Region outside shape slot is all covered with barrier layer, and the upper surface of the barrier layer is covered with anti-reflection film, the lower face of the substrate by
Covering growth has N-type ohmic contact layer and N-type Ohm contact electrode successively under.
Preferably, the material of the substrate is Si, GaAs, GaN, InP, Ge, SiC, SOI or GOI.
Preferably, at least one be used for the exposed electricity of p-type ohmic contact layer is offered on the anti-reflection film
Pole through-hole, the p-type Ohm contact electrode are touched by the electrode through-hole and the p-type ohmic contact layer.
Preferably, the p-type Ohm contact electrode is set to the two side ends position of p-type ohmic contact layer upper surface
It sets.
Preferably, the low-dark current PIN detector includes one being used for photosensitive active area, and the active area is located at described
Within p-type Ohm contact electrode.
Preferably, the plane where the isolated groove lower face is less than where p-type ohmic contact layer lower face
Plane.
Preferably, the material of the anti-reflection film is SiNxOr SiO2, the thickness of the anti-reflection film is 60 ~ 160nm.
Preferably, the material of the barrier material is SiO2, the material of the barrier layer is SiO2, the thickness of the barrier layer
Degree is 400 ~ 600nm.
Present invention further teaches a kind of processing methods being used to prepare above-mentioned low-dark current PIN detector, which is characterized in that
Include the following steps：
Step 1 needs the material to 2000 Ω of resistivity/cm or more substrates to select according to processing, and to the lining
Bottom carries out chemical cleaning, ensures the cleanliness factor of the substrate in order to avoid influencing late stage process, one is deposited in the upper surface of the substrate
The SiO of 400 ~ 600nm of layer2, photoetching then is carried out in the upper surface of the substrate, etches circle isolation in patterned area later
Groove, etching depth are 2 ~ 6 μm；
Step 2 carries out thermal oxidation to the upper surface of the substrate, and the upper surface of the substrate is made to form one layer of 20nm
Fine and close SiO2Layer then deposits one layer 2 ~ 6 μm of SiO in the upper surface of the substrate2, to ensure the isolated groove quilt
It is filled up completely, the upper surface of the substrate is chemically-mechanicapolish polished later, remove extra oxide；
Step 3 deposits the SiO of one layer of 400 ~ 600nm in the upper surface of the substrate2, then in the upper end of the substrate
Face carries out photoetching, and to the patterned area ion implanting B, so that the upper surface of the substrate is formed p-type ohmic contact layer, and protect
It is 1 × 10 to demonstrate,prove its doping concentration19 ~1×1020 cm-3；
Step 4 carries out the high temperature anneal to the substrate, the foreign ion activation that will be injected, annealing temperature 900
~ 1100 DEG C, annealing time is 30 ~ 60min；
Step 5 deposits the SiN or SiO of one layer of 60 ~ 160nm in the upper surface of the substrate2As anti-reflection film；
Step 6 carries out photoetching in the upper surface of the substrate and etches electrode through-hole on the anti-reflection film, then exists
The Al of top deposit 500nm ~ 2 μm of the electrode through-hole carries out photoetching to form p-type Ohm contact electrode, corroding electrode,
Expose and is used for photosensitive active area；
The substrate is buckled to by step 7, and the lower end of the substrate is made to face upward, and to its lower face ion implanting P, shape
At N-shaped ohmic contact layer, and ensure that its doping concentration is 1 × 1019 ~1×1020 cm-3, low temperature then is carried out to the substrate
Annealing；
Step 8, the Al for depositing one layer of 300nm ~ 2 μm again on the N-shaped ohmic contact layer form N-shaped Ohmic contact electricity
Pole, and then complete device fabrication.
Preferably, the deposit processing method includes magnetron sputtering or PECVD growths；The lithography method includes dry
Method etching technics or wet corrosion technique.
The present invention protrusion effect be：Compared with traditional PIN detector, detection wave-length coverage of the invention is wider, can be wide
It is general to be suitable for infrared, visible light, ultraviolet or terahertz wave band, and the present invention can be entered by structural modification to meet device front
Penetrate or the various ways such as back surface incident detection needs, applicability and practicability are stronger.Meanwhile the present invention can effectively avoid passing
The impurity defect and lattice damage that process intermediate ion injection of uniting introduces, reduce the dark current of device.In addition, in the present invention
Groove structure being isolated device edge and device active region, realize the blocking of device edge and active area electric field,
The diffusion for weakening few son, further reduces the dark current of device, improves the using effect of the present invention.
In conclusion the present invention can effectively reduce the dark current of device inside, using effect is excellent, has very high make
With and promotional value.
Just attached drawing in conjunction with the embodiments below, the embodiment of the present invention is described in further detail, so that of the invention
Technical solution is more readily understood, grasps.
Description of the drawings
Fig. 1 be the present invention schematic cross-section and zero-bias under field distribution schematic diagram；
Fig. 2 is the schematic diagram of step 1 in processing method of the present invention；
Fig. 3 is the schematic diagram of step 2 in processing method of the present invention；
Fig. 4 is the schematic diagram of step 3 in processing method of the present invention；
Fig. 5 is the schematic diagram of step 5 in processing method of the present invention；
Fig. 6 is the schematic diagram of step 6 in processing method of the present invention；
Fig. 7 is the schematic diagram of step 7 in processing method of the present invention；
Fig. 8 is the schematic diagram of step 8 in processing method of the present invention；
Wherein：101, substrate, 102, anti-reflection film, 103, p-type ohmic contact layer, 104, isolated groove, 105, N-shaped ohm connects
Contact layer, 106, p-type Ohm contact electrode, 107, N-shaped Ohm contact electrode, 108, barrier layer.
Specific implementation mode
Present invention is disclosed a kind of low-dark current PIN detectors.
As shown, a kind of low-dark current PIN detector, can be used for infrared, visible light, ultraviolet or THz wave segment limit
Interior light detection, including substrate 101, the growth of 101 upper surface of the substrate have p-type ohmic contact layer 103, described p-type ohm
It is covered with anti-reflection film 102 on contact layer 103, at least one and p-type ohmic contact layer is provided on the anti-reflection film 102
The upper surface of the 103 p-type Ohm contact electrodes 106 touched, the substrate 101 offers a circle for realizing device inside electric field
The isolated groove 104 blocked with device edge, the isolated groove 104 are located at the peripheral side of the p-type ohmic contact layer 103,
It is filled with barrier material in the isolated groove 104, the region of the upper surface of the substrate 101 in addition to the shape slot is all covered with
Barrier layer 108, the upper surface of the barrier layer 108 are covered with anti-reflection film 102, the lower face of the substrate 101 from top to bottom according to
Secondary covering growth has N-type ohmic contact layer 105 and N-type Ohm contact electrode 106.
The material of the substrate 101 is Si, GaAs, GaN, InP, Ge, SiC, SOI（Novel silicon base integrated circuit material）Or
GOI（Novel Ge base integrated circuit material）.In the present embodiment, the substrate 101 selects Si to be made.
At least one be used for 103 exposed electrode of the p-type ohmic contact layer is offered on the anti-reflection film 102
Through-hole, the p-type Ohm contact electrode 106 are touched by the electrode through-hole and the p-type ohmic contact layer 103.
The anti-reflection film 102 is located at described on the p-type ohmic contact layer 103 since there are effect differences for electrode
Anti-reflection film 102 can enhance the transmissivity of light, and the anti-reflection film 102 on the barrier layer 108 can play well
Passivation effect.
There are two p-type Ohm contact electrodes 106, the p-type Ohm contact electrode 106 to set for setting on the anti-reflection film 102
It is placed in the both side ends position of 103 upper surface of p-type ohmic contact layer.
The low-dark current PIN detector includes one being used for photosensitive active area, and the active area is located at two p-types
Between Ohm contact electrode 106.During the use of the present invention, probing light can be injected from the active area.
Plane where 104 lower face trench bottom of the isolated groove is less than 103 lower face institute of the p-type ohmic contact layer
Plane.
Specifically, in the present embodiment, i.e. the depth of the isolated groove 104 should be deeper than the p-type ohmic contact layer
103 thickness.Such structure setting be because the present invention in use, active area generate zero bias piezoelectric field in institute
State the lower face position of p-type ohmic contact layer 103（The boundary position of i.e. described p-type ohmic contact layer 103 and the substrate 101
Place）There are a wave crests.Device side can be further ensured that by making the depth of the isolated groove 104 be more than this boundary position
Edge is isolated with device active region internal electric field, so that it is guaranteed that the using effect of the present invention.
The material of the anti-reflection film 102 is SiNxOr SiO, the thickness of the anti-reflection film 102 is 60 ~ 160nm.
Specifically, due to the characteristic difference of material selected by the anti-reflection film 102 and the wave of required photosensitive light source
Long different, thickness also changes therewith, and in the present embodiment, the anti-reflection film 102 is selected thickness when SiN materials to be less than and selected
SiO2When thickness.More specifically for, in the present embodiment, the anti-reflection film 102 can select 70nm thickness SiN or
The SiO of 93nm thickness2, both different specifications are identical with the effect of material when in use.In addition it is also necessary to explanation,
The anti-reflection film 102 can not only increase the surface light transmission of device, the work that can also be played passivation interface, reduce tracking current
With.
The material of the barrier material is metal or SiO2, the material of the barrier layer 108 is metal or SiO2, the resistance
The thickness of interlayer 108 is 400 ~ 600nm.
In the present embodiment, the material of the barrier material is identical as the material of the barrier layer 108, and the two is both preferably
SiO2, the thickness of the barrier layer 108 is 500nm.
Present invention further teaches a kind of processing methods being used to prepare above-mentioned low-dark current PIN detector, including walk as follows
Suddenly：
Step 1 needs the material to 2000 Ω of resistivity/cm or more substrates 101 to select according to processing, and to institute
It states substrate 101 and carries out chemical cleaning, ensure the cleanliness factor of the substrate 101 in order to avoid late stage process is influenced, in the substrate 101
Upper surface deposits the SiO of one layer of 400 ~ 600nm2, thickness is 500nm in the present embodiment, then in the upper end of the substrate 101
Face carries out photoetching, etches a circle isolated groove 104 in patterned area later, etching depth is 2 ~ 6 μm, is etched in the present embodiment
Depth is 4 μm；
Step 2 carries out thermal oxidation to the upper surface of the substrate 101, and the upper surface of the substrate 101 is made to form one
The fine and close SiO of the thin about 20nm of layer2Layer, to improve the substrate（101）With the interfacial characteristics of filler, then in the substrate
101 upper surface deposits one layer 3.5 ~ 4.5 μm of SiO2, thickness is 4 μm in the present embodiment, and need to ensure herein is to be formed sediment
Long-pending SiO2Thickness it is identical as the etching depth in step 1, it is right later to ensure that the isolated groove 104 is completely filled
The upper surface of the substrate 101 is chemically-mechanicapolish polished, and extra oxide is removed；
Step 3 deposits the SiO of one layer of 400 ~ 600nm in the upper surface of the substrate 1012, in the present embodiment thickness be
500nm then carries out photoetching in the upper surface of the substrate 101, and to the patterned area ion implanting B, makes the substrate
101 upper surface forms p-type ohmic contact layer 103, and ensures that its doping concentration is 1 × 1019 ~1×1020 cm-3, in this reality
It is preferably 1 × 10 to apply doping concentration in example19 cm-3；
Step 4 carries out the high temperature anneal to the substrate 101, the foreign ion activation that will be injected, and annealing temperature is
900 ~ 1100 DEG C, annealing time is 30 ~ 60min, and annealing temperature in the present embodiment is 1100 DEG C, annealing time 30min；
Step 5 deposits the SiN or SiO of one layer of 60 ~ 160nm in the upper surface of the substrate 1012As anti-reflection film 102,
One layer of 70nm SiN or 93nmSiO can be deposited in the upper surface of the substrate 101 in the present embodiment2；
Step 6 carries out photoetching in the upper surface of the substrate 101 and etches two electrodes on the anti-reflection film 102
Through-hole then in the Al of the top of electrode through-hole deposit 500nm ~ 2 μm to form p-type Ohm contact electrode 106, and carries out
Photoetching, corroding electrode expose and are used for photosensitive active area, and the method that sputtering can be used in the present embodiment deposits 1.5 μm of Al
To form p-type Ohm contact electrode 106；
The substrate 101 is buckled to by step 7, and the lower end of the substrate 101 is made to face upward, and is noted to its lower face ion
Enter P, form N-shaped ohmic contact layer 105, and ensures that its doping concentration is 1 × 1019 ~1×1020 cm-3, mix in the present embodiment
Miscellaneous concentration is preferably 1 × 1020 cm-3, process annealing processing then is carried out to the substrate 101；
Step 8, the AL for depositing one layer of 300nm ~ 2 μm again on the N-shaped ohmic contact layer 105 form N-shaped Ohmic contact
Electrode 107, and then device fabrication is completed, the Al of method deposit 500nm of sputtering can be used in the present embodiment to form N-shaped Europe
Nurse contacts electrode 107.
The deposit processing method includes magnetron sputtering or PECVD（Plasma enhanced chemical vapor deposition method）Growth；
The lithography method includes dry etch process or wet corrosion technique.
It should also be noted that, the isolated groove 104 in the present invention is filled, low pressure chemical phase shallow lake both may be used
Long-pending method is formed, and various Oxide chemical vapor deposition apparatus can also be utilized to complete.In addition, the material selection in the present invention
And coating layer thickness is that inventor proves the optimal case obtained by test of many times, such as uses other materials or coating layer thickness,
Technical scheme of the present invention, which may be directly resulted in, can not realize the effect for reducing device dark current.
The principle that the present invention can reduce dark current is, avoids the impurity defect that ion implanting introduces at groove（This
It is since in conventional processes, implantation annealing is insufficient, the impurity being easy to cause after injection cannot be miscellaneous by clearance-type
Matter is converted to instead type impurity）And lattice damage, and then reduce device dark current.In addition, device edge is drawn due to scribing process
The defect or damage that rise can all increase the dark current of device；Electric field region is diffused into additionally, due to few son, in the effect of electric field
Under be collected, this process also will produce dark current, and the groove structure of the present invention can be by device edge and active area isolation
It opens, realizes the blocking of device edge and active area electric field, weaken the diffusion of few son, to reduce the dark current of device.
Compared with traditional PIN detector, detection wave-length coverage of the invention is wider, be widely portable to infrared, visible light,
Ultraviolet or terahertz wave band, and the present invention can meet a variety of sides such as the incidence of device front or back surface incident by structural modification
The needs of formula detection, applicability and practicability are stronger.Meanwhile the present invention can effectively avoid conventional processes intermediate ion from injecting
The impurity defect and lattice damage of introducing, reduce the dark current of device.In addition, the groove structure in the present invention can be by device
Edge is isolated with device active region, realizes the blocking of device edge and active area electric field, further reduces the dark of device
Electric current improves the using effect of the present invention.
In conclusion the present invention can effectively reduce the dark current of device inside, using effect is excellent, has very high make
With and promotional value.
Still there are many embodiment, all technical sides formed using equivalents or equivalent transformation by the present invention
Case is within the scope of the present invention.
Claims (10)
1. a kind of low-dark current PIN detector, it can be used for infrared, visible light, the light in ultraviolet or THz wave segment limit is visited
It surveys, it is characterised in that：Including substrate（101）, the substrate（101）Upper growth has p-type ohmic contact layer（103）, the p-type Europe
Nurse contact layer（103）On be covered with anti-reflection film（102）, the anti-reflection film（102）On be provided with it is at least one with described p-type ohm
Contact layer（103）The p-type Ohm contact electrode touched（106）, the substrate（101）Upper surface offer a circle for realizing
The isolated groove that device inside electric field is blocked with device edge（104）, the isolated groove（104）It is connect positioned at described p-type ohm
Contact layer（103）Peripheral side, the isolated groove（104）It is interior to be filled with barrier material, the substrate（101）Upper surface remove shape
Region outside slot is all covered with barrier layer（108）, the barrier layer（108）Upper surface be covered with anti-reflection film（102）, the lining
Bottom（101）Lower face from top to bottom successively covering growth have N-type ohmic contact layer（105）And N-type Ohm contact electrode
（106）.
2. low-dark current PIN detector according to claim 1, it is characterised in that：The substrate（101）Material be
Si, GaAs, GaN, InP, Ge, SiC, SOI or GOI.
3. low-dark current PIN detector according to claim 1, it is characterised in that：The anti-reflection film（102）On offer
It is at least one to be used for the p-type ohmic contact layer（103）Exposed electrode through-hole, the p-type Ohm contact electrode
（106）By the electrode through-hole and the p-type ohmic contact layer（103）It touches.
4. low-dark current PIN detector according to claim 1, it is characterised in that：The p-type Ohm contact electrode
（106）It is set to the p-type ohmic contact layer（103）The both side ends position of upper surface.
5. low-dark current PIN detector according to claim 4, it is characterised in that：The low-dark current PIN detector packet
One is included for photosensitive active area, the active area is located at the p-type Ohm contact electrode（106）Within.
6. low-dark current PIN detector according to claim 1, it is characterised in that：The isolated groove（104）Lower face
The plane at place is less than the p-type ohmic contact layer（103）Plane where lower face.
7. low-dark current PIN detector according to claim 1, it is characterised in that：The anti-reflection film（102）Material be
SiNxOr SiO2, the anti-reflection film（102）Thickness be 60 ~ 160nm.
8. low-dark current PIN detector according to claim 1, it is characterised in that：The material of the barrier material is
SiO2, the barrier layer（108）Material be SiO2, the barrier layer（108）Thickness be 400 ~ 600nm.
9. the processing method that one kind being used to prepare the low-dark current PIN detector as described in claim 1 ~ 8 is any, feature exist
In including the following steps：
Step 1 is needed according to processing to 2000 Ω of resistivity/cm or more substrates（101）Material selected, and to described
Substrate（101）Chemical cleaning is carried out, ensures the substrate（101）Cleanliness factor in case influence late stage process, in the substrate
（101）Upper surface deposit one layer of 400 ~ 600nm SiO2, then in the substrate（101）Upper surface carry out photoetching, later
A circle isolated groove is etched in patterned area（104）, etching depth is 2 ~ 6 μm；
Step 2, to the substrate（101）Upper surface carry out thermal oxidation, make the substrate（101）Upper surface formed one
The fine and close SiO of layer 20nm2Layer, then in the substrate（101）Upper surface deposit one layer 2 ~ 6 μm of SiO2, described in guarantee
Isolated groove（104）It is completely filled, later to the substrate（101）Upper surface chemically-mechanicapolish polished, removal it is extra
Oxide；
Step 3, in the substrate（101）Upper surface deposit one layer of 400 ~ 600nm SiO2, then in the substrate（101）'s
Upper surface carries out photoetching, and to the patterned area ion implanting B, makes the substrate（101）Upper surface formed p-type ohm connect
Contact layer（103）, and ensure that its doping concentration is 1 × 1019 ~1×1020 cm-3；
Step 4, to the substrate（101）The high temperature anneal is carried out, the foreign ion that will be injected activates, and annealing temperature is
900 ~ 1100 DEG C, annealing time is 30 ~ 60min；
Step 5, in the substrate（101）Upper surface deposit one layer of 60 ~ 160nm SiN or SiO2As anti-reflection film（102）；
Step 6, in the substrate（101）Upper surface carry out photoetching and in the anti-reflection film（102）On etch electrode through-hole,
Then the Al of 500nm ~ 2 μm is deposited to form p-type Ohm contact electrode in the top of the electrode through-hole（106）, and carry out light
It carves, corroding electrode, exposes and be used for photosensitive active area；
Step 7, by the substrate（101）Back-off, makes the substrate（101）Lower end face upward, and to its lower face ion note
Enter P, forms N-shaped ohmic contact layer（105）, and ensure that its doping concentration is 1 × 1019 ~1×1020 cm-3, then to the lining
Bottom（101）Carry out process annealing processing；
Step 8, in the N-shaped ohmic contact layer（105）On deposit the Al of one layer of 300nm ~ 2 μm again, form N-shaped Ohmic contact electricity
Pole（107）, and then complete device fabrication.
10. the processing method of low-dark current PIN detector according to claim 9, it is characterised in that：The deposit processing
Method includes magnetron sputtering or PECVD growths；The lithography method includes dry etch process or wet corrosion technique.
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| CN111933739A (en) * | 2020-07-10 | 2020-11-13 | 中国电子科技集团公司第十三研究所 | Back incidence silicon photoelectric detector based on one-dimensional grating and preparation method |
| CN113644165B (en) * | 2021-08-11 | 2023-12-08 | 全磊光电股份有限公司 | Low dark current high sensitivity photoelectric detector structure and manufacturing method thereof |
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| CN103646985A (en) * | 2013-12-26 | 2014-03-19 | 中国电子科技集团公司第四十四研究所 | PIN photoelectric detector with responsivity space variable and manufacturing method thereof |
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