CN105917583B - 用于通过约束电压降来确定受电源门控的区段的大小的方法和设备 - Google Patents

用于通过约束电压降来确定受电源门控的区段的大小的方法和设备 Download PDF

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Publication number
CN105917583B
CN105917583B CN201580004789.0A CN201580004789A CN105917583B CN 105917583 B CN105917583 B CN 105917583B CN 201580004789 A CN201580004789 A CN 201580004789A CN 105917583 B CN105917583 B CN 105917583B
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China
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circuit
power
switch
segments
capacitance
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Expired - Fee Related
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CN201580004789.0A
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Chinese (zh)
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CN105917583A (zh
Inventor
R·M·库茨
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Qualcomm Inc
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Qualcomm Inc
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • H03K19/0016Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0084Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00Arrangements for measuring electric power or power factor
    • G01R21/006Measuring power factor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605Measuring capacitance
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B13/00Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion
    • G05B13/02Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
    • G05B13/0205Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric not using a model or a simulator of the controlled system
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00315Modifications for increasing the reliability for protection in field-effect transistor circuits

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Automation & Control Theory (AREA)
  • Medical Informatics (AREA)
  • Evolutionary Computation (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Artificial Intelligence (AREA)
  • Software Systems (AREA)
  • Logic Circuits (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Pulse Circuits (AREA)
  • Dc-Dc Converters (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN201580004789.0A 2014-01-16 2015-01-16 用于通过约束电压降来确定受电源门控的区段的大小的方法和设备 Expired - Fee Related CN105917583B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/157,503 US9367054B2 (en) 2014-01-16 2014-01-16 Sizing power-gated sections by constraining voltage droop
US14/157,503 2014-01-16
PCT/US2015/011762 WO2015109188A1 (en) 2014-01-16 2015-01-16 Sizing power-gated sections by constraining voltage droop

Publications (2)

Publication Number Publication Date
CN105917583A CN105917583A (zh) 2016-08-31
CN105917583B true CN105917583B (zh) 2021-05-07

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CN201580004789.0A Expired - Fee Related CN105917583B (zh) 2014-01-16 2015-01-16 用于通过约束电压降来确定受电源门控的区段的大小的方法和设备

Country Status (7)

Country Link
US (1) US9367054B2 (enExample)
EP (1) EP3095193A1 (enExample)
JP (1) JP6556736B2 (enExample)
KR (1) KR102219822B1 (enExample)
CN (1) CN105917583B (enExample)
BR (1) BR112016016431A2 (enExample)
WO (1) WO2015109188A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102184740B1 (ko) * 2014-06-16 2020-11-30 에스케이하이닉스 주식회사 전자 장치 및 그를 포함하는 전자 시스템
US9438244B2 (en) * 2014-10-28 2016-09-06 Xilinx, Inc. Circuits for and methods of controlling power within an integrated circuit
US10152112B2 (en) * 2015-06-10 2018-12-11 Sonics, Inc. Power manager with a power switch arbitrator
US10928886B2 (en) * 2019-02-25 2021-02-23 Intel Corporation Frequency overshoot and voltage droop mitigation apparatus and method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101689837A (zh) * 2007-06-29 2010-03-31 高通股份有限公司 具有可配置的dc耦合或ac耦合输出的放大器
EP2369509A1 (en) * 2010-03-01 2011-09-28 Nxp B.V. Method of generating an integrated circuit layout and integrated circuit
US20130099570A1 (en) * 2010-04-30 2013-04-25 Rajit Manohar Systems and methods for zero-delay wakeup for power gated asynchronous pipelines
CN103262419A (zh) * 2010-07-19 2013-08-21 美国国家半导体公司 具有分段粗糙控制和精细控制的自适应信号均衡器

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2797761B2 (ja) * 1991-07-11 1998-09-17 日本電気株式会社 パワーオン回路
JP2002501654A (ja) 1997-05-30 2002-01-15 ミクロン テクノロジー,インコーポレイテッド 256Megダイナミックランダムアクセスメモリ
KR100780750B1 (ko) 2006-05-11 2007-11-30 한국과학기술원 표준 셀과 파워 게이팅 셀을 이용한 파워 네트워크 및 이를가지는 반도체 장치
JP2008065732A (ja) 2006-09-11 2008-03-21 Nec Electronics Corp 半導体集積回路の設計方法及び設計システム
US20080120514A1 (en) * 2006-11-10 2008-05-22 Yehea Ismail Thermal management of on-chip caches through power density minimization
US7868479B2 (en) * 2007-06-27 2011-01-11 Qualcomm Incorporated Power gating for multimedia processing power management
JP5326628B2 (ja) * 2008-03-03 2013-10-30 富士通株式会社 電子回路装置
WO2009144658A1 (en) 2008-05-27 2009-12-03 Nxp B.V. Power switch design method and program
US8266569B2 (en) 2010-03-05 2012-09-11 Advanced Micro Devices, Inc. Identification of critical enables using MEA and WAA metrics
JP2011199094A (ja) * 2010-03-23 2011-10-06 Renesas Electronics Corp 半導体集積回路及び半導体集積回路の電源スイッチ制御方法
US9104395B2 (en) * 2012-05-02 2015-08-11 Semiconductor Energy Laboratory Co., Ltd. Processor and driving method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101689837A (zh) * 2007-06-29 2010-03-31 高通股份有限公司 具有可配置的dc耦合或ac耦合输出的放大器
EP2369509A1 (en) * 2010-03-01 2011-09-28 Nxp B.V. Method of generating an integrated circuit layout and integrated circuit
US20130099570A1 (en) * 2010-04-30 2013-04-25 Rajit Manohar Systems and methods for zero-delay wakeup for power gated asynchronous pipelines
CN103262419A (zh) * 2010-07-19 2013-08-21 美国国家半导体公司 具有分段粗糙控制和精细控制的自适应信号均衡器

Also Published As

Publication number Publication date
KR20160108433A (ko) 2016-09-19
JP2017509202A (ja) 2017-03-30
US20150198933A1 (en) 2015-07-16
CN105917583A (zh) 2016-08-31
JP6556736B2 (ja) 2019-08-07
EP3095193A1 (en) 2016-11-23
KR102219822B1 (ko) 2021-02-23
BR112016016431A2 (pt) 2017-08-08
WO2015109188A1 (en) 2015-07-23
US9367054B2 (en) 2016-06-14

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