CN105874588B - 具有氮化钛栅极的高k/金属栅极cmos晶体管 - Google Patents

具有氮化钛栅极的高k/金属栅极cmos晶体管 Download PDF

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CN105874588B
CN105874588B CN201480071998.2A CN201480071998A CN105874588B CN 105874588 B CN105874588 B CN 105874588B CN 201480071998 A CN201480071998 A CN 201480071998A CN 105874588 B CN105874588 B CN 105874588B
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dielectric
transistor
pmos
nmos
gate
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CN105874588A (zh
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H·尼米
B·K·柯克帕特里克
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Texas Instruments Inc
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Texas Instruments Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0179—Manufacturing their gate conductors the gate conductors having different shapes or dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/262—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by physical means only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/66—Wet etching of conductive or resistive materials
    • H10P50/663—Wet etching of conductive or resistive materials by chemical means only
    • H10P50/667—Wet etching of conductive or resistive materials by chemical means only by liquid etching only

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Composite Materials (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
CN201480071998.2A 2013-12-31 2014-12-31 具有氮化钛栅极的高k/金属栅极cmos晶体管 Active CN105874588B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361922498P 2013-12-31 2013-12-31
US61/922,498 2013-12-31
US14/567,507 2014-12-11
US14/567,507 US9070785B1 (en) 2013-12-31 2014-12-11 High-k / metal gate CMOS transistors with TiN gates
PCT/US2014/073032 WO2015103412A1 (en) 2013-12-31 2014-12-31 High-k/metal gate cmos transistors with tin gates

Publications (2)

Publication Number Publication Date
CN105874588A CN105874588A (zh) 2016-08-17
CN105874588B true CN105874588B (zh) 2019-05-14

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Country Link
US (2) US9070785B1 (https=)
EP (1) EP3090445B1 (https=)
JP (1) JP6709732B2 (https=)
CN (1) CN105874588B (https=)
WO (1) WO2015103412A1 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9070785B1 (en) * 2013-12-31 2015-06-30 Texas Instruments Incorporated High-k / metal gate CMOS transistors with TiN gates
US9466492B2 (en) * 2014-05-02 2016-10-11 International Business Machines Corporation Method of lateral oxidation of NFET and PFET high-K gate stacks
US9859392B2 (en) 2015-09-21 2018-01-02 Samsung Electronics Co., Ltd. Integrated circuit device and method of manufacturing the same
US9941377B2 (en) * 2015-12-29 2018-04-10 Qualcomm Incorporated Semiconductor devices with wider field gates for reduced gate resistance
US9859129B2 (en) * 2016-02-26 2018-01-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method of the same
CN107887335B (zh) * 2017-11-14 2020-08-21 上海华力微电子有限公司 一种金属栅极制作方法
KR102403723B1 (ko) 2017-12-15 2022-05-31 삼성전자주식회사 반도체 장치 및 그의 제조 방법
KR102418061B1 (ko) * 2018-01-09 2022-07-06 삼성전자주식회사 반도체 장치
JP7267437B2 (ja) * 2020-04-22 2023-05-01 長江存儲科技有限責任公司 可変キャパシタ
US12362183B2 (en) * 2022-01-27 2025-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method for fabricating the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101925987A (zh) * 2008-01-21 2010-12-22 德克萨斯仪器股份有限公司 用于形成应变沟道pmos器件的方法以及由该方法形成的集成电路
CN102282655A (zh) * 2009-01-05 2011-12-14 国际商业机器公司 形成栅极叠层及其结构的方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100476926B1 (ko) * 2002-07-02 2005-03-17 삼성전자주식회사 반도체 소자의 듀얼 게이트 형성방법
JP4854245B2 (ja) * 2005-09-22 2012-01-18 東京エレクトロン株式会社 半導体装置の製造方法
US7790592B2 (en) * 2007-10-30 2010-09-07 International Business Machines Corporation Method to fabricate metal gate high-k devices
JP2009267180A (ja) * 2008-04-28 2009-11-12 Renesas Technology Corp 半導体装置
JP4602440B2 (ja) * 2008-06-12 2010-12-22 パナソニック株式会社 半導体装置及びその製造方法
JP2010021200A (ja) * 2008-07-08 2010-01-28 Renesas Technology Corp 半導体装置の製造方法
US9024299B2 (en) * 2008-10-14 2015-05-05 Imec Method for fabricating a dual work function semiconductor device and the device made thereof
US8643113B2 (en) * 2008-11-21 2014-02-04 Texas Instruments Incorporated Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layer
KR20120103676A (ko) * 2009-12-04 2012-09-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
JP2012099517A (ja) * 2010-10-29 2012-05-24 Sony Corp 半導体装置及び半導体装置の製造方法
US9384962B2 (en) * 2011-04-07 2016-07-05 United Microelectronics Corp. Oxygen treatment of replacement work-function metals in CMOS transistor gates
CN102915917B (zh) * 2011-08-03 2015-02-11 中国科学院微电子研究所 一种互补型金属氧化物半导体场效应晶体管的制备方法
US20130082332A1 (en) * 2011-09-30 2013-04-04 Globalfoundries Singapore Pte. Ltd. Method for forming n-type and p-type metal-oxide-semiconductor gates separately
US20130302974A1 (en) * 2012-05-08 2013-11-14 Globalfoundries Inc. Replacement gate electrode fill at reduced temperatures
US8921178B2 (en) * 2012-05-16 2014-12-30 Renesas Electronics Corporation Semiconductor devices with self-aligned source drain contacts and methods for making the same
US9070785B1 (en) * 2013-12-31 2015-06-30 Texas Instruments Incorporated High-k / metal gate CMOS transistors with TiN gates

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101925987A (zh) * 2008-01-21 2010-12-22 德克萨斯仪器股份有限公司 用于形成应变沟道pmos器件的方法以及由该方法形成的集成电路
CN102282655A (zh) * 2009-01-05 2011-12-14 国际商业机器公司 形成栅极叠层及其结构的方法

Also Published As

Publication number Publication date
EP3090445A1 (en) 2016-11-09
US9721847B2 (en) 2017-08-01
WO2015103412A1 (en) 2015-07-09
US9070785B1 (en) 2015-06-30
JP6709732B2 (ja) 2020-06-17
US20150287643A1 (en) 2015-10-08
CN105874588A (zh) 2016-08-17
US20150187653A1 (en) 2015-07-02
JP2017504205A (ja) 2017-02-02
EP3090445B1 (en) 2026-01-21
EP3090445A4 (en) 2017-08-23

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