CN105870059A - 薄膜晶体管、阵列基板及相关制作方法和显示面板 - Google Patents

薄膜晶体管、阵列基板及相关制作方法和显示面板 Download PDF

Info

Publication number
CN105870059A
CN105870059A CN201610473904.5A CN201610473904A CN105870059A CN 105870059 A CN105870059 A CN 105870059A CN 201610473904 A CN201610473904 A CN 201610473904A CN 105870059 A CN105870059 A CN 105870059A
Authority
CN
China
Prior art keywords
active layer
film transistor
thin film
tft
manufacture method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610473904.5A
Other languages
English (en)
Inventor
杨维
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201610473904.5A priority Critical patent/CN105870059A/zh
Publication of CN105870059A publication Critical patent/CN105870059A/zh
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal (AREA)

Abstract

本发明提供一种阵列基板GOA区域的薄膜晶体管的制作方法,其特征在于,包括:形成所述薄膜晶体管的有源层;对所述有源层进行处理,提高所述有源层的载流子迁移率。本发明通过对GOA区域的薄膜晶体管的有源层的载流子迁移率进行提高,以降低GOA区域的薄膜晶体管对有源层尺寸的要求,即在制作过程中,可以形成更小面积的有源层,进而降低了薄膜晶体管的整体体积,使GOA区域占用阵列基板的边框区域的面积也得减小,利于显示装置向窄边框趋势发展。

Description

薄膜晶体管、阵列基板及相关制作方法和显示面板
技术领域
本发明涉及显示技术领域,特别是涉及一种薄膜晶体管、阵列基板及相关制作方法和显示面板。
背景技术
GOA技术是一种将栅极驱动电路(Gate Driver IC)集成在阵列(Array)基板上的技术,具有以下优点:(1)将栅极驱动电路集成在阵列基板上,能有效降低生产成本和功耗;(2)省去绑定(bonding)良率工艺,能使产品良率和产能得到提升;(3)省去栅极驱动电路绑定(gate IC bonding)区域,使显示面板(panel)具有对称结构。
但是,现有的GOA区域是位于显示区域外侧,即GOA区域占据着阵列基板一部分边框区域,显然边框区域需要排布走线,GOA区域会影响边框区域的尺寸。
而在目前薄膜晶体管中,有源层的尺寸越大,才能保证载流子迁移率越高。为使薄膜晶体管的有源层具有较高的载流子迁移率,现有的有源层需要被制成较大的面积,这导致了薄膜晶体管的整体体积过大。特别是GOA区域内的薄膜晶体管,其体积越大则GOA区域越大,进而占用了阵列基板更多的边框区域。
显然现有的GOA技术不利于显示装置向窄边框趋势进行发展。
发明内容
本发明的目的是减小GOA区域的薄膜晶体管的体积,使得GOA区域的占用面积得到有效缩减。
为实现上述目的,一方面,本发明提供一种阵列基板GOA区域的薄膜晶体管的制作方法,包括:
形成所述薄膜晶体管的有源层;
对所述有源层进行处理,提高所述有源层的载流子迁移率。
可选地,所述有源层为透明的金属氧化物形成。
可选地,上述金属氧化物包括:铟镓锌氧化物、氧化铟锌、氮氧化锌中的一种或多种。
可选地,所述对所述有源层进行处理包括:
对所述有源层进行等离子体轰击;或
对所述有源层进行离子注入。
可选地,若进行等离子体轰击,则轰击的等离子体为N2O、N2、NF中的任一种;若进行离子注入,则注入的离子为锡离子或铟离子。
另一方面,本发明还提供一种阵列基板的制作方法,包括:
通过一次构图工艺形成显示区域的第一薄膜晶体管的有源层和GOA区域的第二薄膜晶体管的有源层;
对所述第二薄膜晶体管的有源层进行处理,提高所述第二薄膜晶体管的有源层的载流子迁移率。
可选地,所述第二薄膜晶体管的有源层的面积小于所述第一薄膜晶体管的有源层的面积。
可选地,所述第一薄膜晶体管的有源层和所述第二薄膜晶体管的有源层采用相同的材料制成。
可选地,所述第一薄膜晶体管的有源层和所述第二薄膜晶体管的有源层的材料为铟镓锌氧化物、氧化铟锌、氮氧化锌中的一种或多种。
可选地,所述对所述第二薄膜晶体管的有源层进行处理包括:
对所述第二薄膜晶体管的有源层进行等离子体处理;或
对所述第二薄膜晶体管的有源层进行离子注入。
可选地,若进行等离子体轰击,则轰击的等离子体为N2O、N2、NF中的任一种;若进行离子注入,则注入的离子为锡离子或铟离子。
此外,本发明还提供一种阵列基板GOA区域的薄膜晶体管,该薄膜晶体管由上述薄膜晶体管的制作方法得到。
此外,本发明还提供一种阵列基板,该阵列基板由上述的阵列基板的制作方法得到。
此外,本发明还提供一种显示面板,包括上述阵列基板和彩膜基板,所述彩膜基板形成有黑矩阵,所述黑矩阵在阵列基板中的衬底基板上的投影覆盖所述有源层在所述衬底基板上的投影。
本发明的上述方案具有如下有益效果:
本发明通过对GOA区域的薄膜晶体管的有源层的载流子迁移率进行提高,以降低GOA区域的薄膜晶体管对有源层尺寸的要求,即在制作过程中,可以形成更小面积的有源层,进而降低了薄膜晶体管的整体体积,使GOA区域占用阵列基板的边框区域的面积也得减小,利于显示装置向窄边框趋势发展。
附图说明
图1为本发明的阵列基板GOA区域的薄膜晶体管的制作方法的示意图;
图2为本发明的阵列基板的制作方法的示意图;
图3A-图3E为本发明的阵列基板的制作方法在具体应用中的流程示意图;
图4为本发明的显示装置的结构示意图。
具体实施方式
为使本发明要解决的技术问题、技术方案和优点更加清楚,下面将结合附图及具体实施例进行详细描述。
针对现有技术中,GOA区域占用了阵列基板较大面积的边框区域的问题,本发明提供一种解决方案。
一方面,本发明的实施例提供一种阵列基板GOA区域的薄膜晶体管的制作方法,如图1所示,包括:
步骤S11,形成薄膜晶体管的有源层;
步骤S12,对有源层进行处理,提高所述有源层的载流子迁移率。
本实施例的制作方法通过对GOA区域的薄膜晶体管的有源层的载流子迁移率进行提高,以降低GOA区域的薄膜晶体管对有源层尺寸的要求,即在制作过程中,可以形成更小面积的有源层,进而降低了薄膜晶体管的整体体积,使GOA区域占用阵列基板的边框区域的面积也得减小,利于显示装置向窄边框趋势发展。
在实际应用中,本实施例的有源层可以由铟镓锌氧化物、氧化铟锌、氮氧化锌中的一种或多种材料制成。
针对上述材料,本实施例可以采用离子注入工艺,以提高有源层的载流子迁移率。其中,注入的离子为锡离子或铟离子等能够提高有源层载流子迁移率的离子。
当然,作为其他可行方案,本实施例还可以对有源层进行等离子体轰击,以提高有源层的载流子迁移率,其中轰击所用的等离子体可以是N2O、N2、NF中的任一种。
对应地,本发明还提供一种由上述制作方法得到的阵列基板GOA区域的薄膜晶体管,基于本发明的制作方法,该GOA区域的薄膜晶体管的有源层不仅具有较高的载流子迁移率,且尺寸得到减小,进而使薄膜晶体管的整体体积得到减小,使GOA区域占据更小的阵列基板的边框空间。
另一方面,本发明还提供一种阵列基板的制作方法,如图2所示,包括:
步骤S21,通过一次构图工艺形成显示区域的第一薄膜晶体管的有源层和GOA区域的第二薄膜晶体管的有源层;
步骤S22,对第二薄膜晶体管的有源层进行处理,提高第二薄膜晶体管的有源层的载流子迁移率。
通过上述描述可以知道,现有技术中薄膜晶体管的有源层一般采用透明的金属氧化材料制成(如铟镓锌氧化物、氧化铟锌、氮氧化锌中的一种或多种),由于该金属氧化材料本身特性的一些问题,载流子迁移率越高,则对光照的稳定性越差(受到光照后会影响薄膜晶体管的阈值电压)。为此,针对目前有源层的特性,本实施例的制作方法只对GOA区域的薄膜晶体管的有源层进行处理,以提高其载流子迁移率,使得GOA区域的占用阵列基板的边框面积得到减小。而显示区域的薄膜晶体管的有源层则不进行处理,是为了让其对光照具有更高的稳定性,使显示区域的薄膜晶体管的阈值电压维持在正常范围,避免影响到画面的显示。
下面结合一个实际应用,对本实施例的阵列基板制作流程进行介绍。
以底栅型结构为例(本实施例的技术同样适用于顶栅结构,本文不在举例赘述),作为示例性介绍,本实施例的阵列基板的制作流程包括:
步骤S31,参考图3A,通过一次构图工艺,在衬底基板1上形成显示区域的薄膜晶体管的栅极21,以及GOA区域的薄膜晶体管的栅极22;其中,在本实际应用中,示例性将衬底基板1左半边区域作为显示区域,右半边作为GOA区域;
步骤S32,参考图3B,沉积栅绝缘层3;
步骤S33,参考图3C,通过一次构图工艺,在衬底基板上形成显示区域的薄膜晶体管的有源层41,以及GOA区域的薄膜晶体管的有源层42;其中,有源层41和有源层42可以由同一种半导体材料层刻蚀得到;
这里需要给予说明的是,由于后续有源层42还需要进行提高载流子迁移率的处理,因此其制作后的尺寸要小于显示区域的薄膜晶体管的有源层41的尺寸;
步骤S34,参考图3D,通过掩膜板5,仅对GOA区域上的有源层42进行离子注入或等离子轰击,提高该有源层42的载流子迁移率;
步骤S35,参考图3E,形成显示区域的薄膜晶体管以及GOA区域薄膜晶体管的其他图层(如源极和漏极),显然,从图3E可以看出,GOA区域上的薄膜晶体管的体积B要小于显示区域的薄膜晶体管的体积A。
对应地,本发明还提供一种由上述阵列基板得制作方法所得到的阵列基板。显然,阵列基板具有较小的边框区域,因此特别适用于制作窄边框的显示装置。
此外,如图4所示,本发明还提供一种显示面板,包括有彩膜基板CF和本发明上述的阵列基板Array。其中,彩膜基板CF上形成有正对阵列基板Array上的GOA区域的黑矩阵BM,即该黑矩阵BM在阵列基板Array中的衬底基板1上的投影T1覆盖黑矩阵BM在该衬底基板1上的投影T2。
显然,通过上述描述可以知道,本实施例阵列基板GOA区域的薄膜晶体管的有源层42经过处理后,具有很高的载流子迁移率,由于材料特性,该有源层42也同样具有较差的光照稳定性。有鉴于此,本实施例中,在彩膜基板上设置了能够对有源层42起到遮光作用的黑矩阵,避免该有源层42受到光照后影响到薄膜晶体管的阈值电压,使显示装置能够更稳定输出显示画面。
以上所述是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明所述原理的前提下,还可以作出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。

Claims (13)

1.一种阵列基板GOA区域的薄膜晶体管的制作方法,其特征在于,包括:
形成所述薄膜晶体管的有源层;
对所述有源层进行处理,提高所述有源层的载流子迁移率。
2.根据权利要求1所述的制作方法,其特征在于,
所述有源层为透明的金属氧化物形成。
3.根据权利要求2所述的制作方法,其特征在于,
所述金属氧化物包括:铟镓锌氧化物、氧化铟锌、氮氧化锌中的一种或多种。
4.根据权利要求3所述的制作方法,其特征在于,所述对所述有源层进行处理包括:
对所述有源层进行等离子体轰击;或
对所述有源层进行离子注入。
5.根据权利要求4所述的制作方法,其特征在于,
若进行等离子体轰击,则轰击的等离子体为N2O、N2、NF中的任一种;
若进行离子注入,则注入的离子为锡离子或铟离子。
6.一种阵列基板的制作方法,其特征在于,包括:
通过一次构图工艺形成显示区域的第一薄膜晶体管的有源层和GOA区域的第二薄膜晶体管的有源层;
对所述第二薄膜晶体管的有源层进行处理,提高所述第二薄膜晶体管的有源层的载流子迁移率。
7.根据权利要求6所述的制作方法,其特征在于,
所述第二薄膜晶体管的有源层的面积小于所述第一薄膜晶体管的有源层的面积。
8.根据权利要求6或7所述的制作方法,其特征在于,
所述第一薄膜晶体管的有源层和所述第二薄膜晶体管的有源层的材料为铟镓锌氧化物、氧化铟锌、氮氧化锌中的一种或多种。
9.根据权利要求8所述的制作方法,其特征在于,所述对所述第二薄膜晶体管的有源层进行处理包括:
对所述第二薄膜晶体管的有源层进行等离子体处理;或
对所述第二薄膜晶体管的有源层进行离子注入。
10.根据权利要求9所述的制作方法,其特征在于,
若进行等离子体轰击,则轰击的等离子体为N2O、N2、NF中的任一种;
若进行离子注入,则注入的离子为锡离子或铟离子。
11.一种阵列基板GOA区域的薄膜晶体管,其特征在于,所述薄膜晶体管由权利要求1-5任一项所述的制作方法得到。
12.一种阵列基板,其特征在于,所述阵列基板由权利要求6-10任一项所述的制作方法得到。
13.一种显示面板,包括阵列基板和彩膜基板,其特征在于,所述阵列基板为权利要求12所述的阵列基板,所述彩膜基板形成有黑矩阵,所述黑矩阵在阵列基板中的衬底基板上的投影覆盖所述有源层在所述衬底基板上的投影。
CN201610473904.5A 2016-06-24 2016-06-24 薄膜晶体管、阵列基板及相关制作方法和显示面板 Pending CN105870059A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610473904.5A CN105870059A (zh) 2016-06-24 2016-06-24 薄膜晶体管、阵列基板及相关制作方法和显示面板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610473904.5A CN105870059A (zh) 2016-06-24 2016-06-24 薄膜晶体管、阵列基板及相关制作方法和显示面板

Publications (1)

Publication Number Publication Date
CN105870059A true CN105870059A (zh) 2016-08-17

Family

ID=56655154

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610473904.5A Pending CN105870059A (zh) 2016-06-24 2016-06-24 薄膜晶体管、阵列基板及相关制作方法和显示面板

Country Status (1)

Country Link
CN (1) CN105870059A (zh)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106783887A (zh) * 2017-01-03 2017-05-31 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
CN106932980A (zh) * 2017-03-29 2017-07-07 武汉华星光电技术有限公司 一种goa阵列基板及液晶面板
CN110190063A (zh) * 2018-07-02 2019-08-30 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
WO2020172918A1 (zh) * 2019-02-25 2020-09-03 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制作方法
CN112002733A (zh) * 2020-08-06 2020-11-27 武汉华星光电半导体显示技术有限公司 Oled显示装置及制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101110429A (zh) * 2006-07-21 2008-01-23 统宝光电股份有限公司 电子装置、显示装置、图像显示系统及其制造方法
US20080108226A1 (en) * 2006-11-07 2008-05-08 Samsung Electronics Co., Ltd Method of fabricating thin film transistor substrate and thin film transistor substrate produced using the same
US20110278567A1 (en) * 2007-08-02 2011-11-17 Yan Ye Thin film transistors using thin film semiconductor materials
CN103681773A (zh) * 2013-12-27 2014-03-26 京东方科技集团股份有限公司 一种有机电致发光显示器件、其制备方法及显示装置
CN104409514A (zh) * 2014-11-21 2015-03-11 京东方科技集团股份有限公司 一种薄膜晶体管结构、其制作方法及相关装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101110429A (zh) * 2006-07-21 2008-01-23 统宝光电股份有限公司 电子装置、显示装置、图像显示系统及其制造方法
US20080108226A1 (en) * 2006-11-07 2008-05-08 Samsung Electronics Co., Ltd Method of fabricating thin film transistor substrate and thin film transistor substrate produced using the same
US20110278567A1 (en) * 2007-08-02 2011-11-17 Yan Ye Thin film transistors using thin film semiconductor materials
CN103681773A (zh) * 2013-12-27 2014-03-26 京东方科技集团股份有限公司 一种有机电致发光显示器件、其制备方法及显示装置
CN104409514A (zh) * 2014-11-21 2015-03-11 京东方科技集团股份有限公司 一种薄膜晶体管结构、其制作方法及相关装置

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106783887A (zh) * 2017-01-03 2017-05-31 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
CN106932980A (zh) * 2017-03-29 2017-07-07 武汉华星光电技术有限公司 一种goa阵列基板及液晶面板
CN110190063A (zh) * 2018-07-02 2019-08-30 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN110190063B (zh) * 2018-07-02 2021-10-12 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
US11527554B2 (en) 2018-07-02 2022-12-13 Beijing Boe Technology Development Co., Ltd. Array substrate, manufacturing method thereof, and display device
WO2020172918A1 (zh) * 2019-02-25 2020-09-03 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制作方法
CN112002733A (zh) * 2020-08-06 2020-11-27 武汉华星光电半导体显示技术有限公司 Oled显示装置及制备方法
US20220302233A1 (en) * 2020-08-06 2022-09-22 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Organic light emitting diode display device and method of manufacturing thereof
CN112002733B (zh) * 2020-08-06 2023-12-01 武汉华星光电半导体显示技术有限公司 Oled显示装置及制备方法
US11917868B2 (en) 2020-08-06 2024-02-27 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Organic light emitting diode display device and method of manufacturing thereof

Similar Documents

Publication Publication Date Title
CN105870059A (zh) 薄膜晶体管、阵列基板及相关制作方法和显示面板
US10504945B2 (en) Array substrate and method for manufacturing the same, display apparatus
CN105448824B (zh) 阵列基板及其制作方法、显示装置
TWI590423B (zh) 顯示裝置
CN108447822A (zh) Ltps tft基板的制作方法
CN106711087A (zh) 薄膜晶体管的制作方法
US11152490B2 (en) Array substrate and method for manufacturing same
US9923067B2 (en) Thin-film transistor and method for fabricating the same, array substrate and method for fabricating the same, and display device
US9240424B2 (en) Thin film transistor array substrate and producing method thereof
CN104733323A (zh) 一种低温多晶硅薄膜晶体管的制造方法
US20170301705A1 (en) Ltps pixel unit and manufacturing method for the same
CN106611764B (zh) 显示设备
US9893197B2 (en) Thin film transistor substrate, manufacturing method thereof, and liquid crystal display panel using same
US9893096B2 (en) LTPS array substrate and method for producing the same
CN106252364A (zh) 一种goa阵列基板的制作方法及goa阵列基板
US8987072B2 (en) Method of manufacturing an LTPS array substrate
US20160254292A1 (en) Manufacturing method of array substrate, array substrate and display apparatus
US10714514B2 (en) Back-channel-etched TFT substrate
US20150171219A1 (en) Thin film transistor, method of manufacturing the same, array substrate and display device
US9893205B2 (en) Thin film transistor, array substrate and liquid crystal display panel
US9705007B2 (en) Thin film transistor and fabrication method thereof, and display device
US8058649B2 (en) Thin-film transistor and method of manufacturing the same
US8329517B2 (en) Pixel structure and method for manufacturing the same
US20190064571A1 (en) Display panel and method for producing the same and display apparatus
CN105097949B (zh) 一种薄膜晶体管及其制备方法、阵列基板和显示装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20160817