CN105792521B - Pcb board pad Compensation Design technique and its application - Google Patents
Pcb board pad Compensation Design technique and its application Download PDFInfo
- Publication number
- CN105792521B CN105792521B CN201610177167.4A CN201610177167A CN105792521B CN 105792521 B CN105792521 B CN 105792521B CN 201610177167 A CN201610177167 A CN 201610177167A CN 105792521 B CN105792521 B CN 105792521B
- Authority
- CN
- China
- Prior art keywords
- design
- cam
- route
- pad
- pcb board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0528—Patterning during transfer, i.e. without preformed pattern, e.g. by using a die, a programmed tool or a laser
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention belongs to printed circuit board manufacturing technology fields, it is related to a kind of pcb board pad Compensation Design technique and its application, the line width of CAM designed lines is wider than original design figure in pcb board pad Compensation Design technique, the diameter that CAM designs solder mask window is bigger than original design figure, while the solder prevention bottom plate image of CAM design compensates design to the anti-welding lap of route-for being greater than pad range.The present invention keeps the bond pad shapes eventually formed relatively more unified by compensating design to the solder mask window figure on solder prevention bottom plate, when avoiding tin the problems such as rosin joint, short circuit, improves production yield.
Description
Technical field
The present invention relates to printed circuit board manufacturing technology field, in particular to a kind of pcb board for avoiding pad rosin joint, short circuit
Pad Compensation Design technique and its application.
Background technique
As the epoch develop rapidly, electric consumers popularity rate is higher and higher, and the electronic product that people pursue also is being sent out
Raw variation with rapid changepl. never-ending changes and improvements, has also welcome opportunities and challenges to pcb board factory.Present electronic product is small in size, light-weight, more next
It is thinner.Test is brought to the process capability of pcb board factory, anti-welding is one of processing procedure important in printed wiring board.It is anti-welding be by
The hole in piece part and part pad that need to weld on wiring board expose, by after circuit board etching route and copper face all cover.?
When downstream processing procedure assembles, numerous parts, such as the chip of resistance, capacitor, inductance, diode, triode, multi-pipe pin to be installed,
So the pad size control to these parts is particularly important.
Under normal conditions, design drawing provided by client is as shown in fig. 7,41 width of route and solder mask window on drawing
(not marking) diameter is consistent with 42 diameter of pad.It is anti-welding to open however since route 41 by layers of copper is etched to obtain according to route egative film
Window is corroded to obtain by soldermask layer 5 according to solder prevention bottom plate, thus the two figure be difficult to avoid that there are errors；In addition circuit etching
Afterwards, line pad can become smaller, solder mask window corrosion after can also become smaller, so traditional handicraft CAM make it is anti-welding when, solder mask window
51 diameters and 41 width of route can all expand, and solder mask window 51 and the overlapping dimension of route 41 will be amplified.As shown in figure 8,
The practical presentation shape of pad 42 is the shape on the inside of line boundary 41a with lap on the inside of the 51a of solder mask window boundary, this is just
Cause the result is that the finished form of pad 42 is irregular, size is different, then ring pad 42 eat tin amount, easily cause rosin joint,
The problems such as pad is short-circuit.
Due to always there is a large amount of pad 42 on every piece of pcb board, the small and mutual situation of 42 moulding of pad is all different, people
To recognize that the qualification rate of each pad 42 will also carry out post-processing that obvious feasibility is extremely low, mentioning for product quality is seriously constrained
It is high.
Therefore, it is necessary to provide the new method of one kind to solve the above problems.
Summary of the invention
The main purpose of the present invention is to provide a kind of pcb board pad Compensation Design techniques for avoiding pad rosin joint, short circuit
And its application.
The present invention is achieved through the following technical solutions above-mentioned purpose: a kind of pcb board pad Compensation Design technique, including egative film
Making step designs, wherein the line of CAM designed lines according to the CAM that original design figure carries out route egative film and solder prevention bottom plate
Width is wider than original design figure, and the diameter that CAM designs solder mask window is bigger than original design figure, while the solder prevention bottom plate shadow of CAM design
As compensating design to the anti-welding lap of route-for being greater than pad range.
Specifically, the line width of the CAM designed lines is 10-20% bigger than the line width on original design figure.
Specifically, the diameter of the CAM design solder mask window is 20-30% bigger than the windowing diameter on original design figure.
A kind of application of pcb board pad Compensation Design technique, step successively include:
1. negative film making: being designed according to the CAM that original design figure carries out route egative film and solder prevention bottom plate；
2. plating: plating copper film in circuit board surface；
3. route transfers: exposure ink is coated on circuit boards, and route film image is transferred on copper-plated circuit board,
Exposure, removes unhardened exposure ink；
4. circuit etching: the copper film etching on circuit board being become route, then removes exposure ink；
5. solder mask window: plating one layer of soldermask layer again in circuit board outer surface, solder prevention bottom plate image is transferred to circuit board
On, exposure removes unhardened soldermask layer, and the circuit pack exposed from soldermask layer windowing forms pad.
Specifically, further including text step after the solder mask window step, for increasing letter symbol outside soldermask layer.
By adopting the above technical scheme, the beneficial effect of technical solution of the present invention is:
The present invention makes the bond pad shapes eventually formed by compensating design to the solder mask window figure on solder prevention bottom plate
Compare unification, when avoiding tin the problems such as rosin joint, short circuit, improves production yield.
Detailed description of the invention
Fig. 1 is the flow chart of this process example 1；
Fig. 2 is the circuit board localized variation schematic diagram for boring pilot hole step；
Fig. 3 is the circuit board localized variation schematic diagram for boring disconnected opening step；
Fig. 4 is the circuit board localized variation schematic diagram for milling flat step；
Fig. 5 is the flow chart of this process example 2；
Fig. 6 is the operation chart of drilling processing procedure in embodiment 3；
Fig. 7 is Customer design partial schematic diagram；
Fig. 8 is that prior art CAM egative film designs partial schematic diagram；
Fig. 9 is that this technique CAM egative film designs partial schematic diagram.
Digital representation in figure:
1- circuit board, 11- remove region, and 12- retains region, the boundary 1a-；
2a- plated-through-hole, 2b- half bore；
3a- pilot hole, 3b- disconnect hole；
4- copper film, 41- route, 41a- line boundary, 42- pad；
5- soldermask layer, 51- windowing, 51a- windowing boundary；
61,62- spur location；
71- plated-through-hole drill bit, 72- guide drill.
Specific embodiment
Invention is further described in detail combined with specific embodiments below.
Embodiment 12
As shown in Figure 1, a kind of pcb board pad Compensation Design technique, step successively include:
1. negative film making: being designed according to the CAM that original design figure carries out route egative film and solder prevention bottom plate, wherein CAM is designed
The diameter of the line width of route 10%, CAM design solder mask window wider than original design figure is bigger than original design figure by 20%, while CAM
The solder prevention bottom plate image of design compensates design, such as Fig. 9 to the anti-welding lap of route-for being greater than 42 range of pad；
2. boring plated-through-hole 2a: being removed in circuit board and drill out diameter between region 11 and reservation region 12 on the 1a of boundary as D's
Plated-through-hole 2a；
3. bore pilot hole 3a: circuit board 1 remove region 11 in drill out with plated-through-hole 2a phase from pilot hole 3a, pilot hole
3a diameter D1=0.7D, such as Fig. 2；
4. plating: plating copper film 4 in circuit board surface；
5. route transfers: exposure ink is coated on circuit boards, and route film image is transferred on copper-plated circuit board,
Exposure, removes unhardened exposure ink；
Hole 3b is disconnected 6. boring: being expanded into the disconnection hole 3b intersected with plated-through-hole 2a on the basis of pilot hole 3a, is broken
Aperture 3b and boundary 1a are tangent, disconnect hole 3b diameter D2=D+10mil, such as Fig. 3；
7. circuit etching 41: the etching of copper film 4 on circuit board 1 being become route 41, wherein the edge plated-through-hole 2a is by copper film 4
Then covering removes exposure ink；
8. solder mask window: plating one layer of soldermask layer 5 again in 1 outer surface of circuit board, solder prevention bottom plate image is transferred to circuit
On plate, exposure removes unhardened soldermask layer 5, forms pad 42 from 41 part of route that the windowing of soldermask layer 5 51 is exposed；
9. text: increasing letter symbol outside soldermask layer 5；
10. milling is flat: 11 mill off of region will be removed along boundary 1a, plated-through-hole 2a is shaped to half bore 2b, such as Fig. 4.
As shown in figure 9, in order to make the big circles such as the presentation of pad 42, since 51 edge of windowing of practical soldermask layer 5 has
Some gradients, so the figure of transfer needs slightly enlarged-area, but 42 size aberration problems of pad in order to prevent, soldermask layer 5
On windowing 51 circle will not all be presented, and it is then right several compensating basins (not marking) to be generated according to the shape of route 41
The shape of solder mask window boundary 51a compensates, and just can be reduced the removal to soldermask layer 5 when solder mask window step in this way
Amount forms irregular windowing boundary 51a figure, but 41 exposed portion of route can be made closer same round.Shape last in this way
At 42 shape of pad it is just relatively unified, when being thus avoided that tin the problems such as rosin joint, short circuit, improve production yield.
As shown in figure 4, the copper product of the side half bore 2b can be eliminated in advance by disconnecting hole 3b, the hole 3b mistake flat with milling is disconnected boring
There is the position that burr is easy to produce at two in journey, wherein spur location 61 is in removal region 11 at one, even if without other
Step can also be milled flat step and be eliminated；Even and if there is burr in another place's spur location 62, by 41 step of circuit etching
After, the reagent that can also be corroded is bitten off.So while not increasing number of process steps, but Burr Problem has also obtained good solution
Certainly, the qualification rate of circuit boring is improved；Machine path reduces about half again simultaneously, plays and saves processing step, mentions
The effect of high efficiency.
As shown in figure 3, disconnecting hole 3b is made of being expanded as pilot hole 3a, because pilot hole 3a makes to disconnect the location hole 3b
Domain material bored it is disconnected, so again reaming when, drill bit is mainly by side turning rather than top pierces, and existing plating is logical at this time
Hole 2a structure would not cause material shifts to deform, so more preferable that realize deburring effect, improve the qualification of circuit boring
Rate.
Embodiment 2
1. negative film making: being designed according to the CAM that original design figure carries out route egative film and solder prevention bottom plate, wherein CAM is designed
The diameter of the line width of route 20%, CAM design solder mask window wider than original design figure is bigger than original design figure by 30%, while CAM
The solder prevention bottom plate image of design compensates design, such as Fig. 9 to the anti-welding lap of route-for being greater than 42 range of pad；
2. drilling: removing region 11 in circuit board and retain the plated-through-hole for drilling out diameter on the 1a of boundary between region 12 as D
2a, at the same circuit board 1 remove region 11 in drill out with plated-through-hole 2a phase from pilot hole 3a, pilot hole 3a diameter D1=
0.7D, such as Fig. 2；
3. plating: plating copper film 4 in circuit board surface；
4. route transfers: exposure ink is coated on circuit boards, and route film image is transferred on copper-plated circuit board,
Exposure, removes unhardened exposure ink；
Hole 3b is disconnected 5. boring: being expanded into the disconnection hole 3b intersected with plated-through-hole 2a on the basis of pilot hole 3a, is broken
Aperture 3b and boundary 1a are tangent, disconnect hole 3b diameter D2=D+10mil, such as Fig. 3；
6. circuit etching 41: the etching of copper film 4 on circuit board 1 being become route 41, wherein the edge plated-through-hole 2a is by copper film 4
Then covering removes exposure ink；
7. solder mask window: plating one layer of soldermask layer 5 again in 1 outer surface of circuit board, solder prevention bottom plate image is transferred to circuit
On plate, exposure removes unhardened soldermask layer 5, forms pad 42 from 41 part of route that the windowing of soldermask layer 5 51 is exposed；
8. text: increasing letter symbol outside soldermask layer 5；
9. milling is flat: 11 mill off of region will be removed along boundary 1a, plated-through-hole 2a is shaped to half bore 2b, such as Fig. 4.
As shown in figure 5, difference from example 1 is that: it bores plated-through-hole 2a step and bores the merging of pilot hole 3a step
For drill process.Pcb board procedure of processing in this way is reduced again, and working efficiency further increases.
Embodiment 3
As shown in fig. 6, with embodiment 2 the difference is that: the drill bit 71 for boring plated-through-hole, which drills through, bores guiding after circuit board 1
The drill bit 72 in hole drills through circuit board 1 again.Because plated-through-hole 2a is the hole that actual needs retains, and pilot hole 3a can be eliminated
Hole needs to drill out one step ahead so plated-through-hole 2a position accuracy demand is higher.Plated-through-hole drill bit 71 drills through circuit board 1 one step ahead
Afterwards, circuit board 1 be able to carry out stress release and reply it is smooth, in this way brill pilot hole 3a when circuit board 1 will not be because of simultaneously
Stress is excessive and breaks.
Above-described is only some embodiments of the present invention.For those of ordinary skill in the art, not
Under the premise of being detached from the invention design, various modifications and improvements can be made, these belong to protection model of the invention
It encloses.
Claims (5)
1. a kind of pcb board pad Compensation Design technique, it is characterised in that: including negative film making step, i.e., according to original design figure
The CAM design of route egative film and solder prevention bottom plate is carried out, wherein the line width of CAM designed lines is wider than original design figure, and CAM design is anti-
The diameter for welding windowing is bigger than original design figure, while the solder prevention bottom plate image of CAM design is anti-welding to the route-for being greater than pad range
Lap compensates design.
2. pcb board pad Compensation Design technique according to claim 1, it is characterised in that: the line of the CAM designed lines
Width is 10-20% bigger than the line width on original design figure.
3. pcb board pad Compensation Design technique according to claim 2, it is characterised in that: the CAM designs solder mask window
Diameter it is 20-30% bigger than the windowing diameter on original design figure.
4. a kind of application of the pcb board pad Compensation Design technique described in claim 1-3, it is characterised in that step is successively wrapped
It includes:
1. negative film making: being designed according to the CAM that original design figure carries out route egative film and solder prevention bottom plate；
2. plating: plating copper film in circuit board surface；
3. route transfers: coating exposure ink on circuit boards, route film image is transferred on copper-plated circuit board, expose
Light removes unhardened exposure ink；
4. circuit etching: the copper film etching on circuit board being become route, then removes exposure ink；
5. solder mask window: plating one layer of soldermask layer again in circuit board outer surface, solder prevention bottom plate image is transferred on circuit board, expose
Light removes unhardened soldermask layer, and the circuit pack exposed from soldermask layer windowing forms pad.
5. the application of pcb board pad Compensation Design technique according to claim 4, it is characterised in that: the solder mask window
It further include text step after step, for increasing letter symbol outside soldermask layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610177167.4A CN105792521B (en) | 2016-03-25 | 2016-03-25 | Pcb board pad Compensation Design technique and its application |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610177167.4A CN105792521B (en) | 2016-03-25 | 2016-03-25 | Pcb board pad Compensation Design technique and its application |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105792521A CN105792521A (en) | 2016-07-20 |
| CN105792521B true CN105792521B (en) | 2018-12-04 |
Family
ID=56391607
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610177167.4A Active CN105792521B (en) | 2016-03-25 | 2016-03-25 | Pcb board pad Compensation Design technique and its application |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105792521B (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107660068B (en) * | 2016-07-25 | 2020-07-14 | 北大方正集团有限公司 | Pad design structure and design method |
| CN106255325A (en) * | 2016-08-24 | 2016-12-21 | 山东蓝色电子科技有限公司 | A kind of special-shaped compensation method of the circuit pads considering etching factor |
| CN106455325B (en) * | 2016-09-27 | 2019-02-01 | 惠州市金百泽电路科技有限公司 | A kind of production method of 77Ghz high-precision radio frequency radar printed wiring board |
| CN106658978B (en) * | 2016-10-28 | 2019-03-29 | 奥士康精密电路（惠州）有限公司 | A kind of process improving pad size consistency |
| CN106973514A (en) * | 2017-03-10 | 2017-07-21 | 江门崇达电路技术有限公司 | PAD preparation method in a kind of PCB |
| CN114245575A (en) * | 2021-11-16 | 2022-03-25 | 龙南骏亚电子科技有限公司 | Design method of PCB resistance welding zigzag circuit board |
| CN114786344B (en) * | 2022-05-26 | 2023-03-10 | 江苏博敏电子有限公司 | Design method for MiniLED packaging bonding pad |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104317998A (en) * | 2014-10-17 | 2015-01-28 | 深圳市百能信息技术有限公司 | Method and device for making and compensating parameters of Gerber file |
| CN105430933A (en) * | 2015-12-22 | 2016-03-23 | 江苏博敏电子有限公司 | Method for treating defects of half solder mask bridge in solder mask production process |
-
2016
- 2016-03-25 CN CN201610177167.4A patent/CN105792521B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104317998A (en) * | 2014-10-17 | 2015-01-28 | 深圳市百能信息技术有限公司 | Method and device for making and compensating parameters of Gerber file |
| CN105430933A (en) * | 2015-12-22 | 2016-03-23 | 江苏博敏电子有限公司 | Method for treating defects of half solder mask bridge in solder mask production process |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105792521A (en) | 2016-07-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105792521B (en) | Pcb board pad Compensation Design technique and its application | |
| CN105792545B (en) | Pcb board half bore moulding process | |
| CN100574569C (en) | A kind of production method with long and short golden finger circuit board | |
| CN106973507A (en) | A kind of preparation method of filling holes with resin wiring board | |
| CN104717846B (en) | The preparation method of metallization slotted eye in a kind of PCB | |
| CN104363720A (en) | Method of forming deep blind groove in printed circuit board (PCB) | |
| CN104703397B (en) | A kind of method of flexible circuitry board blind hole processing | |
| CN101820728A (en) | Technological method for processing printed circuit board (PCB) with stepped groove | |
| CN103327753A (en) | Manufacturing method for metal semi-hole circuit board | |
| CN104185377A (en) | Fine-line PCB manufacturing method | |
| CN108055780A (en) | A kind of multilayer circuit board solder mask structure technique | |
| CN105208789A (en) | Manufacturing method of battery circuit board | |
| CN104476616B (en) | Printed circuit board short slotted eye preparation method | |
| CN110248473A (en) | A method of it is small to solve VIA-IN-PAD filling holes with resin PCB printed board crimping hole | |
| CN109275268A (en) | A kind of PCB back drill production method being less than 0.15mm for medium thickness | |
| CN106231821B (en) | A kind of four layers of pcb board manufacture craft | |
| CN102958288B (en) | Printed circuit board drilling method | |
| CN105764270A (en) | Manufacturing method of PCB possessing entire board electrolytic gold and golden finger surface processing | |
| CN102026484B (en) | Pressing and breakover process and laminating board structure of circuit board | |
| CN106132082A (en) | A kind of LED circuit board of side paster and preparation method thereof | |
| CN108200725A (en) | It is a kind of to improve the boring method for pulling internal layer copper | |
| CN105828523A (en) | Rigid-flex combined circuit board and manufacturing method thereof | |
| CN111867278B (en) | PCB semi-metallized hole processing technology | |
| CN104768331A (en) | Repair method for open circuit in PCB | |
| CN106714453A (en) | Pseudo rigid-flex board and preparation method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |