CN105789108B - The production method and power transistor chip of power transistor chip - Google Patents
The production method and power transistor chip of power transistor chip Download PDFInfo
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- CN105789108B CN105789108B CN201410784914.1A CN201410784914A CN105789108B CN 105789108 B CN105789108 B CN 105789108B CN 201410784914 A CN201410784914 A CN 201410784914A CN 105789108 B CN105789108 B CN 105789108B
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Abstract
This application discloses a kind of production method of power transistor chip and power transistor chips.Wherein, the production method is the following steps are included: form semiconductor substrate, the front of semiconductor substrate is formed with power transistor；Metal layer is formed at the back side of semiconductor substrate；Protective film is formed on the metal layer, is contacted with obstructing steam with metal layer.The production method by forming protective film on the metal layer; and the protective film is contacted for obstructing steam with metal layer; to reduce the white spot defect formed due to metal layer by the steam oxidation in air in power transistor chip, and then improve the performance of power transistor chip.
Description
Technical field
This application involves the technical fields of semiconductor integrated circuit, in particular to a kind of power transistor chip
Production method and power transistor chip.
Background technique
Power transistor refers to the work for controlling power electronic device, and is load by control power electronic device
The semiconductor devices of high-power output is provided.Common power transistor includes pin diode, thyristor, power field effect crystalline substance
Body pipe and insulated gate bipolar transistor etc..Currently, power transistor is widely used in control power output and the big function of high frequency
In the scanning circuit using resistance equipment of rate transistor, for example, the power amplifier of transmitter, mobile phone rf output circuit,
High-frequency oscillating circuits and high speed electronic switch circuit etc..
In the manufacturing process of power transistor chip, need to form metal layer (i.e. back metal at the back side of chip
Technique).Mainly there are two the effects of main aspect for metal layer: first aspect is the operating current as power transistor chip
One main electrical current access has electric action；The second aspect produced heat when being transmitting power transistor chip work
Thermal dissipating path, have conductive force.Therefore, back side metallization technology for the performance of power transistor chip, reliability and
Stability all has a great impact.One good back side metallization technology requires the metal layer prepared by it to have contact resistance
Small, the features such as thermal resistance is low, stress is small and good reliability.
After forming above-mentioned metal layer, need to carry out reliability test and defect inspection to chip, then again to chip
Carry out Vacuum Package.However, the metal layer of chip back is constantly exposed to sky to before Vacuum Package after forming metal layer
In gas, so that metal layer (contains H by the steam in air2O and O2) oxidation, to form metal oxygen on the surface of metal layer
Compound (i.e. white spot defect), and then influence the performance (such as electric property etc.) of power transistor chip.In view of the above-mentioned problems, mesh
Preceding effective solution method not yet.
Summary of the invention
The application is intended to provide the production method and power transistor chip of a kind of power transistor chip, to reduce power
White spot defect in transistor chip on metal layer, to improve the performance of power transistor chip.
To achieve the goals above, this application provides a kind of production method of power transistor chip, the production methods
The following steps are included: forming semiconductor substrate, the front of semiconductor substrate is formed with power transistor；In the back of semiconductor substrate
Face forms metal layer；Protective film is formed on the metal layer, is contacted with obstructing steam with metal layer.
Further, protective film is electron level adhesive film or hydrophobic membrane.
Further, electron level adhesive film is made of organic polymer thin film and sticky agent.
Further, hydrophobic membrane is Kapton, polyethylene terephthalate, polyethylene naphthalate
Polypropylene.
Further, when protective film is electron level adhesive film, by forming protective film on attaching process metal layer；Protective film
When for hydrophobic membrane, protective film is formed by depositing operation on the metal layer.
Further, before the step of forming protective film, production method further includes to the semiconductor for being formed with metal layer
Matrix carries out the step of baking processing.
Further, in the step of toasting processing, baking processing is carried out in a nitrogen atmosphere, baking temperature is 160~
200 DEG C, 100~180s of baking time.
Further, after the step of forming protective film, production method further includes carrying out reliability test, defect inspection
And the step of Vacuum Package.
Further, the material of metal layer is Ag, Ni or Ti.
Meanwhile present invention also provides a kind of power transistor chip, the power transistor chip is above-mentioned by the application
Production method is made.
Using the technical solution of the application, the application by forming protective film on the metal layer, and the protective film is for hindering
Water proof vapour is contacted with metal layer, to reduce in power transistor chip due to metal layer the shape by the steam oxidation in air
At white spot defect, and then improve the performance of power transistor chip.
Detailed description of the invention
The accompanying drawings constituting a part of this application is used to provide further understanding of the present application, and the application's shows
Meaning property embodiment and its explanation are not constituted an undue limitation on the present application for explaining the application.In the accompanying drawings:
Fig. 1 shows the flow diagram of the production method of power transistor chip provided by the application embodiment.
Specific embodiment
It should be noted that in the absence of conflict, the features in the embodiments and the embodiments of the present application can phase
Mutually combination.The application is described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
It should be noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root
According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singular
Also it is intended to include plural form, additionally, it should be understood that, when in the present specification using term "comprising" and/or " packet
Include " when, indicate existing characteristics, step, operation, device, component and/or their combination.
For ease of description, spatially relative term can be used herein, as " ... on ", " ... top ",
" ... upper surface ", " above " etc., for describing such as a device shown in the figure or feature and other devices or spy
The spatial relation of sign.It should be understood that spatially relative term is intended to comprising the orientation in addition to device described in figure
Except different direction in use or operation.For example, being described as if the device in attached drawing is squeezed " in other devices
It will be positioned as " under other devices or construction after part or construction top " or the device of " on other devices or construction "
Side " or " under other devices or construction ".Thus, exemplary term " ... top " may include " ... top " and
" in ... lower section " two kinds of orientation.The device can also be positioned with other different modes and (is rotated by 90 ° or in other orientation), and
And respective explanations are made to the opposite description in space used herein above.
As described in background technique, in the production method of existing power transistor chip, formed metal layer it
It is constantly exposed in air to the metal layer of chip back before Vacuum Package afterwards, so that metal layer (is contained by the steam in air
There is H2O and O2) oxidation, to form metal oxide (i.e. white spot defect) on the surface of metal layer, and then influence power crystal
The performance of tube chip.
Present inventor studies regarding to the issue above, proposes a kind of production side of power transistor chip
Method.As shown in Figure 1, the production method is the following steps are included: form semiconductor substrate, the front of semiconductor substrate is formed with power
Transistor；Metal layer is formed at the back side of semiconductor substrate；Protective film is formed on the metal layer, is connect with obstructing steam with metal layer
Touching.
Above-mentioned production method by forming protective film on the metal layer, and the protective film connects for obstructing steam with metal layer
Touching, thus reduce the white spot defect formed due to metal layer by the steam oxidation in air in power transistor chip, into
And improve the performance of power transistor chip.
It is described in more detail below according to the exemplary of the production method of power transistor chip provided herein
Embodiment.However, these illustrative embodiments can be implemented by many different forms, and it is not construed as
It is only limited to embodiments set forth herein.It should be understood that thesing embodiments are provided so that the public affairs of the application
It opens thorough and complete, and the design of these illustrative embodiments is fully conveyed to those of ordinary skill in the art.
Firstly, forming semiconductor substrate, the front of the semiconductor substrate is formed with power transistor.Specifically, the step
Include: offer wafer, forms power transistor in the front of wafer.Wherein, wafer is generally silicon wafer, or SiGe
(GeSi), the new materials such as III-V compound such as silicon carbide (SiC) and GaAs.
In the step, power transistor can be double for pin diode, thyristor, power field effect transistor and insulated gate
Bipolar transistor etc..For different power transistors, its forming step is slightly different, and those skilled in the art is referred to
The prior art makes power transistor.By taking the production of power field effect transistor as an example, manufacturing process includes forming grid, source
The step of pole and drain electrode and groove, and its manufacturing process relatively mostly uses V trench process；Its grid is commonly made to V-type, makes
It has many advantages, such as that channel is short, voltage endurance capability is strong, transconductance linearity is good, switching speed is fast.
Completion was formed after the step of semiconductor substrate, formed metal layer at the back side of semiconductor substrate.Preferably, metal
The material of layer is Ag, Ni or Ti.Certainly, the material of metal layer is not limited in above-mentioned preference.Form the technique one of metal layer
As using vapor deposition, can also be using chemical vapor deposition or sputtering etc., specific process parameter is referred to the prior art.
For forming Ag layers using vapor deposition comprising following steps: ag material is placed in crucible as evaporation source, and
Semiconductor substrate is placed in vaporization chamber；After vacuumizing, heating is so that ag material evaporates, so that silver atoms are deposited with condensing mode
On the back side of semiconductor substrate.Its technological parameter can be set according to actual process demand, such as vapor deposition temperature is
1000~1200 DEG C, evaporation time be 30~3min, formed Ag layers with a thickness of tens nanometers to a few micrometers.
It completes to form protective film on the metal layer after the step of back side of semiconductor substrate forms metal layer, with resistance
Water proof vapour is contacted with metal layer.The protective film can be used in barrier steam and contact with metal layer, to realize reduction power crystal
Due to the white spot defect that metal layer is formed by the steam oxidation in air in tube chip, and improve the property of power transistor chip
The purpose of energy.
Those skilled in the art can set the type of said protection film according to teachings of the present application.Preferably, it protects
Film is electron level adhesive film or hydrophobic membrane.Wherein, electron level adhesive film (Blue tape) is by organic polymer thin film and sticky agent
It constitutes, organic polymer thin film can be Kapton etc., and sticky agent can be polyacrylic acid etc..Using electron level viscosity
It, can be by forming protective film on attaching process metal layer when film is as protective film.As it can be seen that the formation process of electron level adhesive film
Simple and easy removal is also easier relatively simultaneously, consequently facilitating reducing process costs etc..
Above-mentioned hydrophobic membrane can be the material in this field with hydrophobic function or barrier steam function, such as polyimides
Film, polyethylene terephthalate, polyethylene naphthalate polypropylene.The hydrophobic membrane usually passes through depositing operation shape
At depositing operation can be chemical vapor deposition, vapor deposition etc., and specific process parameter is referred to the prior art.
In the production method of above-mentioned power transistor chip provided by the present application, before the step of forming protective film, also
Baking processing can be carried out to the semiconductor substrate for being formed with metal layer, it is (especially golden with the evaporative removal semiconductor substrate back side
Belong to layer on) steam, to be further reduced contact of the steam with metal layer, thus be further reduced in power transistor chip by
In the white spot defect that metal layer is formed by the steam oxidation in air, and then further increase the property of power transistor chip
Energy.
Above-mentioned baking processing can use technique common in the art, and technological parameter is referred to the prior art.
For example, in the step of toasting processing, baking processing is carried out in a nitrogen atmosphere, and baking temperature is 160~200 DEG C, is dried
Roasting 100~180s of time.Certainly, the technique for toasting processing is not limited in above-described embodiment.
It, should after the step of forming protective film in the production method of above-mentioned power transistor chip provided by the present application
Production method further includes the steps that carrying out reliability test, defect inspection and Vacuum Package.Wherein, reliability test includes resistance to
Breakdown test, electric leakage current test and life test etc., test process is referred to the prior art；Defect inspection includes reducing
Whether containing residue defect etc., checking tool includes high-power microscope, scanning electron microscope etc.；The step of Vacuum Package
The technical process such as including metal bonding, specific manufacture craft are referred to the prior art.
Meanwhile present invention also provides a kind of power transistor chip, the power transistor chip is above-mentioned by the application
Production method is made.It is formed with protective film on metal layer in the power transistor chip, which can be used in hindering
Water proof vapour is contacted with metal layer, to reduce in power transistor chip due to metal layer the shape by the steam oxidation in air
At white spot defect, and then improve the performance of power transistor chip.
The illustrative embodiments according to the application are described in more detail below.However, these illustrative embodiments
It can be implemented by many different forms, and should not be construed to be limited solely to embodiments set forth herein.It should
These embodiments that are to provide understood are in order to enable disclosure herein is thoroughly and complete, and by these exemplary realities
The design for applying mode is fully conveyed to those of ordinary skill in the art.
The production method for further illustrating power transistor chip provided by the present application below in conjunction with embodiment.
Embodiment 1
The production method for present embodiments providing a kind of power transistor chip, comprising the following steps: firstly, in silicon wafer
Front forms power field effect transistor；Then, Ag layers are formed at the back side of silicon wafer by evaporation process；Finally, passing through fitting
Technique forms electron level adhesive film (being made of Kapton and polyacrylic acid) on Ag layers.
Embodiment 2
The production method for present embodiments providing a kind of power transistor chip, comprising the following steps: firstly, in silicon wafer
Front forms power field effect transistor；Then, Ag layers are formed at the back side of silicon wafer by evaporation process；Finally, on Ag layer
Deposition forms Kapton.
Embodiment 3
The production method for present embodiments providing a kind of power transistor chip, comprising the following steps: firstly, in silicon wafer
Front forms power field effect transistor；Then, Ag layers are formed at the back side of silicon wafer by evaporation process；Next, in nitrogen
Baking processing is carried out to the wafer for being formed with Ag layers under atmosphere, baking temperature is 60 DEG C, baking time 2min；Finally, passing through
Attaching process forms electron level adhesive film (being made of Kapton and polyacrylic acid) on Ag layers.
Comparative example 1
This comparative example provides a kind of production method of power transistor chip, comprising the following steps: firstly, in silicon wafer
Front forms power field effect transistor；Then, Ag layers are formed at the back side of silicon wafer by evaporation process.
Test: pass through power transistor chip provided by high power electron microscope observation embodiment 1 to 3 and comparative example 1
Middle Ag layers of surface topography.The result shows that the Ag layer surface in embodiment 1 to 3 is smooth, there is no generate white spot defect；
Ag layer surface in comparative example 1 produces many white spot defects.
It can be seen from the above description that the application the above embodiments realize following technical effect: the application is logical
It crosses and forms protective film on the metal layer, and the protective film is contacted for obstructing steam with metal layer, to reduce power crystal
Due to the white spot defect that metal layer is formed by the steam oxidation in air in tube chip, and then improve power transistor chip
Performance.
The foregoing is merely preferred embodiment of the present application, are not intended to limit this application, for the skill of this field
For art personnel, various changes and changes are possible in this application.Within the spirit and principles of this application, made any to repair
Change, equivalent replacement, improvement etc., should be included within the scope of protection of this application.
Claims (9)
1. a kind of production method of power transistor chip, which is characterized in that the production method the following steps are included:
Semiconductor substrate is formed, the front of the semiconductor substrate is formed with power transistor；
Metal layer is formed at the back side of the semiconductor substrate；
Protective film is formed on the metal layer, is contacted with obstructing steam with the metal layer,
Before the step of forming the protective film, the production method further includes partly leading to being formed with the described of the metal layer
Body matrix carries out the step of baking processing.
2. manufacturing method according to claim 1, which is characterized in that the protective film is electron level adhesive film or hydrophobic
Film.
3. production method according to claim 2, which is characterized in that the electron level adhesive film is by organic polymer thin film
It is constituted with sticky agent.
4. production method according to claim 2, which is characterized in that the hydrophobic membrane is Kapton, gathers to benzene
Naphthalate, polyethylene naphthalate polypropylene.
5. production method according to any one of claim 2 to 4, which is characterized in that
When the protective film is electron level adhesive film, by forming the protective film on metal layer described in attaching process；
When the protective film is hydrophobic membrane, the protective film is formed on the metal layer by depositing operation.
6. manufacturing method according to claim 1, which is characterized in that in the step of baking is handled, in nitrogen gas
The baking processing is carried out under atmosphere, baking temperature is 160~200 DEG C, 100~180s of baking time.
7. manufacturing method according to claim 1, which is characterized in that described after the step of forming the protective film
Production method further includes the steps that carrying out reliability test, defect inspection and Vacuum Package.
8. manufacturing method according to claim 1, which is characterized in that the material of the metal layer is Ag, Ni or Ti.
9. a kind of power transistor chip, which is characterized in that the power transistor chip is by any one of claims 1 to 8
The production method is made.
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| CN106997900A (en) * | 2016-01-22 | 2017-08-01 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure, its forming method and method of testing |
| CN108109901A (en) * | 2016-11-25 | 2018-06-01 | 中芯国际集成电路制造(上海)有限公司 | A kind of production method of semiconductor devices |
| CN112786459B (en) * | 2019-11-08 | 2023-03-24 | 中芯国际集成电路制造（天津）有限公司 | Semiconductor device and test method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102870217A (en) * | 2010-04-06 | 2013-01-09 | 三菱电机株式会社 | Power semiconductor device and method for manufacturing same |
| CN103887287A (en) * | 2012-12-21 | 2014-06-25 | 瑞萨电子株式会社 | Semiconductor Device And Method Of Manufacturing The Same |
| CN104054159A (en) * | 2012-03-19 | 2014-09-17 | 富士电机株式会社 | Production method for semiconductor device |
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| CN102683588A (en) * | 2011-03-10 | 2012-09-19 | 中国科学院微电子研究所 | Organic field-effect transistor structure and preparation method thereof |
| JP6020040B2 (en) * | 2012-10-26 | 2016-11-02 | 富士電機株式会社 | Manufacturing method of semiconductor device |
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| CN102870217A (en) * | 2010-04-06 | 2013-01-09 | 三菱电机株式会社 | Power semiconductor device and method for manufacturing same |
| CN104054159A (en) * | 2012-03-19 | 2014-09-17 | 富士电机株式会社 | Production method for semiconductor device |
| CN103887287A (en) * | 2012-12-21 | 2014-06-25 | 瑞萨电子株式会社 | Semiconductor Device And Method Of Manufacturing The Same |
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