CN105682379A - Process for rapidly fabricating multi-layer circuit board - Google Patents

Process for rapidly fabricating multi-layer circuit board Download PDF

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Publication number
CN105682379A
CN105682379A CN201610051184.3A CN201610051184A CN105682379A CN 105682379 A CN105682379 A CN 105682379A CN 201610051184 A CN201610051184 A CN 201610051184A CN 105682379 A CN105682379 A CN 105682379A
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CN
China
Prior art keywords
circuit board
technique
multilayer circuit
board according
quick fabrication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610051184.3A
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Chinese (zh)
Inventor
唐成明
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Digital Printed Circuit Board Co Ltd
Original Assignee
Digital Printed Circuit Board Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Printed Circuit Board Co Ltd filed Critical Digital Printed Circuit Board Co Ltd
Priority to CN201610051184.3A priority Critical patent/CN105682379A/en
Publication of CN105682379A publication Critical patent/CN105682379A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0779Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
    • H05K2203/0786Using an aqueous solution, e.g. for cleaning or during drilling of holes
    • H05K2203/0793Aqueous alkaline solution, e.g. for cleaning or etching

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention relates to the technical field of production and processing of a circuit board, in particular to a process for rapidly fabricating a multi-layer circuit board. The process comprises the following steps of (1) taking a double-sided board with thickness of 1 millimeter as an inner-layer board, and milling a double-sided pattern by using a ProtoMat engraving machine in the presence of a positioning hole; (2) carrying out hole metallization on the inner layer by a chemical hole metallization device; (3) cutting a curing sheet into certain sizes; (4) placing two cut prepregs just above and just below the pattern of the inner-layer board, and separately placing a copper foil attached with a substrate on and under the outermost edge of each prepreg; (5) selecting a program for lamination; (6) drilling by using a ProtoMatM60/H engraving machine; (7) carrying out hole metallization by using the chemical hole metallization device; and (8) milling the double-sided pattern by using the engraving machine. During the fabrication process, the working processes of hole metallization, lamination and drilling dirty removal are adopted, thus, the fabrication cost of the multi-layer board is reduced, and the fabrication efficiency is improved.

Description

A kind of technique of quick Fabrication multilayer circuit board
Technical field
The present invention relates to board production processing technique field, the technique being specifically related to a kind of quick Fabrication multilayer circuit board.
Background technology
Dual platen is middle one layer of medium, and two sides is all routing layer. Multi-layer sheet is exactly multilamellar routing layer, is dielectric layer between every two-layer, and it is very thin that dielectric layer can do. Multilayer circuit board has at least three layers conductive layer, and wherein two-layer is at outer surface, and remaining one layer is combined in insulation board. Electrical connection between them realizes typically by the plated-through-hole on circuit board transverse section. Wiring board [2] by wiring side number determine technology difficulty and processing price, common line plate divides one side cabling and two-sided cabling, is commonly called as single sided board and dual platen, but high-end electronic product, because product space design factor restricts, except surface wiring, inside can superposition multilayer line, in production process, after making each sandwich circuit, position again through optical device, pressing, allow multilayer line be superimposed upon in a piece of wiring board. It is commonly called as multilayer circuit board. Every wiring board more than or equal to 2 layers, can be referred to as multilayer circuit board. Multilayer circuit board can be divided into again, the rigid wiring board of multilamellar, multilamellar soft hard circuit board, multilamellar flexible and hard combined circuit board.
Due to the increase of integrated antenna package density, result in the high concentration of interconnection line, this makes the use of many substrates become required. In the layout of printed circuit, occur in that unpredictalbe design problem, such as noise, stray capacitance, crosstalk etc. So, Printed Circuit Board Design must be devoted to make holding wire length minimum and avoid parallel line etc. Obviously, in single sided board, or even in dual platen, owing to the number of crossovers that can realize is limited, these demands all can not obtain satisfied answer. When a large amount of interconnection and intersection demand, circuit board to reach the performance of a satisfaction, is necessary for expanding flaggy to more than two-layer, thus occurs in that multilayer circuit board. Therefore the original intention manufacturing multilayer circuit board is that the electronic circuit for complexity and/or to noise-sensitive selects suitable routing path to provide more degree of freedom.
Multilayer circuit board has at least three layers conductive layer, and wherein two-layer is at outer surface, and remaining one layer is combined in insulation board.Electrical connection between them realizes typically by the plated-through-hole on circuit board transverse section. Unless otherwise specified, multilayer printed circuit board is the same with dual platen, is usually plated-through-hole plate.
Two-layer or more circuit are overlie one another and are fabricated by together by many substrates, have pre-set reliably being connected with each other between them. Before being rolled together at all of layer, having been completed boring and plating, this technology violates traditional manufacturing process from the beginning. Innermost two-layer is made up of traditional dual platen, and outer layer is then different, and they are to be made up of independent single sided board. Before rolling, interior substrate is by drilled, the electroplates in hole, Graphic transitions, development and etching. Drilled outer layer is signals layer, and it is plated logical by forming the annulus such a mode of balanced copper in the inside edge of through hole. Rolling together into many substrates by each layer subsequently, these many substrates can use wave soldering to carry out (between components and parts) and be connected with each other.
Multilayer circuit board (hereinafter referred to as multi-layer sheet), because of the relation of its density and the number of plies, makes the difficulty of processing and making process increase, and test and comparison difficulty, guaranteed reliability's degree is relatively low relative to single sided board and dual platen. Existing multilayer circuit board production technology is generally relatively complicated, makes cumbersome, in wiring board production process, to next panel plating operation after heavy copper, need to be immersed in the dilute sulfuric acid liquid medicine of 0.05-0.1%, it is prevented that plate face and hole internal oxidition, bad after prevention product plating; But dilute sulfuric acid to oily waste degradation power strong simultaneously can microetch copper, soak time must control not can exceed that 4 hours, otherwise hole wall heavy on one layer of thin copper microetch after can cause Kong Wutong, and dilute sulfuric acid liquid medicine per tour need to change cylinder once. Owing to strict time control limits, control to bring very big inconvenience to production operation, and be easily generated quality problem. So the production technology of existing multilayer circuit board awaits perfect further, if internal layer circuit is once break down, almost without the possibility of maintenance. Flaggy is more many, and cost is more high, and the scrappage of product is also many with regard to the moon, and therefore production cost is higher. Multiple-plate q&r is largely relevant with multiple-plate design quality.
Summary of the invention
For problem above, the technique that the invention provides a kind of quick Fabrication multilayer circuit board, in its manufacturing process, have employed the workflow of hole metallization, lamination and Drill dirt cleaning, thus having reached the multiple-plate manufacturing cost of reduction, improve make efficiency, it is achieved that the fast circuit plate at laboratory or institute designs and makes, it is possible to effectively solve the problem in technical background.
To achieve these goals, the technical solution used in the present invention is as follows: the technique of a kind of quick Fabrication multilayer circuit board, comprises the steps:
(1) take dual platen thick for 1mm as inner plating, when there being hole, location, utilize the mechanical machine of ProtoMat to mill out two-sided figure;
(2) utilize chemistry hole metallization equipment that internal layer is carried out hole metallization;
(3) cured sheets is cut into certain size;
(4) respectively put two prepregs cut out in the surface of inner plating figure and underface, respectively put the Copper Foil of an attached base material at the ragged edge of prepreg up and down;
(5) option program carries out lamination;
(6) the mechanical machine drill hole of ProtoMatM60/H is utilized;
(7) chemistry hole metallization equipment is utilized to carry out hole metallization;
(8) mechanical machine is utilized to mill out two-sided figure.
Further, described step (3) cured sheets size goes out greatly more than 5mm than each limit of inner figure, the dual platen each limit little at least 20mm thicker than whole 1mm.
Further, prepreg Distance positioning hole at least 20mm in described step (3).
Further, the size of described step (4) Copper Foil 20mm more than bigger than each limit of prepreg.
Further, the method for described step (2) and step (7) mesoporous metal is: use LPKFconntac II circuit board apertures metallization machines to realize the hole metallization of dual platen.
Further, after described step (7), the CLEANER110 solution of sheet material carries out process of deoiling.
Further, after oil removal treatment, sheet material is mentioned in 30s from tap water and puts down 15 times.
Further, the pH value of described CLEANER110 solution is 9-10.
Further, sheet material is carried out burr removing operation after terminating by described step (6) boring.
Further, the temperature of described CLEANER110 solution controls at 50-60 DEG C.
Beneficial effects of the present invention:
The present invention, in its manufacturing process, have employed the workflow of hole metallization, lamination and Drill dirt cleaning, thus having reached the multiple-plate manufacturing cost of reduction, improves make efficiency, it is achieved that the fast circuit plate at laboratory or institute designs and makes.
Detailed description of the invention
In order to make the purpose of the present invention, technical scheme and advantage clearly understand, below in conjunction with embodiment, the present invention is further elaborated. Should be appreciated that specific embodiment described herein is only in order to explain the present invention, is not intended to limit the present invention.
Embodiment:
The technique of a kind of quick Fabrication multilayer circuit board, comprises the steps:
(1) take dual platen thick for 1mm as inner plating, when there being hole, location, utilize the mechanical machine of ProtoMat to mill out two-sided figure;
(2) utilize chemistry hole metallization equipment that internal layer is carried out hole metallization;
(3) cured sheets is cut into certain size;
(4) respectively put two prepregs cut out in the surface of inner plating figure and underface, respectively put the Copper Foil of an attached base material at the ragged edge of prepreg up and down;
(5) option program carries out lamination;
(6) the mechanical machine drill hole of ProtoMatM60/H is utilized;
(7) chemistry hole metallization equipment is utilized to carry out hole metallization;
(8) mechanical machine is utilized to mill out two-sided figure.
Wherein, described step (3) cured sheets size goes out greatly more than 5mm than each limit of inner figure, the dual platen each limit little at least 20mm thicker than whole 1mm.
Wherein, prepreg Distance positioning hole at least 20mm in described step (3).
Wherein, the size of described step (4) Copper Foil 20mm more than bigger than each limit of prepreg.
Wherein, the method for described step (2) and step (7) mesoporous metal is: use LPKFconntac II circuit board apertures metallization machines to realize the hole metallization of dual platen.
Wherein, after described step (7), the CLEANER110 solution of sheet material carries out process of deoiling.
Wherein, after oil removal treatment, sheet material is mentioned in 30s from tap water and puts down 15 times.
Wherein, the pH value of described CLEANER110 solution is 9-10.
Wherein, sheet material is carried out burr removing operation after terminating by described step (6) boring.
Wherein, the temperature of described CLEANER110 solution controls at 50-60 DEG C.
The present invention is removed boring dirty operation for finished product, it is relevant that epoxy bores the factors such as the process conditions of dirty formation and printed board mechanical performance, the material of drill bit and geometry, boring, if do not removed, may result in following situations: pollution makes the connection of plated through-hole and internal layer circuit cause open circuit or only local-connection because of the isolation of resin stain;Epoxy resins glass cloth powder is very loose, is not adhered firmly on hole wall, if do not removed, it is possible to come off or partial exfoliation in hole metallization process.
The purpose of Drill dirt cleaning: make the glass fabric of epoxy resin on the upper and lower surface of internal layer connection dish be partially removed and expose copper face, makes metallization form three-dimensional connection, improves the joint face of internal layer.
Reaction principle: alkalinity potassium permanganate and the alkyl effect in epoxy molecule structure, makes epoxy resin be corroded.
The major parameter of the multiple-plate lamination of the present invention is temperature, pressure, time, and lamination process is divided into preheating, precompressed, total head and four-stage of colding pressing, and all there are standard value the temperature in each stage, pressure and time in four set programs.
In the present invention, CLEANER110 solution is a kind of weakly alkaline liquid solution, is used for cleaning and adjust glass fiber and epoxy resin. Mainly comprise: mass fraction be 1.5% the material containing sodium, mass fraction be the polymeric dispersant of 1%. Scavenging period is 15min. CLEANER110 is a kind of weakly alkaline solution (pH is about 9.6).
Based on above-mentioned, the present invention, in its manufacturing process, have employed the workflow of hole metallization, lamination and Drill dirt cleaning, thus having reached the multiple-plate manufacturing cost of reduction, improve make efficiency, it is achieved that the fast circuit plate at laboratory or institute designs and makes.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all any amendment, equivalent replacement and improvement etc. made within the spirit and principles in the present invention, should be included within protection scope of the present invention.

Claims (10)

1. the technique of a quick Fabrication multilayer circuit board, it is characterised in that: comprise the steps:
(1) take dual platen thick for 1mm as inner plating, when there being hole, location, utilize the mechanical machine of ProtoMat to mill out two-sided figure;
(2) utilize chemistry hole metallization equipment that internal layer is carried out hole metallization;
(3) cured sheets is cut into certain size;
(4) respectively put two prepregs cut out in the surface of inner plating figure and underface, respectively put the Copper Foil of an attached base material at the ragged edge of prepreg up and down;
(5) option program carries out lamination;
(6) the mechanical machine drill hole of ProtoMatM60/H is utilized;
(7) chemistry hole metallization equipment is utilized to carry out hole metallization;
(8) mechanical machine is utilized to mill out two-sided figure.
2. the technique of a kind of quick Fabrication multilayer circuit board according to claim 1, it is characterised in that: described step (3) cured sheets size goes out greatly more than 5mm than each limit of inner figure, the dual platen each limit little at least 20mm thicker than whole 1mm.
3. the technique of a kind of quick Fabrication multilayer circuit board according to claim 1, it is characterised in that: prepreg Distance positioning hole at least 20mm in described step (3).
4. the technique of a kind of quick Fabrication multilayer circuit board according to claim 1, it is characterised in that: the size 20mm more than bigger than each limit of prepreg of described step (4) Copper Foil.
5. the technique of a kind of quick Fabrication multilayer circuit board according to claim 1, it is characterised in that: the method for described step (2) and step (7) mesoporous metal is: use LPKFconntac II circuit board apertures metallization machines to realize the hole metallization of dual platen.
6. the technique of a kind of quick Fabrication multilayer circuit board according to claim 1, it is characterised in that: after described step (7), the CLEANER110 solution of sheet material carries out process of deoiling.
7. the technique of a kind of quick Fabrication multilayer circuit board according to claim 6, it is characterised in that: after oil removal treatment, sheet material is mentioned in 30s from tap water and puts down 15 times.
8. the technique of a kind of quick Fabrication multilayer circuit board according to claim 6, it is characterised in that: the pH value of described CLEANER110 solution is 9-10.
9. the technique of a kind of quick Fabrication multilayer circuit board according to claim 1, it is characterised in that: sheet material is carried out burr removing operation after terminating by described step (6) boring.
10. the technique of a kind of quick Fabrication multilayer circuit board according to claim 6, it is characterised in that: the temperature of described CLEANER110 solution controls at 50-60 DEG C.
CN201610051184.3A 2016-01-25 2016-01-25 Process for rapidly fabricating multi-layer circuit board Pending CN105682379A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610051184.3A CN105682379A (en) 2016-01-25 2016-01-25 Process for rapidly fabricating multi-layer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610051184.3A CN105682379A (en) 2016-01-25 2016-01-25 Process for rapidly fabricating multi-layer circuit board

Publications (1)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107155266A (en) * 2017-06-20 2017-09-12 广州兴森快捷电路科技有限公司 Z-direction interconnection line plate and preparation method thereof
CN107741285A (en) * 2017-10-12 2018-02-27 奇酷互联网络科技(深圳)有限公司 A kind of circuit board and temperature checking method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1146068A (en) * 1997-07-28 1999-02-16 Fujitsu Ltd Evaluation of process of manufacturing multilayered interconnection board
US6105246A (en) * 1999-05-20 2000-08-22 International Business Machines Corporation Method of making a circuit board having burr free castellated plated through holes
CN104918411A (en) * 2015-05-15 2015-09-16 江门崇达电路技术有限公司 Orifice burr removing method and apparatus
CN105101685A (en) * 2015-09-02 2015-11-25 广东欧珀移动通信有限公司 Fabrication method of multi-layer printed circuit board (PCB) and multi-layer PCB

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1146068A (en) * 1997-07-28 1999-02-16 Fujitsu Ltd Evaluation of process of manufacturing multilayered interconnection board
US6105246A (en) * 1999-05-20 2000-08-22 International Business Machines Corporation Method of making a circuit board having burr free castellated plated through holes
CN104918411A (en) * 2015-05-15 2015-09-16 江门崇达电路技术有限公司 Orifice burr removing method and apparatus
CN105101685A (en) * 2015-09-02 2015-11-25 广东欧珀移动通信有限公司 Fabrication method of multi-layer printed circuit board (PCB) and multi-layer PCB

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
高有堂等: "《多层电路板快速制作工艺的研究》", 《电子工艺技术》 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107155266A (en) * 2017-06-20 2017-09-12 广州兴森快捷电路科技有限公司 Z-direction interconnection line plate and preparation method thereof
CN107155266B (en) * 2017-06-20 2020-10-23 广州兴森快捷电路科技有限公司 Z-direction interconnection circuit board and manufacturing method thereof
CN107741285A (en) * 2017-10-12 2018-02-27 奇酷互联网络科技(深圳)有限公司 A kind of circuit board and temperature checking method
CN107741285B (en) * 2017-10-12 2020-05-19 奇酷互联网络科技(深圳)有限公司 Circuit board and temperature detection method

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Application publication date: 20160615