CN105551973A - 一种添加散热片的封装件及其制造方法 - Google Patents

一种添加散热片的封装件及其制造方法 Download PDF

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CN105551973A
CN105551973A CN201510902498.5A CN201510902498A CN105551973A CN 105551973 A CN105551973 A CN 105551973A CN 201510902498 A CN201510902498 A CN 201510902498A CN 105551973 A CN105551973 A CN 105551973A
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support plate
fin
plastic
chip
packaging
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王虎
陈文钊
谢建友
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Huatian Technology Xian Co Ltd
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Huatian Technology Xian Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3672—Foil-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

本发明公开了一种添加散热片的封装件及其制造方法，所述封装件包括有载板、芯片和塑封体，所述塑封体上部连接并固化有散热片。这种结构和工艺降低了生产成本，提高了生产效率。

Description

一种添加散热片的封装件及其制造方法
技术领域
本发明属于集成电路封装领域，具体是一种添加散热片的封装件及其制造方法。
背景技术
集成电路是信息产业和高新技术的核心，集成电路封装是集成电路技术的主要组成部分。
但目前部分封装产品散热能力不足。
发明内容
对于上述现有技术存在的问题，本发明提供了一种添加散热片的封装件及其制造方法，该发明在原有散热片贴装技术上创新，使散热片和塑封体直接结合，并在一道工序中完成，大大提高了生产效率。
一种添加散热片的封装件，所述封装件包括有载板、芯片和塑封体，所述塑封体上部连接有散热片。
一种添加散热片的封装件的制造方法，具体按照如下步骤进行：
第一步：准备载板；
第二步：晶圆减薄，减薄范围为50um—250um；
第三步：划片，形成单颗芯片；
第四步：上芯，采用粘片胶将芯片连接在载板上；
第五步：压焊，采用焊线连接芯片和载板；
第六步：塑封，塑封体包围芯片、粘片胶和载板的上部，同时塑封散热片，然后固化；
第七步：打印、切割、包装。
所述第四步的粘片胶用DAF胶代替。
所述第四步到第六步用以下步骤替换：
第四步：上芯，芯片带有凸点，并通过凸点与载板连接；
第五步：塑封，塑封体包围芯片、凸点和载板的上部，同时塑封散热片，然后固化。
所述载板的下部植有锡球。
附图说明
图1为本发明中的载板图；
图2为本发明中上芯后产品剖面图；
图3为本发明中压焊后产品剖面图；
图4为本发明中塑封后剖面图；
图5-1为本发明中切割后不植球产品剖面图；
图5-2为本发明中切割后植球产品剖面图；
图6为本发明中倒装上芯后产品剖面图；
图7为本发明中塑封后产品剖面图；
图8位本发明中切割后不植球产品剖面图。
图中：1—散热片，2—塑封体，3—焊线，4—芯片，5—载板，6—锡球，7—上芯胶，8—芯片凸点。
具体实施方式
本发明公开了一种添加散热片的封装件及其制造方法，所述封装件主要由载板(框架、基板等)、粘片胶、芯片(包括带凸点芯片)、焊线(金线、铜线等)、塑封体、散热片等组成，所述芯片通过粘片胶与载板连接，焊线连接芯片和载板，塑封体连接载板和散热片；或者通过倒装封装方法完成。所述制作工艺主要工艺流程为：晶圆减薄——划片——上芯(倒装上芯)——压焊(倒装封装时不需要)——塑封及后固化(连带散热片一起塑封)——打印——植球(可选)——切割。这种工艺可以降低生产成本，提高生产效率。
一种添加散热片的封装件的制造方法，具体按照如下步骤进行：
第一步：准备载板5；如图1所示；
第二步：晶圆减薄，减薄范围为50um—250um；
第三步：划片，形成单颗芯片4；
第四步：上芯，采用粘片胶7将芯片4连接在载板5上；如图2所示；
第五步：压焊，采用焊线3连接芯片4和载板5；如图3所示；
第六步：塑封，塑封体2包围芯片4、粘片胶7和载板5的上部，同时塑封散热片1，然后固化；如图4所示；
第七步：打印、切割、包装。如图5-1、图5-2、图8所示。
所述第四步的粘片胶7用DAF胶代替。
所述第四步到第六步用以下步骤替换：
第四步：上芯，芯片4带有凸点8，并通过凸点8与载板5连接；如图6所示；
第五步：塑封，塑封体2包围芯片4、凸点8和载板5的上部，同时塑封散热片1，然后固化。如图7所示。
所述载板5的下部植有锡球6。图5-2。

Claims (5)

1.一种添加散热片的封装件，所述封装件包括有载板(5)、芯片(4)和塑封体(2)，其特征在于：所述塑封体(2)上部连接有散热片(1)。
2.一种添加散热片的封装件的制造方法，其特征在于：具体按照如下步骤进行：
第一步：准备载板(5)；
第二步：晶圆减薄，减薄范围为50um—250um；
第三步：划片，形成单颗芯片(4)；
第四步：上芯，采用粘片胶(7)将芯片(4)连接在载板(5)上；
第五步：压焊，采用焊线(3)连接芯片(4)和载板(5)；
第六步：塑封，塑封体(2)包围芯片(4)、粘片胶(7)和载板(5)的上部，同时塑封散热片(1)，然后固化；
第七步：打印、切割、包装。
3.根据权利要求2所述的一种添加散热片的封装件的制造方法，其特征在于：
所述第四步的粘片胶(7)用DAF胶代替。
4.根据权利要求2所述的一种添加散热片的封装件的制造方法，其特征在于：
所述第四步到第六步用以下步骤替换：
第四步：上芯，芯片(4)带有凸点(8)，并通过凸点(8)与载板(5)连接；
第五步：塑封，塑封体(2)包围芯片(4)、凸点(8)和载板(5)的上部，同时塑封散热片(1)，然后固化。
5.根据权利要求2或者4所述的一种添加散热片的封装件的制造方法，其特征在于：所述载板(5)的下部植有锡球(6)。
CN201510902498.5A 2015-12-09 2015-12-09 一种添加散热片的封装件及其制造方法 Pending CN105551973A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110634819A (zh) * 2019-09-27 2019-12-31 华天科技（西安）有限公司 一种带有散热片的存储类产品封装结构及制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1354500A (zh) * 2000-11-17 2002-06-19 矽品精密工业股份有限公司 薄型球栅阵列式集成电路封装的制作方法
US20080001283A1 (en) * 2006-06-29 2008-01-03 Ha Na Lee Stack package with vertically formed heat sink
CN202772125U (zh) * 2012-08-21 2013-03-06 华天科技（西安）有限公司 一种内置散热片的塑封件

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1354500A (zh) * 2000-11-17 2002-06-19 矽品精密工业股份有限公司 薄型球栅阵列式集成电路封装的制作方法
US20080001283A1 (en) * 2006-06-29 2008-01-03 Ha Na Lee Stack package with vertically formed heat sink
CN202772125U (zh) * 2012-08-21 2013-03-06 华天科技（西安）有限公司 一种内置散热片的塑封件

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110634819A (zh) * 2019-09-27 2019-12-31 华天科技（西安）有限公司 一种带有散热片的存储类产品封装结构及制造方法

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Application publication date: 20160504