CN105518637A - 用于使多个主控能在单主控总线架构中操作的方法和装置 - Google Patents

用于使多个主控能在单主控总线架构中操作的方法和装置 Download PDF

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Publication number
CN105518637A
CN105518637A CN201480049688.0A CN201480049688A CN105518637A CN 105518637 A CN105518637 A CN 105518637A CN 201480049688 A CN201480049688 A CN 201480049688A CN 105518637 A CN105518637 A CN 105518637A
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China
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master
irq
bus
data bus
inactive
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CN201480049688.0A
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Chinese (zh)
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S·森戈库
R·D·韦特费尔特
G·A·威利
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Qualcomm Inc
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Qualcomm Inc
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/378Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a parallel poll method
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3027Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/36Arbitration
    • G06F2213/3602Coding information on a single line

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Quality & Reliability (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
CN201480049688.0A 2013-09-09 2014-09-09 用于使多个主控能在单主控总线架构中操作的方法和装置 Pending CN105518637A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361875547P 2013-09-09 2013-09-09
US61/875,547 2013-09-09
US14/480,540 US9519603B2 (en) 2013-09-09 2014-09-08 Method and apparatus to enable multiple masters to operate in a single master bus architecture
US14/480,540 2014-09-08
PCT/US2014/054778 WO2015035380A1 (en) 2013-09-09 2014-09-09 Method and apparatus to enable multiple masters to operate in a single master bus architecture

Publications (1)

Publication Number Publication Date
CN105518637A true CN105518637A (zh) 2016-04-20

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CN201480049688.0A Pending CN105518637A (zh) 2013-09-09 2014-09-09 用于使多个主控能在单主控总线架构中操作的方法和装置

Country Status (6)

Country Link
US (1) US9519603B2 (enExample)
EP (1) EP3044686A1 (enExample)
JP (1) JP6190068B2 (enExample)
KR (1) KR20160053940A (enExample)
CN (1) CN105518637A (enExample)
WO (1) WO2015035380A1 (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106874228A (zh) * 2017-01-23 2017-06-20 中航光电科技股份有限公司 基于i2c总线的控制器及通信方法、多控制器间的通信方法
CN108280041A (zh) * 2017-12-29 2018-07-13 武汉船舶通信研究所(中国船舶重工集团公司第七二二研究所) 一种内部集成电路主机的通信方法和装置
CN109891946A (zh) * 2016-11-10 2019-06-14 华为技术有限公司 通信接口的唤醒方法及设备、辅助唤醒接口的标识配置方法及设备
CN110383826A (zh) * 2017-03-08 2019-10-25 索尼半导体解决方案公司 图像传感器和传输系统
CN110445700A (zh) * 2019-08-14 2019-11-12 深圳市优必选科技股份有限公司 主从机通信系统、方法及终端设备
CN115269469A (zh) * 2021-04-30 2022-11-01 爱思开海力士有限公司 改善存储器装置与控制器之间的通信的设备、系统和方法

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9921981B2 (en) * 2013-08-24 2018-03-20 Qualcomm Incorporated Method to minimize the number of IRQ lines from peripherals to one wire
US10353837B2 (en) 2013-09-09 2019-07-16 Qualcomm Incorporated Method and apparatus to enable multiple masters to operate in a single master bus architecture
US9996488B2 (en) 2013-09-09 2018-06-12 Qualcomm Incorporated I3C high data rate (HDR) always-on image sensor 8-bit operation indicator and buffer over threshold indicator
US9690725B2 (en) 2014-01-14 2017-06-27 Qualcomm Incorporated Camera control interface extension with in-band interrupt
CN105900340A (zh) 2013-10-09 2016-08-24 高通股份有限公司 CCIe协议上的错误检测能力
US9684624B2 (en) 2014-01-14 2017-06-20 Qualcomm Incorporated Receive clock calibration for a serial bus
AU2016362988B2 (en) * 2015-11-30 2022-03-31 Hubbell Incorporated Interrupt exception window protocol on a data communication bus and methods and apparatuses for using same
US20170255588A1 (en) * 2016-03-07 2017-09-07 Qualcomm Incorporated Multiprotocol i3c common command codes
WO2017172269A1 (en) * 2016-03-31 2017-10-05 Qualcomm Incorporated Method and apparatus to enable multiple masters to operate in a single master bus architecture
US10176129B2 (en) 2016-06-22 2019-01-08 Novatek Microelectronics Corp. Control method for I2C device of I2C system and I2C device using the same
US10693674B2 (en) 2018-01-29 2020-06-23 Qualcomm Incorporated In-datagram critical-signaling using pulse-count-modulation for I3C bus
CN109902055B (zh) * 2019-01-16 2023-01-10 北京左江科技股份有限公司 一种适用窄带数据网络的slip编码数据流传输方法
CN111984576B (zh) * 2019-05-24 2022-03-22 鸿富锦精密电子(天津)有限公司 数据通信系统以及方法
CN113965307A (zh) * 2020-07-20 2022-01-21 广州汽车集团股份有限公司 一种基于仲裁线的全双工spi通信方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4546351A (en) * 1981-10-18 1985-10-08 Tokyo Shibaura Denki Kabushiki Kaisha Data transmission system with distributed microprocessors
US5581770A (en) * 1992-06-04 1996-12-03 Mitsubishi Denki Kabushiki Kaisha Floating interruption handling system and method
CN102591834A (zh) * 2010-12-02 2012-07-18 捷讯研究有限公司 单线总线系统

Family Cites Families (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4695945A (en) 1985-02-28 1987-09-22 International Business Machines Corporation Processor I/O and interrupt filters allowing a co-processor to run software unknown to the main processor
GB2173929A (en) 1985-04-20 1986-10-22 Itt Ind Ltd Computer systems
US5088024A (en) * 1989-01-31 1992-02-11 Wisconsin Alumni Research Foundation Round-robin protocol method for arbitrating access to a shared bus arbitration providing preference to lower priority units after bus access by a higher priority unit
JPH0817394B2 (ja) * 1989-09-14 1996-02-21 松下電工株式会社 時分割多重伝送システムの割込処理方式
US5613128A (en) 1990-12-21 1997-03-18 Intel Corporation Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller
JPH05282244A (ja) * 1992-04-03 1993-10-29 Shikoku Nippon Denki Software Kk 情報処理装置
US5321818A (en) 1992-05-12 1994-06-14 Hughes Aircraft Company System for arbitrating for access on VME bus structures
US5376928A (en) 1992-09-18 1994-12-27 Thomson Consumer Electronics, Inc. Exchanging data and clock lines on multiple format data buses
US5530875A (en) * 1993-04-29 1996-06-25 Fujitsu Limited Grouping of interrupt sources for efficiency on the fly
JPH06337843A (ja) 1993-05-28 1994-12-06 Fujitsu Ltd データ転送制御方法
US6532506B1 (en) 1998-08-12 2003-03-11 Intel Corporation Communicating with devices over a bus and negotiating the transfer rate over the same
US6253268B1 (en) 1999-01-15 2001-06-26 Telefonaktiebolaget L M Ericsson (Publ) Method and system for multiplexing a second interface on an I2C interface
US6609167B1 (en) 1999-03-17 2003-08-19 Adaptec, Inc. Host and device serial communication protocols and communication packet formats
US6839393B1 (en) 1999-07-14 2005-01-04 Rambus Inc. Apparatus and method for controlling a master/slave system via master device synchronization
US6704823B1 (en) * 2000-07-20 2004-03-09 International Business Machines Corporation Method and apparatus for dynamic allocation of interrupt lines through interrupt sharing
US7089338B1 (en) 2002-07-17 2006-08-08 Cypress Semiconductor Corp. Method and apparatus for interrupt signaling in a communication network
DE10250616C1 (de) 2002-10-30 2003-11-20 Siemens Ag Bordnetz
DE602004026195D1 (de) * 2004-10-21 2010-05-06 Hewlett Packard Development Co Serielles Bussystem
US20070088874A1 (en) 2005-10-14 2007-04-19 Hewlett-Packard Development Company, L.P. Offload engine as processor peripheral
US8185680B2 (en) * 2006-02-06 2012-05-22 Standard Microsystems Corporation Method for changing ownership of a bus between master/slave devices
US7707349B1 (en) 2006-06-26 2010-04-27 Marvell International Ltd. USB isochronous data transfer for a host based laser printer
US8223796B2 (en) 2008-06-18 2012-07-17 Ati Technologies Ulc Graphics multi-media IC and method of its operation
US8103803B2 (en) 2008-11-21 2012-01-24 Nvidia Corporation Communication between a processor and a controller
US8549198B2 (en) 2009-03-27 2013-10-01 Schneider Electric It Corporation Communication protocol
JP2012194829A (ja) * 2011-03-17 2012-10-11 Digital Electronics Corp マスタデバイスおよびバスシステム
US8819170B2 (en) 2011-07-14 2014-08-26 Schneider Electric It Corporation Communication protocols
EP2764443B1 (en) 2011-10-05 2022-11-30 Analog Devices, Inc. Two-wire communication system for high-speed data and power distribution
WO2013070215A1 (en) * 2011-11-09 2013-05-16 Intel Corporation Apparatus for multiple bus master engines to share the same request channel to a pipelined backbone
US20150254198A1 (en) * 2013-03-15 2015-09-10 Google Inc. Methods and apparatus related to bus arbitration within a multi-master system
US9639499B2 (en) * 2013-06-12 2017-05-02 Qualcomm Incorporated Camera control interface extension bus
US9137008B2 (en) 2013-07-23 2015-09-15 Qualcomm Incorporated Three phase clock recovery delay calibration
US9921981B2 (en) * 2013-08-24 2018-03-20 Qualcomm Incorporated Method to minimize the number of IRQ lines from peripherals to one wire
US20150095537A1 (en) 2013-10-02 2015-04-02 Qualcomm Incorporated Camera control interface sleep and wake up signaling
US9690725B2 (en) 2014-01-14 2017-06-27 Qualcomm Incorporated Camera control interface extension with in-band interrupt
US10353837B2 (en) 2013-09-09 2019-07-16 Qualcomm Incorporated Method and apparatus to enable multiple masters to operate in a single master bus architecture
US9892077B2 (en) * 2013-10-07 2018-02-13 Qualcomm Incorporated Camera control interface slave device to slave device communication
KR20160066032A (ko) 2013-10-08 2016-06-09 퀄컴 인코포레이티드 공유 제어 데이터 버스에서의 i2c 슬레이브 디바이스들과 카메라 제어 인터페이스 확장 디바이스들의 공존
CN105900340A (zh) 2013-10-09 2016-08-24 高通股份有限公司 CCIe协议上的错误检测能力
JP6277267B2 (ja) * 2013-10-09 2018-02-07 クアルコム,インコーポレイテッド CCIeバスを介したスレーブ識別子スキャニングおよびホットプラグ能力
US9684624B2 (en) 2014-01-14 2017-06-20 Qualcomm Incorporated Receive clock calibration for a serial bus
US20150248373A1 (en) 2014-02-28 2015-09-03 Qualcomm Incorporated Bit allocation over a shared bus to facilitate an error detection optimization
US9319178B2 (en) * 2014-03-14 2016-04-19 Qualcomm Incorporated Method for using error correction codes with N factorial or CCI extension
US9734121B2 (en) * 2014-04-28 2017-08-15 Qualcomm Incorporated Sensors global bus
US9904637B2 (en) * 2014-11-26 2018-02-27 Qualcomm Incorporated In-band interrupt time stamp

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4546351A (en) * 1981-10-18 1985-10-08 Tokyo Shibaura Denki Kabushiki Kaisha Data transmission system with distributed microprocessors
US5581770A (en) * 1992-06-04 1996-12-03 Mitsubishi Denki Kabushiki Kaisha Floating interruption handling system and method
CN102591834A (zh) * 2010-12-02 2012-07-18 捷讯研究有限公司 单线总线系统

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109891946A (zh) * 2016-11-10 2019-06-14 华为技术有限公司 通信接口的唤醒方法及设备、辅助唤醒接口的标识配置方法及设备
CN109891946B (zh) * 2016-11-10 2021-06-22 华为技术有限公司 通信接口的唤醒方法及设备、辅助唤醒接口的标识配置方法及设备
CN106874228A (zh) * 2017-01-23 2017-06-20 中航光电科技股份有限公司 基于i2c总线的控制器及通信方法、多控制器间的通信方法
CN110383826A (zh) * 2017-03-08 2019-10-25 索尼半导体解决方案公司 图像传感器和传输系统
US11202033B2 (en) 2017-03-08 2021-12-14 Sony Semiconductor Solutions Corporation Image sensor and transmission system with collision detection based on state of collision detection line
CN110383826B (zh) * 2017-03-08 2022-06-07 索尼半导体解决方案公司 图像传感器和传输系统
CN108280041A (zh) * 2017-12-29 2018-07-13 武汉船舶通信研究所(中国船舶重工集团公司第七二二研究所) 一种内部集成电路主机的通信方法和装置
CN108280041B (zh) * 2017-12-29 2020-03-10 武汉船舶通信研究所(中国船舶重工集团公司第七二二研究所) 一种内部集成电路主机的通信方法和装置
CN110445700A (zh) * 2019-08-14 2019-11-12 深圳市优必选科技股份有限公司 主从机通信系统、方法及终端设备
CN110445700B (zh) * 2019-08-14 2021-12-17 深圳市优必选科技股份有限公司 主从机通信系统、方法及终端设备
CN115269469A (zh) * 2021-04-30 2022-11-01 爱思开海力士有限公司 改善存储器装置与控制器之间的通信的设备、系统和方法

Also Published As

Publication number Publication date
US20150074305A1 (en) 2015-03-12
WO2015035380A1 (en) 2015-03-12
KR20160053940A (ko) 2016-05-13
JP6190068B2 (ja) 2017-08-30
JP2016530653A (ja) 2016-09-29
EP3044686A1 (en) 2016-07-20
US9519603B2 (en) 2016-12-13

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