CN105491818A - Manufacturing method for buried circuit board with high alignment precision - Google Patents
Manufacturing method for buried circuit board with high alignment precision Download PDFInfo
- Publication number
- CN105491818A CN105491818A CN201510823613.XA CN201510823613A CN105491818A CN 105491818 A CN105491818 A CN 105491818A CN 201510823613 A CN201510823613 A CN 201510823613A CN 105491818 A CN105491818 A CN 105491818A
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- China
- Prior art keywords
- hole
- positioning
- circuit board
- aligning accuracy
- manufacturing circuit
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/166—Alignment or registration; Control of registration
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The invention discloses a manufacturing method for a buried circuit board with a high alignment precision. The manufacturing method comprises the following steps of providing a detachable carrier; processing a target bonding pad on the detachable carrier; forming at least a first positioning through hole and multiple open windows in the detachable carrier, wherein the first positioning through hole passes through the target bonding pad; processing blind holes in the multiple open windows through the positioning of the first positioning through holes to form a circuitous pattern; and re-drilling the first positioning through hole to form a second positioning through hole, and separating the detachable carrier into two pieces of base plates. The problem that the high energy laser beam is relatively high in random position offset and the alignment precision between the blind holes and the bonding pads is affected is well solved; the alignment capability with minus and plus 12 [mu]m error precision for the blind holes and the bonding pads is achieved; the percent of pass of the base plate manufacturing and the product reliability are greatly improved; and in addition, the intensity of the circuits and the blind holes of the base plates in design is increased.
Description
Technical field
The present invention relates to coreless substrate manufacturing technology field, what especially relate to a kind of high aligning accuracy buries method for manufacturing circuit board.
Background technology
Along with semiconductor package product is towards high-performance, slimming and low cost future development, expedite the emergence of coreless substrate Coreless technology.In recent years, coreless substrate, due to the advantage of " thinner lighter, the degree of freedom, the low cost that improve electrical characteristic and wires design ", demonstrates good market prospects.Current industry main flow be designed to the thin pdm substrate of 3LCoreless/2LETS and 1.5LETS/1L without central layer; Because road of sunkening cord (ETS) printed line is wide not by etch effects, adopt conventional MASP to improve half addition flow process and just can make 15/15um or 18/18um circuit, improve circuit adhesion unlike material, special microetch liquid medicine etc. such as the extra ABF of SAP half addition requirements of process, there is stronger cost advantage in fine-line making; In addition, to sunken cord road and PP surface maintains an equal level, line pad evenness is splendid, in Flip-Chip Using process, has better reliability.For giving full play to the advantage of burying wiring board ETS, its circuit and blind hole design meeting more crypto set, blind hole weld-ring design will be more and more less (≤25um), for avoiding the reliability that blind hole breaks ring, deviation problem affects follow-up chip package, this requires that the high accuracy contraposition of blind hole and pad controls at +/-12 ~ 15um; Except laser drill and the intrinsic aligning accuracy of circuit exposure sources control, the crucial alignment method being also a kind of best laser drill and circuit making, get rid of other factors as far as possible, reach realize stable, high accuracy control blind hole and pad +/-12um to capability.
Summary of the invention
Based on this, the invention reside in the defect overcoming prior art, what provide a kind of high aligning accuracy buries method for manufacturing circuit board, realize control errors at the blind hole of ± 12 μm and pad to capability, increase circuit and blind hole design closeness, and qualification rate and the reliability of substrate manufacture can be improved.
Its technical scheme is as follows:
High aligning accuracy bury a method for manufacturing circuit board, comprise the steps:
Separable carrier is provided;
Described separable carrier processes target pad;
Described separable carrier is formed at least one first positioning through hole and multiplely to window, and described first positioning through hole is through described target pad;
By described first positioning through hole location, the place of windowing processes blind hole described in multiple, forms circuitous pattern;
Return described first positioning through hole of brill and form the second positioning through hole, being separated described separable carrier is 2 pieces of substrates.
Further, described separable carrier comprises center tree lipid layer, and the thick copper layer set gradually from inside to outside along the upper and lower side of described center tree lipid layer and thin copper layer.
Further, when processing described target pad, be also included on described thin copper layer and be processed to form first line figure and the second line pattern, its concrete steps are as follows:
On thin copper layer, dry film exposure, forms first line figure and the second line pattern, and described target pad is formed at the edge near described thin copper layer;
Graphic plating is carried out to substrate;
Adopt etching solution to etch thin copper layer, dry film is removed;
First line figure and the second line pattern laminated bonding internal layer prepreg and outer copper foil.
Further, when forming described first positioning through hole, located the center of described target pad by x-ray, and shaped by drilling.
Further, the diameter range of described target pad is 1 ~ 4.5mm.
Further, the concrete steps forming described blind hole are as follows:
Positioned by described first positioning through hole, on thin copper layer dry film exposure, etch described in window;
In described place's laser drill of windowing to described first line figure and the second line pattern, form described blind hole.
Further, the step forming described circuitous pattern is as follows:
Conductive layer is formed in described blind hole by heavy copper;
Dry film exposure on the electrically conductive, graphic plating forms described circuitous pattern.
Further, the surely logical hole, position of described first positioning through hole and described second is coaxially arranged.
Further, the diameter of described first positioning through hole is 1 ~ 2.5mm.
Further, the diameter of described second positioning through hole is 4.5 ~ 8.5mm.
Beneficial effect of the present invention is:
The method for manufacturing circuit board that buries of above-mentioned high aligning accuracy passes through to produce target pad on described carrier of separating, located by described target pad and process described first positioning through hole, window described in being made by the precision positioning of described first positioning through hole, process described blind hole by little energy laser afterwards and form described circuitous pattern, said method by " little energy laser beams cannot destroy described in window place Copper Foil " design principle, solve high energy laser beam random offset position very well larger, affect the problem of blind hole and pad aligning accuracy, achieve in blind hole and pad ± 12 μm error precision to capability, drastically increase qualification rate and the product reliability of substrate manufacture, in addition, too increase circuit and the blind hole design closeness of substrate.
Accompanying drawing explanation
Fig. 1 is the flow chart burying method for manufacturing circuit board of the high aligning accuracy described in the embodiment of the present invention;
The technique of what Fig. 2 ~ Figure 10 was the high aligning accuracy described in the embodiment of the present invention bury method for manufacturing circuit board makes cutaway view.
Description of reference numerals:
100, separable carrier, 120, thick copper layer, 140, thin copper layer, 142, window, 144, blind hole, 200, first line figure, the 300, second line pattern, 400, target pad, 500, Copper Foil, 600, prepreg, the 700, first positioning through hole, 720, conductive layer, the 740, second positioning through hole.
Embodiment
Below embodiments of the invention are described in detail:
As shown in Figure 1, a kind of high aligning accuracy bury method for manufacturing circuit board, comprise the steps:
Separable carrier 100 is provided;
Described separable carrier 100 processes target pad 400;
Described separable carrier 100 is formed at least one first positioning through hole 700 and multiplely windows 142, and described first positioning through hole 700 is through described target pad 400;
Located by described first positioning through hole 700,142 places of windowing described in multiple process blind hole 144, form circuitous pattern;
Return described first positioning through hole 700 of brill and form the second positioning through hole 740, being separated described separable carrier 100 is 2 pieces of substrates.
Wherein, in order to realize the processing of high-precision location, first be on described carrier of separating, produce target pad 400 by a series of processing technologys such as dry film, exposure, graphic platings, specifically, described target pad 400 structure circlewise on described carrier of separating, in the preferred embodiment of the invention, described separable carrier 100 comprises center tree lipid layer, and the thick copper layer 120 set gradually from inside to outside along the upper and lower side of described center tree lipid layer and thin copper layer 140.Located by described target pad 400 and process described first positioning through hole 700, when forming described first positioning through hole 700, the center of described target pad 400 is located by x-ray, and shaped by drilling, specifically, processed by machine drilling or laser drill, its principle is that x-ray ray beam can penetrate copper metal layer, develop the image of described target pad 400 of circulus, just can locate the processing that described first positioning through hole 700 is carried out at its center, this positioning method accuracy, reliability are high.But should be understood that; in reality processing; the forming mode of described first positioning through hole 700 is not limited in above-mentioned two kinds of processing modes; in addition, for the ease of processing, the diameter preferable range of described first positioning through hole 700 is 1 ~ 2.5mm; the diameter range of described target pad 400 is 1 ~ 4.5mm; but being not the restriction to protection range, can be also other numerical value, in other embodiments also in protection scope of the present invention.
142 are windowed described in being processed by the precision positioning of described first positioning through hole 700, specifically, described windowing 142 is on described thin copper layer 140, produce groove by the processing method of drilling, and ensure that the degree of depth of this groove equals the thickness of described thin copper layer 140, afterwards by little energy laser beam described window 142 position correspondence process described blind hole 144, its operation principle is just, after carrying out location, accurate position by described first positioning through hole 700, rely on the laser beam that energy is less, and ensure that the diameter of laser beam is wider than the diameter of described blind hole 144, the effect that so can reach is because the energy of laser beam is less, thin copper layer 140 material of windowing described in can not melting near 142, and the material of dispelling described center tree lipid layer can only be processed, thus described blind hole 144 is formed, the concrete steps forming described blind hole 144 are as follows:
Positioned by described first positioning through hole 700, on thin copper layer 140 dry film exposure, etch described in window 142;
In described 142 place's laser drill of windowing to described first line figure 200 and the second line pattern 300, form described blind hole 144.
Said method is by the design principle of " little energy laser beams cannot destroy described in window 142 place's Copper Foils 500 ", solve high energy laser beam random offset position very well larger, affect the problem of blind hole 144 and pad aligning accuracy, achieve in blind hole 144 and pad ± 12 μm error precision to capability, drastically increase qualification rate and the product reliability of substrate manufacture, in addition, the circuit and the blind hole 144 that too increase substrate design closeness.In another preferred embodiment; when carrying out the making of described first positioning through hole 700; the technical scheme that can also adopt is that the resin material in described first positioning through hole 700 is burnt by direct laser; expose the pad of first line figure 200 and the second line pattern 300; then be located through laser with this pad to carry out returning brill second positioning through hole 740; the program also can reach the effect of hi-Fix processing, also in protection scope of the present invention.
When processing described target pad 400, be also included on described thin copper layer 140 and be processed to form first line figure 200 and the second line pattern 300, its concrete steps are as follows:
On thin copper layer 140, dry film exposure, forms first line figure 200 and the second line pattern 300, and described target pad 400 is formed at the edge near described thin copper layer 140;
Graphic plating is carried out to substrate;
Adopt etching solution to etch thin copper layer 140, dry film is removed;
First line figure 200 and the second line pattern 300 laminated bonding internal layer prepreg 600 and outer copper foil 500.
After processing described blind hole 144, also need to make point diagram figure in described blind hole 144, so that form the circuit board of commercialization, the step forming described circuitous pattern is as follows:
Conductive layer 720 is formed in described blind hole 144 by heavy copper;
Dry film exposure on conductive layer 720, graphic plating forms described circuitous pattern.
After making forms foregoing circuit figure, for the ease of being separated two pieces of substrates of described center tree lipid layer upper and lower side, need to return brill once on the basis of described first positioning through hole 700, form the second positioning through hole 740 that diameter is larger, to realize the smooth separation of 2 pieces of substrates, realize the object that time processing just can form two pieces of production boards, substantially increase working (machining) efficiency.Preferably, described first positioning through hole 700 is coaxially arranged with the described second surely logical hole, position, namely, when processing described first positioning through hole 700, ensure that the center line of described second positioning through hole 740 of its processing overlaps with the center line of described first positioning through hole 700, to ensure comparatively high manufacturing accuracy.Preferably, the diameter ensureing described second positioning through hole 740 is 4.5 ~ 8.5mm., realize the separation of upper and lower 2 pieces of substrates with relevant separator easy to use, improve work convenience and efficiency.
Each technical characteristic of the above embodiment can combine arbitrarily, for making description succinct, the all possible combination of each technical characteristic in above-described embodiment is not all described, but, as long as the combination of these technical characteristics does not exist contradiction, be all considered to be the scope that this specification is recorded.
The above embodiment only have expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but can not therefore be construed as limiting the scope of the patent.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.
Claims (10)
1. high aligning accuracy bury a method for manufacturing circuit board, it is characterized in that, comprise the steps:
Separable carrier is provided;
Described separable carrier processes target pad;
Described separable carrier is formed at least one first positioning through hole and multiplely to window, and described first positioning through hole is through described target pad;
By described first positioning through hole location, the place of windowing processes blind hole described in multiple, forms circuitous pattern;
Return described first positioning through hole of brill and form the second positioning through hole, being separated described separable carrier is 2 pieces of substrates.
2. high aligning accuracy according to claim 1 bury method for manufacturing circuit board, it is characterized in that, described separable carrier comprises center tree lipid layer, and the thick copper layer set gradually from inside to outside along the upper and lower side of described center tree lipid layer and thin copper layer.
3. high aligning accuracy according to claim 2 bury method for manufacturing circuit board, it is characterized in that, when processing described target pad, be also included on described thin copper layer and be processed to form first line figure and the second line pattern, its concrete steps are as follows:
On thin copper layer, dry film exposure, forms first line figure and the second line pattern, and described target pad is formed at the edge near described thin copper layer;
Graphic plating is carried out to substrate;
Adopt etching solution to etch thin copper layer, dry film is removed;
First line figure and the second line pattern laminated bonding internal layer prepreg and outer copper foil.
4. high aligning accuracy according to claim 1 bury method for manufacturing circuit board, it is characterized in that, when forming described first positioning through hole, located the center of described target pad by x-ray, and shaped by drilling.
5. high aligning accuracy according to claim 4 bury method for manufacturing circuit board, it is characterized in that, the diameter range of described target pad is 1 ~ 4.5mm.
6. high aligning accuracy according to claim 1 bury method for manufacturing circuit board, it is characterized in that, the concrete steps forming described blind hole are as follows:
Positioned by described first positioning through hole, on thin copper layer dry film exposure, etch described in window;
In described place's laser drill of windowing to described first line figure and the second line pattern, form described blind hole.
7. high aligning accuracy according to claim 1 bury method for manufacturing circuit board, it is characterized in that, the step forming described circuitous pattern is as follows:
Conductive layer is formed in described blind hole by heavy copper;
Dry film exposure on the electrically conductive, graphic plating forms described circuitous pattern.
8. high aligning accuracy according to claim 1 bury method for manufacturing circuit board, it is characterized in that, described first positioning through hole and described second is determined through hole and is coaxially arranged.
9. high aligning accuracy according to claim 8 bury method for manufacturing circuit board, it is characterized in that, the diameter of described first positioning through hole is 1 ~ 2.5mm.
10. high aligning accuracy according to claim 8 bury method for manufacturing circuit board, it is characterized in that, the diameter of described second positioning through hole is 4.5 ~ 8.5mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510823613.XA CN105491818B (en) | 2015-11-23 | 2015-11-23 | High aligning accuracy buries method for manufacturing circuit board |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510823613.XA CN105491818B (en) | 2015-11-23 | 2015-11-23 | High aligning accuracy buries method for manufacturing circuit board |
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| CN105491818A true CN105491818A (en) | 2016-04-13 |
| CN105491818B CN105491818B (en) | 2018-12-28 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109561596A (en) * | 2018-10-17 | 2019-04-02 | 欣强电子（清远）有限公司 | A kind of choosingization dry film, the fool proof tooling for selecting allelopathic gloss oil |
| CN113225938A (en) * | 2021-03-25 | 2021-08-06 | 胜宏科技（惠州）股份有限公司 | Method for manufacturing thermoelectric separation circuit board |
| CN114900962A (en) * | 2022-04-18 | 2022-08-12 | 广州广芯封装基板有限公司 | Printed circuit board and layer adding method thereof |
| CN115023033A (en) * | 2021-09-18 | 2022-09-06 | 荣耀终端有限公司 | Circuit board assembly and electronic equipment |
| TWI809666B (en) * | 2022-01-18 | 2023-07-21 | 大陸商芯愛科技（南京）有限公司 | Package substrate and manufacturing method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101236943A (en) * | 2007-02-01 | 2008-08-06 | 日月光半导体制造股份有限公司 | Heat-radiation no-chip board film base plate with built-in chip and its making method |
| US20110315745A1 (en) * | 2009-12-15 | 2011-12-29 | Samsung Electro-Mechanics Co., Ltd. | Carrier for manufacturing substrate and method of manufacturing substrate using the same |
| CN104244597A (en) * | 2014-09-22 | 2014-12-24 | 华进半导体封装先导技术研发中心有限公司 | Method for manufacturing coreless substrates of symmetrical structure |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102711382B (en) * | 2012-06-14 | 2015-02-25 | 广州美维电子有限公司 | Printed circuit board (PCB) layer-by-layer para-position laser drilling method |
| CN104244584B (en) * | 2013-06-24 | 2017-05-17 | 北大方正集团有限公司 | Laser drilling alignment method |
| CN103501579A (en) * | 2013-09-29 | 2014-01-08 | 胜华电子（惠阳）有限公司 | Circuit board aligning method |
-
2015
- 2015-11-23 CN CN201510823613.XA patent/CN105491818B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101236943A (en) * | 2007-02-01 | 2008-08-06 | 日月光半导体制造股份有限公司 | Heat-radiation no-chip board film base plate with built-in chip and its making method |
| US20110315745A1 (en) * | 2009-12-15 | 2011-12-29 | Samsung Electro-Mechanics Co., Ltd. | Carrier for manufacturing substrate and method of manufacturing substrate using the same |
| CN104244597A (en) * | 2014-09-22 | 2014-12-24 | 华进半导体封装先导技术研发中心有限公司 | Method for manufacturing coreless substrates of symmetrical structure |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109561596A (en) * | 2018-10-17 | 2019-04-02 | 欣强电子（清远）有限公司 | A kind of choosingization dry film, the fool proof tooling for selecting allelopathic gloss oil |
| CN113225938A (en) * | 2021-03-25 | 2021-08-06 | 胜宏科技（惠州）股份有限公司 | Method for manufacturing thermoelectric separation circuit board |
| CN115023033A (en) * | 2021-09-18 | 2022-09-06 | 荣耀终端有限公司 | Circuit board assembly and electronic equipment |
| TWI809666B (en) * | 2022-01-18 | 2023-07-21 | 大陸商芯愛科技（南京）有限公司 | Package substrate and manufacturing method thereof |
| CN114900962A (en) * | 2022-04-18 | 2022-08-12 | 广州广芯封装基板有限公司 | Printed circuit board and layer adding method thereof |
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| Publication number | Publication date |
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| CN105491818B (en) | 2018-12-28 |
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