CN105489657A - One-way low-voltage TVS device and manufacturing method thereof - Google Patents
One-way low-voltage TVS device and manufacturing method thereof Download PDFInfo
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- CN105489657A CN105489657A CN201610100408.5A CN201610100408A CN105489657A CN 105489657 A CN105489657 A CN 105489657A CN 201610100408 A CN201610100408 A CN 201610100408A CN 105489657 A CN105489657 A CN 105489657A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 52
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 52
- 239000010703 silicon Substances 0.000 claims abstract description 52
- 239000002184 metal Substances 0.000 claims abstract description 16
- 230000003647 oxidation Effects 0.000 claims abstract description 5
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 5
- 238000002347 injection Methods 0.000 claims description 12
- 239000007924 injection Substances 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 11
- 238000005498 polishing Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 7
- 230000008020 evaporation Effects 0.000 claims description 6
- 238000001704 evaporation Methods 0.000 claims description 6
- 239000012535 impurity Substances 0.000 claims description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 3
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 230000007797 corrosion Effects 0.000 claims description 3
- 238000005260 corrosion Methods 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- 238000001459 lithography Methods 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052698 phosphorus Inorganic materials 0.000 claims description 3
- 239000011574 phosphorus Substances 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 3
- 238000010079 rubber tapping Methods 0.000 claims description 3
- 230000015556 catabolic process Effects 0.000 abstract description 11
- 238000010923 batch production Methods 0.000 abstract description 2
- 238000001465 metallisation Methods 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66128—Planar diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/868—PIN diodes
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Abstract
The invention discloses a one-way low-voltage TVS device which comprises an N-type silicon wafer. A P1 doped region and a P2 doped region are arranged in the N-type silicon wafer. An N1+ doped region is arranged in the P1doped region. An N2+ doped region is arranged in the P2 doped region. An N3+ doped region is arranged on the side, away from the P1 doped region, of the P2 doped region in the N-type silicon wafer. An oxidation layer is arranged on the front face of the N-type silicon wafer. An upper metallization electrode and an interconnection metal layer are arranged on the upper surface of the oxidation layer. An N+ doped region and a lower metallization electrode are sequentially arranged on the back face of the N-type silicon wafer. Two inverted triodes are arranged inside the one-way low-voltage TVS device, the one-way TVS device with the low breakdown voltage and low electric leakage can be manufactured by setting the reasonable magnification times by means of the triode collector-emitter breakdown principle, the problem that high electric leakage is caused by Zener breakdown during low breakdown voltage is avoided, a manufacturing method is simple and easy to implement, and the one-way low-voltage TVS device meets the requirement for batch production.
Description
Technical field
The invention belongs to semiconductor power device technology field, be specifically related to a kind of one-way low pressure TVS device and manufacture method thereof.
Background technology
The glitch such as thunder and lightning and uncertain surge current causes the damage of electronic circuit, one of Main Patterns reason having become electric equipment, therefore, must be equipped with protective device in circuit to protect fragile responsive IC and accurate electronic devices and components.
Transient Suppression Diode (TransientVoltageSuppressor, TVS), as effective protective device, makes glitch obtain effective suppression.TVS is the diode of the specific function utilizing silicon semiconductor material to make, when the high energy impact events of moment is stood at TVS pipe two ends, it can be opened rapidly, simultaneously stability surge current, voltage clamp between its two ends is numerically predetermined at one, thus electronic devices and components accurate after guaranteeing damage from the high-octane impact of transient state.
Domestic prior art production TVS device, generally on the P-type silicon sheet of low resistivity, forms a dark large-area N+ knot by the mode of diffusion, adopts the mode of grooving to isolate, adjust voltage by adjustment junction depth and doping content.But operating voltage is less than to the low pressure TVS of 6V, because now PN junction punctures the increase of middle Zener breakdown proportion, element leakage is multiplied, and is generally tens to hundreds of microampere, and this can reduce the reliability of electric equipment, causes the waste of misoperation and the energy.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of puncture voltage and all lower one-way low pressure TVS device of electrical leakage quantity and manufacture method thereof.
For solving the problems of the technologies described above, the technical solution used in the present invention is:
A kind of one-way low pressure TVS device, comprises N-type silicon chip, is provided with P in N-type silicon chip
1doped region and P
2doped region, P
1n is provided with in doped region
1 +doped region, P
2n is provided with in doped region
2 +doped region, is positioned at P
2doped region is away from P
1n is provided with in the N-type silicon chip of side, doped region
3 +doped region; The front of N-type silicon chip is provided with oxide layer, and the upper surface of oxide layer is provided with metallic electrode and interconnecting metal layer, and upper metallic electrode is by running through perforate and the N of oxide layer
1 +doped region and N
2 +the upper surface of doped region connects, and interconnecting metal layer is by running through perforate and the P of oxide layer
2doped region and N
3 +the upper surface of doped region connects; The back side of N-type silicon chip is provided with N
+doped region, N
+the back side of doped region is provided with lower metallic electrode.
Above-mentioned P
1the junction depth of doped region is greater than N
1 +the junction depth of doped region, P
2the junction depth of doped region is greater than N
2 +the junction depth of doped region.
The material of above-mentioned upper metallic electrode and interconnecting metal layer is Al, and the material of lower metallic electrode is Ti-Ni-Ag.
Manufacture the method for above-mentioned one-way low pressure TVS device, comprise the following steps:
(1) getting thickness is 250 ~ 270 μm, and resistivity is the N-type silicon chip of 0.025 ~ 0.050 Ω cm;
(2) grind with the front of wafer lapping machine to N-type silicon chip, then carry out polishing with polishing machine, the thickness of the N-type silicon chip after polishing is 195 ~ 205 μm;
(3) clean N-type silicon chip, enter high temperature dispersing furnace, wet-oxygen oxidation 3 ~ 5h at the temperature of 1100 ~ 1180 DEG C, the oxide layer that growth one deck 1.1 ~ 1.4 μm is thick;
(4) oxide layer in N-type silicon chip front is protected with photoresist, after the oxide layer corrosion at the back side is clean, remove photoresist;
(5) POCL is adopted
3gas phase doping method, to the back side pre-expansion 80 ~ 120min of N-type silicon chip at 1070 ~ 1100 DEG C of temperature, forms N
+doped region;
(6) P is carved at the front lighting of N-type silicon chip
1doped region and P
2doped region;
(7) simultaneously at P
1doped region and P
2boron impurity injection, knot are carried out in doped region, and injection condition is: dosage 9E14 ~ 9E15cm
-2, energy 75 ~ 85KeV; Knot condition is: temperature 1100 DEG C ~ 1150 DEG C, time 2 ~ 5h, junction depth 4 ~ 8 μm;
(8) N is carved at the front lighting of N-type silicon chip
1 +doped region, N
2 +doped region and N
3 +doped region;
(10) simultaneously at N
1 +doped region, N
2 +doped region and N
3 +phosphorus impurities injection, knot are carried out in doped region, and injection condition is: dosage 1E15 ~ 1E16cm
-2, energy 45 ~ 55KeV; Knot condition is: temperature 950 DEG C ~ 1050 DEG C, time 20 ~ 60min, junction depth 2 ~ 5 μm;
(11) in oxide layer, make perforate by lithography, corrode clean N simultaneously
+the oxide layer at the back side, doped region;
(12) at the upper surface of oxide layer and tapping evaporation Al, photoetching and anti-carve metallic electrode and interconnecting metal layer in rear formation, and alloy;
(13) at N
+the back side evaporation Ti-Ni-Ag of doped region, forms lower metallic electrode.
Compared with prior art, advantage of the present invention is: built-in two the inverted triodes of the present invention, transistor collector-emitter is utilized to puncture principle, by arranging rational multiplication factor, can produce that breakdown potential forces down (< 6V), the unidirectional TVS device of leak electricity low (< 1 μ A), avoid the high electrical leakage problems that traditional TVS device causes due to high concentration knot Zener breakdown when low breakdown voltage, and manufacture method is simple, adapt to the requirement of batch production.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
Fig. 1 is structural representation of the present invention;
Fig. 2 is fundamental diagram when upper metallic electrode connects positive potential in the present invention;
Fig. 3 is fundamental diagram when lower metallic electrode connects positive potential in the present invention.
Wherein, 1, N-type silicon chip, 2, P
1doped region, 3, P
2doped region, 4, N
1 +doped region, 5, N
2 +doped region, 6, N
3 +doped region, 7, oxide layer, 8, upper metallic electrode, 9, interconnecting metal layer, 10, N
+doped region, 11, lower metallic electrode, T1 or T2, inversion triode.
Embodiment:
Refer to Fig. 1, a kind of one-way low pressure TVS device, comprises N-type silicon chip 1, is provided with P in N-type silicon chip 1
1doped region 2 and P
2doped region 3, P
1n is provided with in doped region 2
1 +doped region 4, P
2n is provided with in doped region 3
2 +doped region 5, is positioned at P
2doped region 3 is away from P
1n is provided with in the N-type silicon chip 1 of side, doped region 2
3 +doped region 6; The front of N-type silicon chip 1 is provided with oxide layer 7, and the upper surface of oxide layer 7 is provided with metallic electrode 8 and interconnecting metal layer 9, and upper metallic electrode 8 is by running through perforate and the N of oxide layer 7
1 +doped region 4 and N
2 +the upper surface of doped region 5 connects, and interconnecting metal layer 9 is by running through perforate and the P of oxide layer 7
2doped region 3 and N
3 +the upper surface of doped region 6 connects; The back side of N-type silicon chip 1 is provided with N
+doped region 10, N
+the back side of doped region 10 is provided with lower metallic electrode 11.
In the present invention, P
1the junction depth of doped region 2 is greater than N
1 +the junction depth of doped region 4, P
2the junction depth of doped region 3 is greater than N
2 +the junction depth of doped region 5; The material of upper metallic electrode 8 and interconnecting metal layer 9 is Al, and the material of lower metallic electrode 11 is Ti-Ni-Ag.
Refer to Fig. 2, when upper metallic electrode 8 connects positive potential, by N
1 +doped region 4, P
1doped region 2, N-type silicon chip 1 form inversion triode T1 with by N
2 +doped region 5, P
2the inversion triode T2 that doped region 3, N-type silicon chip 1 are formed is in common emitter state, and is inverted the emitter (N of triode T2
3 +doped region 6) and base stage (P
2doped region 3) by interconnecting metal layer 9 short circuit, be inverted triode T2 without amplification, do not work.The puncture voltage of TVS device depends on the puncture voltage of being inverted triode T1 base-emitter, thus realizes the reverse breakdown characteristics of TVS device, and
principle is punctured according to triode, by rationally arranging the multiplication factor of being inverted triode T1, can realize low reverse breakdown (< 6V) and the Low dark curient level (< 1 μ A) of TVS device, now the direction of current flow of this TVS device as shown by the arrow.
Refer to Fig. 3, when metallic electrode 11 connects positive potential instantly, owing to being inverted the P of triode T1
1doped region 2 and N-type silicon chip 1 form reverse biased pn junction, and T1 does not work.And interconnecting metal layer 9 is by N-type silicon chip 1 and P
2doped region 3 short circuit, P
2doped region 3 and N
2 +doped region 5 forms positively biased PN junction, and be inverted triode T2 and be in opening state, thus realize the forward bias of TVS device, now the direction of current flow of this TVS device as shown by the arrow.
Manufacture the method for above-mentioned one-way low pressure TVS device, comprise the following steps:
(1) getting thickness is 250 ~ 270 μm, and resistivity is the N-type silicon chip 1 of 0.025 ~ 0.050 Ω cm;
(2) grind with the front of wafer lapping machine to N-type silicon chip 1, then carry out polishing with polishing machine, the thickness of the N-type silicon chip 1 after polishing is 195 ~ 205 μm;
(3) clean N-type silicon chip 1, enter high temperature dispersing furnace, wet-oxygen oxidation 3 ~ 5h at the temperature of 1100 ~ 1180 DEG C, the oxide layer that growth one deck 1.1 ~ 1.4 μm is thick;
(4) oxide layer 7 in N-type silicon chip 1 front is protected with photoresist, after the oxide layer corrosion at the back side is clean, remove photoresist;
(5) POCL is adopted
3gas phase doping method, to the back side pre-expansion 80 ~ 120min of N-type silicon chip 1 at 1070 ~ 1100 DEG C of temperature, forms N
+doped region 10;
(6) P is carved at the front lighting of N-type silicon chip 1
1doped region 2 and P
2doped region 3;
(7) simultaneously at P
1doped region 2 and P
2boron impurity injection, knot are carried out in doped region 3, and injection condition is: dosage 9E14 ~ 9E15cm
-2, energy 75 ~ 85KeV; Knot condition is: temperature 1100 DEG C ~ 1150 DEG C, time 2 ~ 5h, junction depth 4 ~ 8 μm;
(8) N is carved at the front lighting of N-type silicon chip 1
1 +doped region 4, N
2 +doped region 5 and N
3 +doped region 6;
(10) simultaneously at N
1 +doped region 4, N
2 +doped region 5 and N
3 +phosphorus impurities injection, knot are carried out in doped region 6, and injection condition is: dosage 1E15 ~ 1E16cm
-2, energy 45 ~ 55KeV; Knot condition is: temperature 950 DEG C ~ 1050 DEG C, time 20 ~ 60min, junction depth 2 ~ 5 μm;
(11) in oxide layer 7, make perforate by lithography, corrode clean N simultaneously
+the oxide layer at the back side, doped region 10;
(12) at the upper surface of oxide layer 7 and tapping evaporation Al, photoetching and anti-carve metallic electrode 8 and interconnecting metal layer 9 in rear formation, and alloy;
(13) at N
+the back side evaporation Ti-Ni-Ag of doped region 10, forms lower metallic electrode 11.
This manufacture method is simple, realizes unidirectional TVS device by arranging two inversion triode T1 and T2 in N-type silicon chip 1; By rationally arranging junction depth and concentration, adjustment is inverted the multiplication factor of triode T1 to suitable, realizes the effect of the low reverse breakdown voltage of unidirectional TVS device and Low dark curient.
Claims (4)
1. an one-way low pressure TVS device, is characterized in that: comprise N-type silicon chip, is provided with P in described N-type silicon chip
1doped region and P
2doped region, described P
1n is provided with in doped region
1 +doped region, described P
2n is provided with in doped region
2 +doped region, is positioned at described P
2doped region is away from P
1n is provided with in the N-type silicon chip of side, doped region
3 +doped region; The front of described N-type silicon chip is provided with oxide layer, and the upper surface of described oxide layer is provided with metallic electrode and interconnecting metal layer, and described upper metallic electrode is by running through perforate and the N of oxide layer
1 +doped region and N
2 +the upper surface of doped region connects, and described interconnecting metal layer is by running through perforate and the P of oxide layer
2doped region and N
3 +the upper surface of doped region connects; The back side of described N-type silicon chip is provided with N
+doped region, described N
+the back side of doped region is provided with lower metallic electrode.
2. a kind of one-way low pressure TVS device according to claim 1, is characterized in that: described P
1the junction depth of doped region is greater than N
1 +the junction depth of doped region, described P
2the junction depth of doped region is greater than N
2 +the junction depth of doped region.
3. a kind of one-way low pressure TVS device according to claim 1, is characterized in that: the material of described upper metallic electrode and interconnecting metal layer is Al, and the material of described lower metallic electrode is Ti-Ni-Ag.
4. manufacture a method for one-way low pressure TVS device according to any one of claims 1 to 3, it is characterized in that: comprise the following steps:
(1) getting thickness is 250 ~ 270 μm, and resistivity is the N-type silicon chip of 0.025 ~ 0.050 Ω cm;
(2) grind with the front of wafer lapping machine to N-type silicon chip, then carry out polishing with polishing machine, the thickness of the N-type silicon chip after polishing is 195 ~ 205 μm;
(3) clean N-type silicon chip, enter high temperature dispersing furnace, wet-oxygen oxidation 3 ~ 5h at the temperature of 1100 ~ 1180 DEG C, the oxide layer that growth one deck 1.1 ~ 1.4 μm is thick;
(4) oxide layer in N-type silicon chip front is protected with photoresist, after the oxide layer corrosion at the back side is clean, remove photoresist;
(5) POCL is adopted
3gas phase doping method, to the back side pre-expansion 80 ~ 120min of N-type silicon chip at 1070 ~ 1100 DEG C of temperature, forms N
+doped region;
(6) P is carved at the front lighting of N-type silicon chip
1doped region and P
2doped region;
(7) simultaneously at P
1doped region and P
2boron impurity injection, knot are carried out in doped region, and injection condition is: dosage 9E14 ~ 9E15cm
-2, energy 75 ~ 85KeV; Knot condition is: temperature 1100 DEG C ~ 1150 DEG C, time 2 ~ 5h, junction depth 4 ~ 8 μm;
(8) N is carved at the front lighting of N-type silicon chip
1 +doped region, N
2 +doped region and N
3 +doped region;
(10) simultaneously at N
1 +doped region, N
2 +doped region and N
3 +phosphorus impurities injection, knot are carried out in doped region, and injection condition is: dosage 1E15 ~ 1E16cm
-2, energy 45 ~ 55KeV; Knot condition is: temperature 950 DEG C ~ 1050 DEG C, time 20 ~ 60min, junction depth 2 ~ 5 μm;
(11) in oxide layer, make perforate by lithography, corrode clean N simultaneously
+the oxide layer at the back side, doped region;
(12) at the upper surface of oxide layer and tapping evaporation Al, photoetching and anti-carve metallic electrode and interconnecting metal layer in rear formation, and alloy;
(13) at N
+the back side evaporation Ti-Ni-Ag of doped region, forms lower metallic electrode.
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| CN201610100408.5A CN105489657B (en) | 2016-02-24 | 2016-02-24 | A kind of one-way low pressure TVS device and manufacture method thereof |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018113583A1 (en) * | 2016-12-19 | 2018-06-28 | 东莞市阿甘半导体有限公司 | Unidirectional tvs structure and manufacturing method therefor |
| CN108922920A (en) * | 2018-08-06 | 2018-11-30 | 上海长园维安微电子有限公司 | A kind of unidirectional TVS device of big surge and its manufacturing method |
| CN111128698A (en) * | 2019-12-26 | 2020-05-08 | 安徽芯旭半导体有限公司 | Novel diffusion process of TVS chip |
| CN111540711A (en) * | 2020-05-09 | 2020-08-14 | 捷捷半导体有限公司 | Method for manufacturing unidirectional negative resistance ESD protection device and unidirectional negative resistance ESD protection device |
| CN115863443A (en) * | 2022-12-16 | 2023-03-28 | 扬州国宇电子有限公司 | Transient voltage suppression diode and preparation method thereof |
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| CN101930975A (en) * | 2008-10-01 | 2010-12-29 | 万国半导体有限公司 | Optimized configurations to integrate steering diodes in low capacitance transient voltage suppressor (tvs) |
| US20100237356A1 (en) * | 2009-03-20 | 2010-09-23 | Cree , Inc. | Bidirectional silicon carbide transient voltage suppression devices |
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| US20140319598A1 (en) * | 2013-04-24 | 2014-10-30 | Madhur Bobde | Optimized configurations to integrate steering diodes in low capacitance transient voltage suppressor (TVS) |
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| WO2018113583A1 (en) * | 2016-12-19 | 2018-06-28 | 东莞市阿甘半导体有限公司 | Unidirectional tvs structure and manufacturing method therefor |
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| CN111540711B (en) * | 2020-05-09 | 2024-05-14 | 捷捷半导体有限公司 | Method for manufacturing unidirectional negative resistance ESD protection device and unidirectional negative resistance ESD protection device |
| CN115863443A (en) * | 2022-12-16 | 2023-03-28 | 扬州国宇电子有限公司 | Transient voltage suppression diode and preparation method thereof |
| CN115863443B (en) * | 2022-12-16 | 2023-11-24 | 扬州国宇电子有限公司 | Transient voltage suppression diode and preparation method thereof |
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