CN103035746B - Current regulative diode and manufacturing method thereof - Google Patents
Current regulative diode and manufacturing method thereof Download PDFInfo
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- CN103035746B CN103035746B CN201310001966.2A CN201310001966A CN103035746B CN 103035746 B CN103035746 B CN 103035746B CN 201310001966 A CN201310001966 A CN 201310001966A CN 103035746 B CN103035746 B CN 103035746B
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Abstract
The invention discloses a current regulative diode and a manufacturing method thereof. The current regulative diode comprises a substrate with a drain region, wherein an epitaxial layer is formed on the substrate, and a source region is formed on the upper surface of the epitaxial layer. Slots are respectively formed in the epitaxial layer on two sides of the source region, and the slots are filled with oxide and polycrystalline forming grid regions. The manufacturing method comprises the following steps: feeding; epitaxial growth; a surface oxidation layer; surface slotting; surface oxidation layer stripping, oxidation in the slots; polycrystalline filling in the slots, surface polycrystalline etching; surface oxidation layer deposition; contact hole etching; source injection, and junction depth pushing, aluminum evaporation, and aluminum corrosion; and back thinning, and back silver. The current regulative diode with a new structure adopts a mature slotting process to replace the traditional P type diffused junction to reduce the width of grid from 1.5 microns to below 0.5 microns. Compared with the traditional type, the passed current can be larger than over 30 percent, and the lost is lower. The processing is easily controlled, and the yield is stabler.
Description
Technical field
The present invention relates to a kind of current regulator diode and manufacture method thereof, belong to diode technologies field.
Background technology
Current regulator diode (CRD) is the semiconductor constant current device come out in recent years, in very wide voltage range, export constant electric current, has very high motional impedance.And only have two electrodes, very convenient extend current in parallel, series connection expansion voltage.Because its constant current performance is good, structure simple, price is lower, easy to use, has therefore been widely used in the protective circuit of constant-current source, source of stable pressure, amplifier and electronic instrument at present, and has been widely used in the LED current qualifying part in LED illumination.
Conventional constant current diode is the junction field effect transistor work utilizing grid source short circuit.Convenient in order to describe, compose a piece of writing for N-type constant current tube below, will mix exactly for P type constant current tube and change corresponding transoid impurity (N-type is mutually corresponding with P type) into.The grid 1(gate of the p type impurity on surface) and N-type impurity source electrode 2(source) be shorted together, the back side is on substrate (sub) 5 material of dense N-type (N+), uniform low concentration N-type (N-) epitaxial loayer 4(epi) the drain electrode 7(drain that forms).Its structural principle as shown in Figure 1.When adding forward voltage when between the grid 1 of drain electrode 7 and short circuit, electric current flows to the source electrode 2 on surface from drain electrode 7.Whole process of establishing is divided into three parts: one, when drain electrode 7 voltage is very low, due to the existence of the grid 1 of P type, the adjustment being subject to drain electrode 7 voltage to the path of the stream electric current of source electrode 2 from drain electrode 7 is fixing, be exactly the so one section of epitaxial loayer between two adjacent grids, electric current increases along with drain-source voltage and becomes large.Two, along with the increase of drain-source voltage, between the N-of P-type grid electrode and drain electrode, form depletion layer, reduce the path of electric current, weaken the amplitude that electric current increases with drain-source voltage like this.Three, when drain-source voltage is increased to a critical value, the N-epitaxial loayer between two grids is completely depleted, and the electric current between drain-source reaches critical value, and electric current is no longer along with voltage increases.Device enters constant current operation district.
Its manufacture method is on the backing material of dense N-type (N+), first makes the N-type epitaxy layer of uniform low concentration.Then the grid of P type and the source electrode of N-type is made on surface.The electrode of metal is made again on surface and the back side.Substrate is as the drain region of diode.
Summary of the invention
The defect that the present invention seeks to exist for prior art provides a kind of current regulator diode and manufacture method thereof.
The present invention for achieving the above object, adopt following technical scheme: a kind of current regulator diode, comprise the substrate being formed with drain region, be formed with epitaxial loayer over the substrate, surface forms source area on said epitaxial layer there, the epitaxial loayer of both sides, described source area also offers groove respectively, in described groove, is filled with oxide and polycrystalline formation gate regions.
Preferably, described current regulator diode is N-type current regulator diode or P type current regulator diode.
Manufacture a method for current regulator diode, comprise the steps:
1.) feed intake: for N-type current regulator diode, mix arsenic or mix antimony silicon substrate material, resistivity is at 0.005ohmcm and following; For P type current regulator diode, adopt boron-doping silicon substrate material, resistivity 0.007 ohmcm and following;
2.) epitaxial growth: the N-type epitaxy layer of growth predetermined thickness and concentration; For P type current regulator diode, the P type epitaxial loayer of growth predetermined thickness and concentration;
3.) surface oxide layer: the oxide layer forming predetermined thickness on surface, object forms the barrier layer of slotting below, and thickness is between 0.15um-1.2um;
4.) fluting photoetching, etching oxidation layer: exposed by surface-coated photoresist, the graph copying that will slot on the photoresist on oxide layer surface; By the stop of photoresist and not stopping of exposure position, etch surface oxide layer, wherein, the oxide layer having photoresist to stop is retained;
5.) remove photoresist: stripper surface photoresist, by step 4.) and 5.), the graph copying that will slot is on surface oxide layer; The oxide layer at the place of fluting is removed, and exposes silicon; Do not slot place, silicon face in steps 3.) in oxide layer;
6. groove etched: by having the corrosion of the corrosive gas of silicon, the position silicon etching of the silicon exposed on surface falls, and forms the groove of desired depth;
7.) surface oxide layer is peeled off: remove the oxide layer that surface is all;
8.) groove internal oxidition: the dielectric layer being generated layer of silicon dioxide by oxygen under high temperature and epitaxial loayer pasc reaction;
9. poly-filled in groove: for N-type current regulator diode, the polycrystalline of dense N-type impurity is joined in superficial growth; For P type current regulator diode, the polycrystalline of dense p type impurity is joined in superficial growth, and thickness is between 0.8um-1.4um, and resistivity is less than 4ohm.cm;
10.) surperficial polycrystal etching: etching surface polycrystalline, by clean for surperficial polycrystal etching; In groove, polycrystalline has been left in groove;
11.) surface oxide layer deposit: in surface deposition layer of oxide layer, thickness is between 0.4um-1um; Object is in order to forming step 12.) hole;
12.) contact hole photoetching, contact hole etching: form hole by photoresist exposure, by clean for internal oxidation layer etching in hole, forms the position that metal contacts with silicon;
13.) source electrode injects, and knot is dark: for N-type current regulator diode, injects the N-type impurity of phosphorus or arsenic at surperficial full wafer; For P type current regulator diode, inject boron or boron difluoride p type impurity at surperficial full wafer; And by pyroprocess, form the junction depth of predetermined Impurity Diffusion, simultaneously by impurity activation;
14.) surface metalation, corrosion surface metal: at surface deposition metal level, object is the place forming electrode source electrode, gate contact;
15.) the thinning back of the body steams: substrate back is thinned to 200um-250um thickness, and the metal level of substrate back evaporation 0.9um thickness silver or titanium silver alloy, forms the drain contact of device.
Preferably, step 3.) in surface oxide layer be generated by oxygen under high temperature and epitaxial loayer pasc reaction or directly form at surface deposition.
Preferably, step 14.) in metal level be aluminium or titanium alloy.
Beneficial effect of the present invention: the current regulator diode of the new construction that the present invention proposes, replaces traditional P type diffusion junctions by the grooving processes of maturation, the width of grid is reduced to below 0.5um from 1.5um.The existence of horizontal proliferation during P type diffusion junction depth simultaneously due to conventional gate, the area of the source electrode between grid has been diminished, and the nearly step of effective area diminishes.But the fluting of new construction, formed grid time without any horizontal proliferation, source electrode area can not change.So for the new construction current regulator diode of same area and traditional comparison, the electric current that can pass through wants large more than 30%, and cost is lower.Processes process is also simple than traditional simultaneously, reduce further cost.The current regulator diode of new construction also overcomes the grid high temperature electric leakage of traditional diffusion junctions grid simultaneously, and constant current curve is also good than traditional.Processing more easily controls, and more stable between batch, volume production is more stable.
Accompanying drawing explanation
Fig. 1 is the structural representation of conventional constant current diode.
Fig. 2 is the structural representation of current regulator diode of the present invention.
Embodiment
Shown in Fig. 2, for a kind of current regulator diode, comprise the substrate 5 being formed with drain region 7, described substrate 5 is formed with epitaxial loayer 4, source area 2 is formed at described epitaxial loayer 4 upper surface, the epitaxial loayer 4 of both sides, described source area 2 also offers groove respectively, in described groove, is filled with oxide and polycrystalline formation gate regions 1.Above-mentioned current regulator diode can be N-type current regulator diode or P type current regulator diode.To mix exactly for P type current regulator diode and change corresponding transoid impurity (N-type is mutually corresponding with P type) into.
The manufacture method of current regulator diode described above comprises the steps:
1.) feed intake: mix arsenic or mix antimony silicon substrate material, resistivity is at 0.005ohm.cm and (for P type constant current tube, adopt boron-doping material, resistivity 0.007ohm.cm and following below.
2.) epitaxial growth: for N-type current regulator diode, the N-type epitaxy layer of growth certain thickness and concentration; Thickness and concentration are determined according to the requirement of withstand voltage of concrete current regulator diode; For P type current regulator diode, what grow here is P type epitaxial loayer;
3.) surface oxide layer: object will form certain thickness oxide layer on surface.Can be generated by oxygen under high temperature and epitaxial loayer pasc reaction, also can be directly at surface deposition.The object of oxide layer forms the barrier layer of slotting below.Thickness is chosen between 0.15um-1.2um.
4.) fluting photoetching, etching oxidation layer: by surface-coated photoresist, exposure, the graph copying that will slot on the photoresist on oxide layer surface; By the stop of photoresist and not stopping of exposure position, etch surface oxide layer, the oxide layer having photoresist to stop is protected, has stayed.
5.) remove photoresist: stripper surface photoresist.By step 4.) and 5.), the graph copying that will slot has arrived on surface oxide layer.Slot place oxide layer without, expose silicon; The place of not slotting, silicon face in steps 3.) oxide layer.
6. groove etched: by the corrosion of the corrosive gas of silicon, the position silicon etching of the silicon exposed on surface falls, and forms the groove of certain depth.The degree of depth of concrete groove is requirement of withstand voltage according to concrete current regulator diode and fixed.
7.) surface oxide layer is peeled off: remove the oxide layer that surface is all.
8.) groove internal oxidition: the dielectric layer that can be generated layer of silicon dioxide by oxygen under high temperature and epitaxial loayer pasc reaction.Thickness is requirement of withstand voltage according to concrete current regulator diode and fixed.
9. poly-filled in groove: for N-type current regulator diode, the polycrystalline of dense N-type impurity is joined in superficial growth; For P type current regulator diode, the polycrystalline of dense p type impurity is joined in superficial growth, and thickness is between 0.8um-1.4um, and resistivity is less than 4ohm.cm.In epontic process, can be filled up by polycrystalline in groove.
10.) surperficial polycrystal etching: etching surface polycrystalline, by clean for surperficial polycrystal etching.In groove, polycrystalline has been left in groove.
11.) surface oxide layer deposit: in surface deposition layer of oxide layer, thickness is between 0.4um-1um, and object is to form later step 12.) hole.
12.) contact hole photoetching, contact hole etching: exposed by photoresist, internal oxidation layer etching in hole is clean, forms the position that metal below contacts with silicon.
13.) source electrode injects, and knot is dark: for N-type current regulator diode, injects the N-type impurity of phosphorus or arsenic at surperficial full wafer; For P type current regulator diode, what inject here is the p type impurity such as boron or boron difluoride; And by pyroprocess, form the junction depth of certain Impurity Diffusion, simultaneously by impurity activation.
14.) surface metalation, corrosion surface metal: at surface deposition metal level can be aluminium also can be titanium and alloy.Object forms the electrode source electrode of contact, the place of gate contact.
15.) the thinning back of the body steams: substrate back is thinned to 200um-250um thickness, and substrate back evaporation 0.9um thickness silver or titanium silver alloy, form the drain contact of device.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (3)
1. manufacture a method for current regulator diode, it is characterized in that, comprise the steps:
1.) feed intake: for N type current regulator diode, mix arsenic or mix antimony silicon substrate material, resistivity is at 0.005ohmcm and following; For P type current regulator diode, adopt boron-doping silicon substrate material, resistivity 0.007 ohmcm and following;
2.) epitaxial growth: the N type epitaxial loayer of growth predetermined thickness and concentration; For P type current regulator diode, the P type epitaxial loayer of growth predetermined thickness and concentration;
3.) surface oxide layer: the oxide layer forming predetermined thickness on surface, object forms the barrier layer of slotting below, and thickness is between 0.15um-1.2um;
4.) fluting photoetching, etching oxidation layer: exposed by surface-coated photoresist, the graph copying that will slot on the photoresist on oxide layer surface; By the stop of photoresist and not stopping of exposure position, etch surface oxide layer, wherein, the oxide layer having photoresist to stop is retained;
5.) remove photoresist: stripper surface photoresist, by step 4.) and 5.), the graph copying that will slot is on surface oxide layer; The oxide layer at the place of fluting is removed, and exposes silicon; Do not slot place, silicon face in steps 3.) in oxide layer;
6. groove etched: by having the corrosion of the corrosive gas of silicon, the position silicon etching of the silicon exposed on surface falls, and forms the groove of desired depth;
7.) surface oxide layer is peeled off: remove the oxide layer that surface is all;
8.) groove internal oxidition: the dielectric layer being generated layer of silicon dioxide by oxygen under high temperature and epitaxial loayer pasc reaction;
9. poly-filled in groove: for N-type current regulator diode, the polycrystalline of dense N-type impurity is mixed in superficial growth; For P type current regulator diode, the polycrystalline of dense P type impurity is mixed in superficial growth, and thickness is between 0.8um-1.4um, and resistivity is less than 4ohm.cm;
10.) surperficial polycrystal etching: etching surface polycrystalline, by clean for surperficial polycrystal etching; In groove, polycrystalline has been left in groove;
11.) surface oxide layer deposit: in surface deposition layer of oxide layer, thickness is between 0.4um-1um; Object is in order to forming step 12.) hole;
12.) contact hole photoetching, contact hole etching: form hole by photoresist exposure, by clean for internal oxidation layer etching in hole, forms the position that metal contacts with silicon;
13.) source electrode injects, and knot is dark: for N type current regulator diode, injects the N-type impurity of phosphorus or arsenic at surperficial full wafer; For P type current regulator diode, inject boron or boron difluoride P type impurity at surperficial full wafer; And by pyroprocess, form the junction depth of predetermined Impurity Diffusion, simultaneously by impurity activation;
14.) surface metalation, corrosion surface metal: at surface deposition metal level, object forms electrode source electrode, gate contact
Place;
15.) the thinning back of the body steams: substrate back is thinned to 200um-250um thickness, substrate back evaporation 0.9um thickness silver or
The metal level of titanium silver alloy, forms the drain contact of device.
2. a kind of method manufacturing current regulator diode as claimed in claim 1, is characterized in that, step 3.) in surface oxide layer be generated by oxygen under high temperature and epitaxial loayer pasc reaction or directly form at surface deposition.
3. a kind of method manufacturing current regulator diode as claimed in claim 1, is characterized in that, step 14.) in metal level be aluminium or titanium alloy.
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| CN105448711A (en) * | 2014-07-08 | 2016-03-30 | 北大方正集团有限公司 | Constant current diode manufacturing method and constant current diode |
| CN105845795A (en) * | 2015-01-13 | 2016-08-10 | 北大方正集团有限公司 | Diode and manufacturing method therefor |
| CN105845566A (en) * | 2015-01-13 | 2016-08-10 | 北大方正集团有限公司 | Diode and manufacturing method therefor |
| CN106328515B (en) * | 2015-06-30 | 2019-11-08 | 北大方正集团有限公司 | The production method and current regulator diode of current regulator diode |
| CN106409921A (en) * | 2016-10-31 | 2017-02-15 | 电子科技大学 | Lateral current regulative diode |
| CN110534581B (en) * | 2019-09-06 | 2023-07-28 | 电子科技大学 | Semiconductor device and manufacturing method thereof |
| CN110518064B (en) * | 2019-09-06 | 2023-04-25 | 电子科技大学 | Semiconductor device and manufacturing method thereof |
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| JP2008130913A (en) * | 2006-11-22 | 2008-06-05 | Rohm Co Ltd | Semiconductor device and manufacturing method |
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| CN1591798A (en) * | 2003-07-10 | 2005-03-09 | 国际整流器公司 | Process for forming thick oxides on si or sic for semiconductor devices |
| CN101452967A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Schottky barrier diode device and manufacturing method thereof |
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Address after: No. 5, Xijin Road, Xinwu District, Wuxi City, Jiangsu Province, 214000 Patentee after: Wuxi Jingyuan Microelectronics Co.,Ltd. Address before: Room 209, building a, block 106-c, national high tech Industrial Development Zone, Wuxi City, Jiangsu Province, 214028 Patentee before: Wuxi Jingyuan Microelectronics Co.,Ltd. |