CN103247694A - Groove Schottky semiconductor device and manufacturing method thereof - Google Patents
Groove Schottky semiconductor device and manufacturing method thereof Download PDFInfo
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- CN103247694A CN103247694A CN201210027519XA CN201210027519A CN103247694A CN 103247694 A CN103247694 A CN 103247694A CN 201210027519X A CN201210027519X A CN 201210027519XA CN 201210027519 A CN201210027519 A CN 201210027519A CN 103247694 A CN103247694 A CN 103247694A
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Abstract
The invention discloses a groove Schottky semiconductor device which is a basic structure for manufacturing a power Schottky device. A cathode and an anode of the semiconductor device disclosed by the invention can be led out of the surface of the device; and the semiconductor has higher current density. The invention further provides a manufacturing method of the groove Schottky semiconductor device.
Description
Technical field
The present invention relates to a kind of trench schottky semiconductor device, the invention still further relates to the preparation method of the super pn junction p n device of a kind of Schottky.Semiconductor device of the present invention is the basic structure of making power rectifier device.
Background technology
Power semiconductor is used on power management and application of power in a large number, the semiconductor device that specially refers to schottky junction has become the important trend of device development, schottky device has that the forward cut-in voltage is low opens advantages such as turn-off speed is fast, simultaneously also to have a reverse leakage current big for schottky device, can not be applied to shortcomings such as hyperbaric environment.
Schottky diode can be by multiple different topology manufacturing, and the most frequently used is the structure of plane figure vertical conduction, and traditional planer schottky diode is influenced by chip area to have higher conducting resistance.
Summary of the invention
The present invention is directed to the problems referred to above and propose, a kind of trench schottky semiconductor device and preparation method thereof is provided.
A kind of trench schottky semiconductor device is characterized in that: comprising: substrate layer, for semi-conducting material constitutes; Drift layer is positioned on the substrate layer, is the first conductive semiconductor material; A plurality of grooves are arranged in drift layer, and trench wall is schottky barrier junction; The high concentration impurities doped region near the drift layer between groove and the groove, and keeps certain distance with groove, is the first conductive semiconductor material; Insulating barrier is positioned at the drift layer surface, for insulating material constitutes.Described channel bottom and substrate layer distance are more than or equal to the distance of groove and high concentration impurities doped region.Described schottky barrier junction is positioned at trenched side-wall and bottom.Described high concentration impurities doped region can link to each other substrate layer with device surface.The impurity concentration of described high concentration impurities doped region is suitable with the substrate layer impurity concentration.Can be provided with the second conductive semiconductor material in the top of described groove and the bottom annex drift layer material, form the guard ring of schottky barrier junction.Electrode of described semiconductor device is arranged on the schottky barrier junction surface.Another electrode of described semiconductor device can be arranged on high concentration impurities doped region surface, also can be arranged on the substrate layer back side.Described electrode is arranged on high concentration impurities doped region when surface, can realize that by metal line the anode of a plurality of schottky devices and negative electrode are interconnected at chip surface.Can the subregion between described substrate layer and the drift layer insulating material being set isolates.
A kind of preparation method of trench schottky semiconductor device is characterized in that: comprise the steps: to form the first conductive semiconductor material layer on the substrate layer surface, form a kind of dielectric material at the first conductive semiconductor material surface; Carry out lithography corrosion process, semiconductor material surface is removed the SI semi-insulation dielectric material, and etching is removed part bare semiconductor material and formed groove then; Form the high concentration impurities doped region at trench wall, form the dielectric material on high concentration impurities doped region surface; Carry out lithography corrosion process, semiconductor material surface is removed the SI semi-insulation dielectric material, and etching is removed part bare semiconductor material and formed groove then; At trench wall deposit barrier metal, form schottky barrier junction.
Semiconductor device of the present invention has than traditional planer schottky diode and has bigger conducting area, therefore has higher current density, thereby can improve the forward conduction characteristic of device.
The negative electrode of semiconductor device of the present invention and anode can be drawn from the surface of device, thereby can realize the interconnected of schottky device in chip manufacturing proces, have saved the interconnected flow process of encapsulation, reduce to have the manufacturing cost of interconnection circuit.
Semiconductor device of the present invention is when connecing reverse biased, and therefore the expansion of depletion layer horizontal direction has been saved the terminal structure of device, so can have been saved chip area, reduces the manufacturing cost of chip.
The present invention also provides the preparation method of the super pn junction p n device of a kind of Schottky.
Description of drawings
Fig. 1 is a kind of trench schottky semiconductor device generalized section of the present invention;
Wherein,
1, substrate layer;
2, drift layer;
3, high concentration impurities doped region;
4, insulating barrier;
5, schottky barrier junction;
10, anode metal layer;
11, cathodic metal layer.
Embodiment
Fig. 1 is the super pn junction p n device of a kind of Schottky of the present invention profile, describes semiconductor device of the present invention in detail below in conjunction with Fig. 1.
A kind of trench schottky semiconductor device comprises: substrate layer 1, be N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E19/CM
3Drift layer 2 is positioned on the substrate layer 1, is N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E15/CM
3, thickness is 8um; High concentration impurities doped region 3 is positioned on the substrate layer 1, is the semiconductor polycrystal silicon materials of N conduction type, and the doping content of phosphorus atoms is 1E18/CM
3Insulating barrier 4 is positioned on the drift layer 2, is the semiconductor silicon material oxide; Schottky barrier junction 5 is positioned at the trench wall surface, is the silicide of semiconductor silicon material and barrier metal formation, and schottky barrier junction 5 is 3um with high concentration impurities doped region 3 distances, and schottky barrier junction 5 is 3um with the distance of substrate layer 1; The device upper surface is with surface metal-layer, for device is drawn anode metal layer 10 and cathodic metal layer 11.
Its manufacture craft comprises the steps:
The first step, at substrate layer 1 surperficial epitaxial growth drift layer 2, at drift layer 2 thermal oxide growth silicon dioxide, form insulating barrier 4;
Second step, carry out lithography corrosion process, at surface removal partial insulative layer 4, etching is then removed the exposed drift layer 2 of part and is formed grooves;
The 3rd step, in groove the deposit polycrystalline silicon material, mixing anti-carves erosion, forms high concentration impurities doped region 3, in the surface heat oxidation, forms insulating barrier 4;
The 4th step, carry out lithography corrosion process, at surface removal partial insulative layer 4, etching then forms groove, erosion removal high concentration impurities doped region 3 surface insulation layers 4;
The 5th step, at trench wall deposit barrier metal, form schottky barrier junction 5.
The 6th step, at the surface deposition surface metal-layer, carry out lithography corrosion process, form anode metal layer 10 and cathodic metal layer 11, as shown in Figure 1.
Cross above-mentioned example and set forth the present invention, also can adopt other example to realize the present invention simultaneously, the present invention is not limited to above-mentioned instantiation, so the present invention is limited by the claims scope.
Claims (11)
1. trench schottky semiconductor device is characterized in that: comprising:
Substrate layer is for semi-conducting material constitutes;
Drift layer is positioned on the substrate layer, is the first conductive semiconductor material;
A plurality of grooves are arranged in drift layer, and trench wall is schottky barrier junction;
The high concentration impurities doped region near the drift layer between groove and the groove, and keeps certain distance with groove, is the first conductive semiconductor material;
Insulating barrier is positioned at the drift layer surface, for insulating material constitutes.
2. semiconductor device as claimed in claim 1 is characterized in that: described channel bottom and substrate layer distance are more than or equal to the distance of groove and high concentration impurities doped region.
3. semiconductor device as claimed in claim 1, it is characterized in that: described schottky barrier junction is positioned at trenched side-wall and bottom.
4. semiconductor device as claimed in claim 1, it is characterized in that: described high concentration impurities doped region can link to each other substrate layer with device surface.
5. semiconductor device as claimed in claim 1, it is characterized in that: the impurity concentration of described high concentration impurities doped region is suitable with the substrate layer impurity concentration.
6. semiconductor device as claimed in claim 1 is characterized in that: can be provided with the second conductive semiconductor material in the top of described groove and the bottom annex drift layer material, form the guard ring of schottky barrier junction.
7. semiconductor device as claimed in claim 1, it is characterized in that: electrode of described semiconductor device is arranged on the schottky barrier junction surface.
8. semiconductor device as claimed in claim 1, it is characterized in that: another electrode of described semiconductor device can be arranged on high concentration impurities doped region surface, also can be arranged on the substrate layer back side.
9. semiconductor device as claimed in claim 8 is characterized in that: when described electrode is arranged on high concentration impurities doped region surface, can realize that by metal line the anode of a plurality of schottky devices and negative electrode are interconnected at chip surface.
10. semiconductor device as claimed in claim 1 is characterized in that: can the subregion between described substrate layer and the drift layer insulating material be set and isolates.
11. the preparation method of a kind of trench schottky semiconductor device as claimed in claim 1 is characterized in that: comprise the steps:
1) forms the first conductive semiconductor material layer on the substrate layer surface, form a kind of dielectric material at the first conductive semiconductor material surface;
2) carry out lithography corrosion process, semiconductor material surface is removed the SI semi-insulation dielectric material, and etching is removed part bare semiconductor material and formed groove then;
3) form the high concentration impurities doped region at trench wall, form the dielectric material on high concentration impurities doped region surface;
4) carry out lithography corrosion process, semiconductor material surface is removed the SI semi-insulation dielectric material, and etching is removed part bare semiconductor material and formed groove then;
5) at trench wall deposit barrier metal, form schottky barrier junction.
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| CN201210027519XA CN103247694A (en) | 2012-02-07 | 2012-02-07 | Groove Schottky semiconductor device and manufacturing method thereof |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103594524A (en) * | 2013-11-25 | 2014-02-19 | 杭州士兰集成电路有限公司 | Schottky barrier diode and manufacturing method thereof |
| CN107293601A (en) * | 2016-04-12 | 2017-10-24 | 朱江 | A kind of Schottky semiconductor device and preparation method thereof |
| CN107359207A (en) * | 2017-03-21 | 2017-11-17 | 杭州立昂微电子股份有限公司 | A kind of Schottky-barrier diode and its manufacture method |
| CN113193052A (en) * | 2021-04-29 | 2021-07-30 | 东莞市佳骏电子科技有限公司 | Silicon carbide diode with large conduction current |
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| US7538362B2 (en) * | 2004-08-27 | 2009-05-26 | Infineon Technologies Ag | Lateral semiconductor diode and method for fabricating it |
| CN101452967A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Schottky barrier diode device and manufacturing method thereof |
| CN101894868A (en) * | 2009-02-18 | 2010-11-24 | 万国半导体有限公司 | Gallium nitride semiconductor device with improved forward conduction |
| CN102324389A (en) * | 2011-09-28 | 2012-01-18 | 上海宏力半导体制造有限公司 | Device integrated with Schottky diode in power transistor and forming method thereof |
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- 2012-02-07 CN CN201210027519XA patent/CN103247694A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US7538362B2 (en) * | 2004-08-27 | 2009-05-26 | Infineon Technologies Ag | Lateral semiconductor diode and method for fabricating it |
| CN101114670A (en) * | 2006-07-28 | 2008-01-30 | 松下电器产业株式会社 | Schottky barrier semiconductor device |
| CN101452967A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Schottky barrier diode device and manufacturing method thereof |
| CN101894868A (en) * | 2009-02-18 | 2010-11-24 | 万国半导体有限公司 | Gallium nitride semiconductor device with improved forward conduction |
| CN102324389A (en) * | 2011-09-28 | 2012-01-18 | 上海宏力半导体制造有限公司 | Device integrated with Schottky diode in power transistor and forming method thereof |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103594524A (en) * | 2013-11-25 | 2014-02-19 | 杭州士兰集成电路有限公司 | Schottky barrier diode and manufacturing method thereof |
| CN107293601A (en) * | 2016-04-12 | 2017-10-24 | 朱江 | A kind of Schottky semiconductor device and preparation method thereof |
| CN107293601B (en) * | 2016-04-12 | 2021-10-22 | 朱江 | Schottky semiconductor device and preparation method thereof |
| CN107359207A (en) * | 2017-03-21 | 2017-11-17 | 杭州立昂微电子股份有限公司 | A kind of Schottky-barrier diode and its manufacture method |
| CN113193052A (en) * | 2021-04-29 | 2021-07-30 | 东莞市佳骏电子科技有限公司 | Silicon carbide diode with large conduction current |
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Application publication date: 20130814 |