CN105489624B - 具有护圈区域反射结构的背照式图像传感器 - Google Patents

具有护圈区域反射结构的背照式图像传感器 Download PDF

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CN105489624B
CN105489624B CN201510643118.0A CN201510643118A CN105489624B CN 105489624 B CN105489624 B CN 105489624B CN 201510643118 A CN201510643118 A CN 201510643118A CN 105489624 B CN105489624 B CN 105489624B
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埃瑞克·A·G·韦伯斯特
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Abstract

本申请案涉及一种具有护圈区域反射结构的背照式图像传感器。光子检测器包含接近半导体层的前侧而安置的单光子雪崩二极管SPAD。所述SPAD包含倍增结，所述倍增结经反向偏置而高于击穿电压，使得被透过所述半导体层的背侧引导到所述SPAD中的光触发雪崩倍增过程。护圈安置在围绕所述SPAD的护圈区域中以在所述半导体层中隔离所述SPAD。护圈区域反射结构在所述护圈区域中接近所述护圈且接近所述半导体层的所述前侧而安置，使得绕过所述SPAD被透过所述半导体层的所述背侧引导到所述护圈区域中的光被所述护圈区域反射结构重新引导回到所述半导体层中且引导到所述SPAD中。

Description

具有护圈区域反射结构的背照式图像传感器
技术领域
本发明大体上涉及光检测器，且更具体来说，本发明针对包含单光子雪崩二极管成像传感器的成像系统。
背景技术
图像传感器已变得无所不在。图像传感器在数码静态相机、蜂窝式电话、监控摄像机、以及医疗、汽车及其它应用中广泛使用。用于制造图像传感器及(特定来说)互补金属氧化物半导体(CMOS)图像传感器(CIS)的技术继续大幅进步。举例来说，对高分辨率和低功率消耗的需求已促使这些图像传感器的进一步小型化及集成。
其中大小和图像质量特别重要的两个应用领域是医疗成像和汽车应用。对于这些应用，图像传感器芯片通常必须提供可见光谱中的高质量图像，并且具有光谱的红外部分及近红外部分中的改进的灵敏度。
发明内容
本发明的实施例的一个方面涉及一种光子检测器，其包括：单光子雪崩二极管(SPAD)，其接近第一半导体层的前侧而安置，其中所述SPAD包含在所述第一半导体层中界定在所述SPAD的n掺杂层与p掺杂层之间的界面处的倍增结，其中所述倍增结经反向偏置而高于击穿电压，使得被透过所述第一半导体层的背侧引导到所述SPAD中的光在所述倍增结中触发雪崩倍增过程；护圈，其在所述第一半导体层中的护圈区域中接近所述SPAD而安置，其中所述护圈围绕所述SPAD以在所述第一半导体中隔离所述SPAD；以及护圈区域反射结构，其在所述护圈区域中接近所述护圈且接近所述第一半导体层的所述前侧而安置，使得绕过所述SPAD被透过所述第一半导体层的所述背侧引导到所述护圈区域中的光被所述护圈区域反射结构重新引导回到所述第一半导体层中且引导到所述SPAD中。
本发明的实施例的另一方面涉及一种成像传感器系统，其包括：像素阵列，其具有安置在第一半导体层中的多个像素单元，其中所述多个像素单元中的每一者包含：单光子雪崩二极管(SPAD)，其接近第一半导体层的前侧而安置，其中所述SPAD包含在所述第一半导体层中界定在所述SPAD的n掺杂层与p掺杂层之间的界面处的倍增结，其中所述倍增结经反向偏置而高于击穿电压，使得被透过所述第一半导体层的背侧引导到所述SPAD中的光在所述倍增结中触发雪崩倍增过程；护圈，其在所述第一半导体层中的护圈区域中接近所述SPAD而安置，其中所述护圈围绕所述SPAD以在所述第一半导体层中隔离所述SPAD；以及护圈区域反射结构，其在所述护圈区域中接近所述护圈且接近所述第一半导体层的所述前侧而安置，使得绕过所述SPAD被透过所述第一半导体层的所述背侧引导到所述护圈区域中的光被所述护圈区域反射结构重新引导回到所述第一半导体层中且引导到所述SPAD中；控制电路，其耦合到所述像素阵列以控制所述像素阵列的操作；以及读出电路，其耦合到所述像素阵列以从所述多个像素单元读出图像数据。
附图说明
参看以下图式描述本发明的非限制性且非详尽的实施例，图式中除非另有说明，否则在各个视图中相同参考数字均指代相同部件。
图1是根据本发明的教示的实例单光子雪崩二极管(SPAD)成像传感器系统的具有集成电路裸片的堆叠半导体装置晶片的一个实例的分解图。
图2是说明根据本发明的教示的堆叠芯片系统的一个实例的电路图，堆叠芯片系统包含光子检测器和计数器电路，所述光子检测器具有耦合到淬熄元件的SPAD。
图3是根据本发明的教示的在堆叠芯片系统的半导体装置晶片中实施的光子检测器的一个实例的横截面图，所述堆叠芯片系统包含由护圈围绕的SPAD以及包含在半导体的金属层中的实例护圈区域反射结构加上实例SPAD区域反射结构。
图4是根据本发明的教示的包含在堆叠芯片系统的半导体装置晶片的金属层中的护圈区域反射结构加上实例SPAD区域反射结构的一个实例的仰视图/俯视图。
图5是展示具有根据本发明的教示的具有实例SPAD成像传感器系统的集成电路系统的一个实例的框图。
贯穿图式的数个视图，对应参考符号指示对应组件。技术人员将理解，为了简明清晰而说明图中的元件，且所述元件不一定按比例绘制。举例来说，图中的一些元件的尺寸可能相对于其它元件有所夸示，以帮助提改进本发明的各个实施例的理解。而且，未描绘对于在商业上可行的实施例中有用或必需的常见但好理解的元件以促进对本发明的这些各种实施例的较少阻碍的查看。
具体实施方式
在以下描述中，陈述许多特定细节以提供对本发明的彻底了解。然而，对于所属领域的普通技术人员将显而易见的是，不需要使用特定细节以实践本发明。在其它例子中，未详细描述众所周知的材料或方法以避免使本发明模糊不清。
贯穿本说明书对“一个实施例”、“一实施例”、“一个实例”或“一实例”的引用意味着结合所述实施例或实例而描述的特定特征、结构或特性包含在本发明的至少一个实施例中。因此，贯穿本说明书的各处出现的短语“在一个实施例中”、“在一实施例中”、“一个实例”或“一实例”不一定全部指代相同的实施例或实例。此外，在一或多个实施例或实例中，特定特征、结构或特性可以任何适宜的组合及/或子组合进行组合。特定特征、结构或特性可包含在集成电路、电子电路、组合逻辑电路中，或提供所描述功能性的其它适宜组件中。另外，应了解，在此提供的图式是出于向所属领域的普通技术人员进行解释的目的，且所述图式不一定按比例绘制。
在典型的图像传感器中，入射红外或近红外光的显著部分可传播通过图像传感器的半导体材料(例如，硅)而不被吸收。为帮助增大被吸收的红外或近红外光的量，通常需要较厚的硅。然而，存在折衷选择，这是因为典型的图像传感器的半导体材料通常被薄化以便提高可见光性能，这使图像传感器的红外或近红外性能降级。具有包含单光子雪崩二极管(SPAD)的光子检测器的背照式所面临的额外挑战是：归因于围绕SPAD的护圈占据成像传感器的半导体层中的可用面积中的一些，SPAD成像系统的填充因数不是100％。护圈区域不如SPAD的高场p/n+结对光敏感且具有比SPAD的高场p/n+结更差的时序分辨率。
因此，如下文将描述，根据本发明的教示，根据本发明的教示的实例堆叠芯片成像传感器系统以具有护圈区域反射结构的背照式SPAD为特征，护圈区域反射结构在护圈区域和金属层中接近在半导体层的前侧围绕SPAD的护圈而安置，使得绕过SPAD被透过半导体层的背侧引导到护圈区域中的光被护圈区域反射结构重新引导回到半导体层中且引导到SPAD中由SPAD进行吸收。
为进行说明，图1是堆叠装置晶片100和100'的分解图，装置晶片100和100'结合在一起以形成根据本发明的教示的堆叠芯片集成电路成像传感器系统102的一个实例。装置晶片100和100'可包含硅、砷化镓或其它合适半导体材料。在所说明的实例中，装置晶片100包含半导体芯片111到119，而装置晶片100'包含对应半导体芯片(在图1中隐藏的视图)。如将在下文更详细论述，在一些实例中，装置晶片100的每一芯片111到119可为包含背照式SPAD的像素阵列的像素裸片，其中每一SPAD由护圈围绕，而装置晶片100'的每一对应芯片可为具有CMOS电路的专用集成电路(ASIC)裸片，所述CMOS电路包含(例如)数字计数器电路和使用标准CMOS工艺制造的相关联读出电子器件的阵列。计数器电路在单独底部装置晶片100'上的放置允许顶部装置晶片100上的SPAD像素阵列中的非常高的填充因数。此外，根据本发明的教示，因为装置晶片100与装置晶片100'分开形成，所以定制制造工艺可用于优化SPAD区域在装置晶片100上的SPAD像素阵列中的形成，而当在装置晶片100'上形成CMOS电路时可保留传统CMOS工艺。
图2是说明根据本发明的教示的堆叠芯片集成电路成像传感器系统202的一个实例的电路图，堆叠芯片集成电路成像传感器系统202包含像素阵列(包含具有耦合到淬熄元件的SPAD的光子检测器)和计数器电路。应注意，图2中说明的像素电路(例如，PIXEL1、PIXEL2、…PIXELN)为用于使用像素阵列实施每一像素的SPAD像素电路架构的一个可能实例。在图2中描绘的实例中，像素PIXEL1到PIXELN说明为布置在单个行中。然而，在其它实例中，应了解，像素阵列的像素可布置到单个列中或布置到列和行的二维阵列中。
如实例中展示，每一实例像素包含耦合到安置在堆叠芯片系统的顶部晶片200中的相应淬熄元件(例如，淬熄元件Q1到QN)的SPAD(例如，SPAD1到SPADN)。在所说明的实例中，且将如下文进一步详细论述，应注意，每一SPAD被透过半导体层的背侧照明，且在半导体层中由护圈围绕以隔离SPAD。在所述实例中，根据本发明的教示，护圈区域反射结构在金属层中接近护圈而安置，以将入射光偏转到SPAD区域中进行吸收。在各种实例中，还应注意，根据本发明的教示，耦合到每一相应SPAD1到SPADN的实例淬熄元件Q1到QN可包含在顶部晶片200或底部芯片200'中。还应了解，根据本发明的教示，可使用无源或有源淬熄元件来实施实例淬熄元件Q1到QN。
如实例中展示，存在N个SPAD、N个淬熄元件以及N个计数器电路(例如，计数器电路1到N)。在所描绘的实例中，计数器电路1到N使用安置在底部晶片200'上的使用堆叠芯片系统的标准CMOS工艺来制造的CMOS电路来实施，且经电耦合以接收由相应SPAD响应于包含在入射光中的所接收光子而产生的输出脉冲204。计数器电路1到N可经启用以对在时间窗期间由每一相应SPAD产生的输出脉冲204的数目计数，且输出表示计数的数字信号206。虽然图2中描绘实例说明像素电路与计数器电路之间的直接连接，但根据本教示，可使用像素电路与计数器电路之间的任何连接(包含借助AC耦合)。此外，可实施任何已知SPAD偏置极性和/或定向。在一个实例中，每一计数器电路包含放大器以放大所接收到的输出脉冲204。替代地，或除计数器电路之外，时序电路可放置在每一像素/列/阵列中以测定入射光子的到达时间。
在所说明的实例中，每一SPAD1到SPADN经由高于每一SPAD1到SPADN的击穿电压的偏置电压VBIAS反向偏置。响应于来自入射光的单个光生载流子，触发在每一SPAD1到SPADN的输出处引起雪崩电流的雪崩倍增过程。此雪崩电流响应于跨越淬熄元件(例如，Q1到QN)产生的电压降而自淬熄，这致使跨越SPAD的偏置电压下降。在雪崩电流的淬熄之后，跨越SPAD的电压恢复到高于偏置电压，且接着SPAD准备好被再次触发。每一SPAD1到SPADN的所产生的输出脉冲204由相应计数器电路1到N接收，计数器电路1到N响应于输出脉冲204使其计数递增。
在与使用标准CMOS工艺制造的CMOS数字计数器相同的芯片上并入SPAD的常规SPAD设计受制于归因于由CMOS电路本身占据的面积而减小的成像平面上的填充因数。因此，实施根据本发明的教示的堆叠芯片结构的一个优点是：根据本发明的教示，在SPAD处在顶部芯片上且CMOS电路处在单独的底部芯片上的情况下，不需要减小顶部芯片上的SPAD成像阵列的填充因数以便提供空间来在同一芯片上容纳CMOS电路。
应注意，图2的电路图在此处是出于解释目的而提供，且未详细展示一些电路元件(例如，无源组件(例如，电阻器和电容器)以及有源组件(例如，晶体管))以便不使本发明的教示模糊不清。举例来说，图2的所说明的像素电路可产生在由数字计数器的输入感测之前需要放大的输出脉冲。在另一实例中，淬熄元件Q1与SPAD1之间的节点处的连接将处在高电压下，这可需要AC耦合。
图3是根据本发明的教示的堆叠芯片系统302的半导体装置晶片300的一部分的一个实例的横截面图。应了解，图3的堆叠芯片系统302和半导体装置晶片300可为图1的堆叠芯片系统102和半导体装置晶片100和/或图2的堆叠芯片系统202和半导体装置晶片200的实施方案的一个实例，且下文引用的类似命名和编号的元件类似于上文描述那样耦合和起作用。因此，在一个实例中，图3的半导体装置晶片300与包含(例如)读出电路等等另一半导体装置晶片堆叠，且半导体装置晶片300和包含读出电路等等的另一半导体装置晶片在堆叠芯片系统中耦合在一起。还应注意，图2中展示的堆叠芯片系统202的各种电路元件(例如，图2的实例淬熄元件Q1到QN和/或计数器电路1到N)未在图3中详细展示以便不使本发明的教示模糊不清。
返回到图3中描绘的实例，实例光子检测器308说明为包含安置在半导体装置晶片300的SPAD区域328中的SPAD 310。如所展示，SPAD 310接近堆叠芯片系统302的半导体装置晶片300的半导体层318的前侧324而安置。在一个实例中，半导体层318包含薄化硅层。SPAD310包含倍增结316，倍增结316在半导体层318中界定在SPAD 310的n掺杂层314与p掺杂层312之间的界面处。在所述实例中，倍增结316被反向偏置而高于击穿电压，使得光344(其被透过半导体层318的背侧322被引导到SPAD 310中)在倍增结316中触发雪崩倍增过程。在一个实例中，光344包含红外或近红外光。
图3中描绘的实例还展示护圈320安置在半导体装置晶片300的护圈区域326中。如所展示，护圈320在第一半导体层318中接近SPAD 310而安置，且围绕SPAD 310以在半导体层318中隔离SPAD 310。在所述实例中，护圈320从前侧324到背侧322延伸通过半导体层318。
图3中描绘的实例还展示护圈区域反射结构330在护圈区域326中安置在护圈320下方或接近护圈320而安置。如实例中展示，根据本发明的教示，护圈区域反射结构330接近半导体层318的前侧324而安置，使得光346(其绕过SPAD 310被透过半导体层318的背侧322引导到护圈区域326中)被护圈区域反射结构330重新引导回到半导体层318中且引导到SPAD 310中。在一个实例中，光346包含红外近红外光。
图3中描绘的实例展示存在SPAD区域反射结构332，SPAD区域反射结构332在SPAD区域328中安置在SPAD 310下方或接近SPAD 310而安置。如实例中展示，根据本发明的教示，SPAD区域反射结构332接近半导体层318的前侧324，使得被透过半导体层318的背侧322引导到半导体层318中且在未被吸收的情况下穿过SPAD 310的光344被SPAD区域反射结构332反射回到半导体层318中且被反射回到SPAD 310中。
如所描绘的实例中展示，护圈反射结构330和SPAD区域反射结构332在半导体装置晶片300的氧化物材料334中使用金属层M1、M2、M3以及M4接近半导体层318的前侧324而实施。特定来说，实例展示使用多个金属层M1、M2以及M3来实施护圈反射结构330，以将在护圈区域326中接收的光346重新引导回到半导体层318中且引导回到SPAD 310中。应了解，根据本发明的教示，在其它实例中，护圈反射结构330可包含更多或更少数目的金属层M1、M2、M3以及M4，只要绕过SPAD 310在护圈区域326中被接收的光346被重新引导回到半导体层318中且引导回到SPAD 310中即可。图3中描绘的实例还展示SPAD区域反射结构332是使用一个金属层M4在半导体装置晶片300的氧化物材料334中接近半导体层318的前侧324实施。因而，SPAD区域反射结构332将已传播通过SPAD 310未被吸收的光344重新引导回到半导体层318中且引导到SPAD 310中。
如可在图3中说明的横截面实例中了解，根据本发明的教示，护圈区域反射结构330与SPAD区域反射结构332不共面，以便使光344(进入SPAD区域328)以及光346(进入护圈区域326)被重新引导到SPAD 310中。举例来说，如所说明的实例中展示，护圈区域反射结构330的多个金属层M1、M2、M3以颠倒(例如，右侧向上，这取决于人的视角)平顶金字塔形状布置在氧化物材料334中。在所述实例中，SPAD区域反射结构332的金属层M4为金字塔形结构的“平顶”，而金字塔形结构的侧部形成护圈区域反射结构330。当然应了解，根据本发明的教示，可在半导体晶片300的金属层M1、M2、M3、M4等等中形成其它合适的非共面三维结构(例如，圆顶结构或类似结构)，以实施护圈区域反射结构330和SPAD区域反射结构332来重新引导光346和光344。
图4为根据本发明的教示包含在堆叠芯片系统的半导体装置晶片的金属层中的护圈区域反射结构430加上实例SPAD区域反射结构432的一个实例的仰视图/俯视图。应了解，图4的护圈区域反射结构430加上实例SPAD区域反射结构432可为图3的护圈区域反射结构330加上实例SPAD区域反射结构332的一个实例，且下文引用的类似命名和编号的元件类似于如上文描述那样耦合和起作用。
如所描绘的实例中展示，图4的SPAD区域反射结构432使用单个金属层M4实施，且护圈区域反射结构430使用多个金属层M1、M2以及M3来实施。在所述实例中，多个金属层M1、M2、M3以及M4在氧化物材料434中接近包含SPAD的半导体层而安置。在所述实例中，SPAD区域反射结构432在SPAD区域中安置在SPAD正下方，以将在未被吸收的情况下穿过SPAD的任何光重新引导回到SPAD中。在所述实例中，根据本发明的教示，护圈区域反射结构430安置在围绕SPAD的护圈区域中，以将绕过SPAD且进入围绕SPAD的护圈区域中的光重新引导回到SPAD中。
图5为展示根据本发明的教示的堆叠芯片集成电路成像传感器系统502的一个实例的框图。应了解，图5的堆叠芯片系统502可为图1的堆叠芯片系统102和/或图2的堆叠芯片系统202和/或图3的堆叠芯片系统302的实施方案的一个实例，且下文引用的类似命名和编号的元件类似于上文描述那样耦合和起作用。如图5中描绘的实例中展示，堆叠芯片集成电路成像传感器系统502包含耦合到控制电路542和读出电路538的像素阵列536，读出电路538耦合到功能逻辑540。
在一个实例中，像素阵列536为像素单元(例如，像素单元P1、P2…、Pn)的二维(2D)阵列。在一个实例中，每一像素单元包含具有SPAD的光子检测器，SPAD由具有护圈区域反射体结构的护圈围绕，如上文论述。举例来说，像素阵列536中的像素单元P1、P2、…Pn可为图2的PIXEL1、PIXEL2、…PIXELN的实例，且下文引用的类似命名和编号的元件类似于上文描述那样耦合和起作用。如所说明，每一像素单元布置在行(例如，行R1到Ry)和列(例如，列C1到Cx)中以获取人、地方、对象等等的图像数据，所述图像数据接着可用于渲染人、地方、对象等等的2D图像。在另一实例中，像素阵列536还可在时序模式中用于给出场景的“时间图像”，其可在飞行时间应用中用于距离信息或用户医疗应用的荧光寿命。
由像素阵列536的SPAD产生的输出脉冲由高读出电路538读出且被传递到功能逻辑540。在一个实例中，读出电路538包含用于像素阵列536中的SPAD中的每一者的至少一个计数器电路，且还可包含放大电路和/或淬熄电路。功能逻辑540可简单地将图像数据存储在存储器中或甚至可通过施加后图像效果(例如，剪裁、旋转、调整亮度、调整对比度或其它)来操纵图像数据。控制电路542耦合到像素阵列536和/或读出电路538以控制操作性像素阵列536。举例来说，控制电路542可在时间窗内同时启用包含在读出电路538中的计数器电路中的每一者以实施全局快门操作。因此，本文中论述的SPAD堆叠芯片图像传感器的实例提供高速且低光敏的成像，这通常是使用常规传感器架构所无法实现的。
在一个实例中，可在堆叠芯片方案中实施图5中说明的成像传感器系统502。举例来说，根据本发明的教示，在一个实例中，如图5中说明，像素阵列536可包含在像素裸片中，而读出电路538、功能逻辑540以及控制电路542可包含在单独ASIC裸片中。在所述实例中，在制造期间将像素裸片和ASIC裸片堆叠且耦合在一起以实施根据本发明的教示的成像传感器系统。
本发明的所说明实例的以上描述(包含摘要中描述的内容)并不希望为详尽或被限制为所揭示的精确形式。虽然出于说明目的而在本文描述了本发明的特定实施例和实例，但在不脱离本发明的较广精神和范围的情况下，各种等效修改是可能的。
鉴于以上详细描述，可对本发明的实例做出这些修改。在所附权利要求书中使用的术语不应理解为将本发明限制为说明书和权利要求书中所揭示的特定实施例。而是，所述范围完全由所附权利要求书确定，所述权利要求书将根据已确立的权利要求阐释规则来解释。本说明书和图因此被认为是说明性而不是限制性的。

Claims (18)

1.一种光子检测器，其包括：
单光子雪崩二极管SPAD，其接近第一半导体层的前侧而安置，其中所述SPAD包含在所述第一半导体层中界定在所述SPAD的n掺杂层与p掺杂层之间的界面处的倍增结，其中所述倍增结经反向偏置而高于击穿电压，使得被透过所述第一半导体层的背侧引导到所述SPAD中的光在所述倍增结中触发雪崩倍增过程；
护圈，其在所述第一半导体层中的护圈区域中接近所述SPAD而安置，其中所述护圈围绕所述SPAD以在所述第一半导体层中隔离所述SPAD；
护圈区域反射结构，其在所述护圈区域中接近所述护圈且接近所述第一半导体层的所述前侧而安置，使得绕过所述SPAD被透过所述第一半导体层的所述背侧引导到所述护圈区域中的光被所述护圈区域反射结构重新引导回到所述第一半导体层中且引导到所述SPAD中；以及
SPAD区域反射结构，所述SPAD区域反射结构接近所述SPAD且接近所述第一半导体层的所述前侧而安置，使得穿过所述SPAD被透过所述第一半导体层的所述背侧引导到所述第一半导体层中且光被所述SPAD区域反射结构反射回到所述第一半导体层中且反射回到所述SPAD中，其中所述护圈区域反射结构与所述SPAD区域反射结构不共面。
2.根据权利要求1所述的光子检测器，其中所述护圈区域反射结构包括多个金属层，所述多个金属层安置在接近所述第一半导体层的所述前侧而安置的氧化物材料中。
3.根据权利要求2所述的光子检测器，其中所述SPAD区域反射结构包含在所述多个金属层中的一者中，所述多个金属层安置在接近所述第一半导体层的所述前侧而安置的所述氧化物材料中。
4.根据权利要求3所述的光子检测器，其中所述护圈区域反射结构的所述多个金属层以平顶金字塔形状布置在接近所述第一半导体层的所述前侧而安置的所述氧化物材料中。
5.根据权利要求3所述的光子检测器，其中所述护圈区域反射结构包含在所述多个金属层中的第一者、第二者以及第三者中，且其中所述SPAD区域反射结构包含在所述多个金属层中的第四者中。
6.根据权利要求1所述的光子检测器，其中所述第一半导体层包含薄化硅。
7.根据权利要求1所述的光子检测器，其中所述光包含近红外光。
8.根据权利要求1所述的光子检测器，其中所述第一半导体层包含在第一半导体装置晶片中，其中所述第一半导体装置晶片与包含读出电路的第二半导体装置晶片堆叠，且其中所述第一和第二半导体装置晶片在堆叠芯片系统中耦合在一起。
9.一种成像传感器系统，其包括：
像素阵列，其具有安置在第一半导体层中的多个像素单元，其中所述多个像素单元中的每一者包含：
单光子雪崩二极管SPAD，其接近第一半导体层的前侧而安置，其中所述SPAD包含在所述第一半导体层中界定在所述SPAD的n掺杂层与p掺杂层之间的界面处的倍增结，其中所述倍增结经反向偏置而高于击穿电压，使得被透过所述第一半导体层的背侧引导到所述SPAD中的光在所述倍增结中触发雪崩倍增过程；
护圈，其在所述第一半导体层中的护圈区域中接近所述SPAD而安置，其中所述护圈围绕所述SPAD以在所述第一半导体层中隔离所述SPAD；
护圈区域反射结构，其在所述护圈区域中接近所述护圈且接近所述第一半导体层的所述前侧而安置，使得绕过所述SPAD被透过所述第一半导体层的所述背侧引导到所述护圈区域中的光被所述护圈区域反射结构重新引导回到所述第一半导体层中且引导到所述SPAD中；以及
SPAD区域反射结构，所述SPAD区域反射结构接近所述SPAD且接近所述第一半导体层的所述前侧而安置，使得穿过所述SPAD被透过所述第一半导体层的所述背侧引导到所述第一半导体层中的光被所述SPAD区域反射结构反射回到所述第一半导体层中且反射到所述SPAD中，其中所述护圈区域反射结构与所述SPAD区域反射结构不共面；
控制电路，其耦合到所述像素阵列以控制所述像素阵列的操作；以及
读出电路，其耦合到所述像素阵列以从所述多个像素单元读出图像数据。
10.根据权利要求9所述的成像传感器系统，其进一步包括功能逻辑，所述功能逻辑耦合到所述读出电路以存储从所述多个像素单元读出的图像数据。
11.根据权利要求9所述的成像传感器系统，其中所述读出电路包括电耦合到所述像素阵列的多个计数器电路，其中所述多个计数器电路中的每一者经耦合以对由所述多个像素单元中的相应者产生的输出脉冲计数。
12.根据权利要求11所述的成像传感器系统，其中所述第一半导体层包含在第一半导体装置晶片中，且其中所述读出电路包含在第二半导体层中，所述第二半导体层包含在第二半导体装置晶片中，其中所述第一半导体装置晶片在堆叠芯片系统中与所述第二半导体装置晶片堆叠且耦合到所述第二半导体装置晶片。
13.根据权利要求9所述的成像传感器系统，其中所述护圈区域反射结构包含在多个金属层中，所述多个金属层安置在接近所述第一半导体层的所述前侧而安置的氧化物材料中。
14.根据权利要求13所述的成像传感器系统，其中所述SPAD区域反射结构包含在多个金属层中的一者中，所述多个金属层安置在接近所述第一半导体层的所述前侧而安置的所述氧化物材料中。
15.根据权利要求14所述的成像传感器系统，所述护圈区域反射结构的所述多个金属层以平顶金字塔形状布置在接近所述第一半导体层的所述前侧而安置的所述氧化物材料中。
16.根据权利要求14所述的成像传感器系统，其中所述护圈区域反射结构包含在所述多个金属层中的第一者、第二者以及第三者中，且其中所述SPAD区域反射结构包含在所述多个金属层中的第四者中。
17.根据权利要求9所述的成像传感器系统，其中所述第一半导体层包含薄化硅。
18.根据权利要求9所述的成像传感器系统，其中所述光包含近红外光。
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