CN105489598B - 利用微机电制作工艺接合与组装发光二极管装置 - Google Patents

利用微机电制作工艺接合与组装发光二极管装置 Download PDF

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CN105489598B
CN105489598B CN201510644958.9A CN201510644958A CN105489598B CN 105489598 B CN105489598 B CN 105489598B CN 201510644958 A CN201510644958 A CN 201510644958A CN 105489598 B CN105489598 B CN 105489598B
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emitting diode
light emitting
electrode
metal
wire
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CN105489598A (zh
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何冠儒
叶瑞鸿
黄子逸
陈志忠
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Epistar Corp
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Epistar Corp
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Abstract

本发明公开一种利用微机电制作工艺接合与组装发光二极管装置。该发光二极管装置,包含具有一第一电极的一第一发光二极管芯片、具有一第二电极的一第二发光二极管芯片、一连接第一电极与第二电极的可延伸金属丝线、以及一连接至第一电极与第二电极的金属晶种层,其中可延伸金属丝线可沿着一方向延伸并同时与第一电极及第二电极保持相连。

Description

利用微机电制作工艺接合与组装发光二极管装置
技术领域
本发明涉及一种与发光二极管芯片(LED chip)相关的封装及接合工程,尤其是涉及一种发光二极管封装及接合技术及其集成制造方法(integrated fabricationmethod)。此发光二极管封装及接合技术是利用微机电制作工艺技术形成数个通过可拉伸的金属丝线图案彼此相连的发光二极管芯片。此数个发光二极管芯片可以延展方式固定至一基板上而成为一体。
背景技术
发光二极管由于小尺寸、低耗能、较低的操作温度与较长的使用寿命,常被使用于照明用途,因而逐渐取代传统钨丝灯泡与荧光灯。为了制造发光二极管灯条(lightstring)或灯丝(filament),多个发光二极管芯片需要被适当地放置到电路板上的预设位置。往常发光二极管芯片是以对位法(alignment method),例如拾取-放置法(pick-and-place process),逐一被结合(mount)并放置到电路板上。此后,再以打线接合(wirebonding)的方式于发光二极管芯片之间形成电连接(electrical connection)。发光二极管芯片的结合制作工艺可以利用发光二极管芯片固晶机(chip mounter)实现。传统结合与放置发光二极管芯片方法的缺点在于利用拾取-放置法逐一安置芯片过于耗时且其设备过于昂贵。此外,电连接发光二极管的打线接合步骤也十分耗时。因此,改善相关技术有其需求。
发明内容
为解决上述问题,本发明提供一种发光二极管装置,包含具有一第一电极的一第一发光二极管芯片、具有一第二电极的一第二发光二极管芯片、一连接第一电极与第二电极的可延伸金属丝线、以及一连接至第一电极与第二电极的金属晶种层,其中可延伸金属丝线可沿着一方向延伸并同时与第一电极及第二电极保持相连。
附图说明
图1~图7为本发明第一实施例的集成制造方法的剖面示意图;
图8~图15为本发明第二实施例的一体化制造方法的剖面示意图;
图16~图22为本发明第三实施例的一体化制造方法的剖面示意图;
图23~图31为本发明第四实施例的一体化制造方法的剖面示意图;
图32~图38B为本发明第五实施例的一体化制造方法的剖面示意图;
图39为一上视示意图,显示依据本发明第五实施例的位于透明基板上的发光二极管芯片以及连接相邻结合端的具有可拉伸金属丝线的弹簧结构;
图40为被分割成数块的基板的示意图,其中,各个基板包括一个以上的发光二极管芯片。
符号说明
5发光二极管芯片;
10、15、116金属层;
18发光二极管晶片;
20接合垫;
25、110光致抗蚀剂层;
27、119开口;
29金属材料;
30、120、170可延伸金属丝线;
35、125电极;
37镀层;
38延展盘;
45、55、130胶膜;
46、56环;
47表面;
48切割线;
100、100a、100b金属晶种层;
50、103、300基板;
51基板块;
105暂时基板;
106侧;
117金属层;
135连接垫;
140组件;
145最终基板;
180导线接合结构;
190金属化结构;
300a、300b载板块;
310接合端;
具体实施方式
在此所呈现的各实施例中,各个发光二极管芯片的p接合垫与n接合垫可以都位于发光二极管芯片的同一侧。
以下描述依据本发明第一实施例的结合及电连接多个发光二极管芯片的集成制造方法。参考图1,发光二极管芯片5与多个金属层10、15二者皆被设置于发光二极管晶片(LED wafer)18的一侧上。在本实施例中,金属层10具有钛,而金属层15具有铜。钛金属层10与铜金属层15是利用电子束蒸镀法(e-gun evaporation)沉积。其中,钛金属层10先沉积,再沉积铜金属层15。此外,多个接合垫20形成在发光二极管芯片5之上。参考图2,形成光致抗蚀剂层25以覆盖于金属层(Ti/Cu)10、15的上方。光致抗蚀剂层25可以是负光致抗蚀剂,显影剂可以采用有机溶剂。接着利用光掩模将光致抗蚀剂层25显影并曝光,而负光致抗蚀剂未被曝光的区域则利用溶剂溶解去除。光掩模(未绘示)被设计成具有一个(硬质的)图案,此图案具有多个可延伸的金属丝线与多个接触电极。经过显影与曝光的步骤后,光掩模上的图案(未绘示于图中)被转移到图案化光致抗蚀剂层25上,图案化光致抗蚀剂层25因而在后续的步骤中就被作为光掩模(mask)使用。而图案化光致抗蚀剂层中被移除的部分被当作开口27。在另一实施例中,光致抗蚀剂层25可以是正光致抗蚀剂,而光掩模的图案可以包括多个可延伸金属丝线以及作为开口区域(露出的区域)的多个接触电极。利用光掩模以形成如图2所示的图案化光致抗蚀剂层25时,可以利用等离子体蚀刻法(plasma etching)。
参考图3,图案化光致抗蚀剂层25被当作光掩模使用,而金属材料29,例如铜,则通过制作工艺被填入位于被蚀刻的或是被图案化的光致抗蚀剂层25的开口27中以形成多个可延伸的金属丝线30,并且金属丝线30可以具有是弹簧的形状(由平行于发光二极管晶片18上表面的上视图观之)。又例如利用图案化光致抗蚀剂层25作为光掩模,可以在接合垫20上方填入金属以形成多个接触电极35。镀层37也可以被形成在位于接合垫20上方的接触电极35之上,镀层37的材料可以是由铜或金等材料构成。参考图4,第一胶膜45被连接到图案化光致抗蚀剂层25靠近发光二极管的接合垫20与可延伸的金属丝线30的一侧。在本实施例中,第一胶膜45被当作载体,且是可弯曲、可拉伸并可透光的塑胶材质,其上还具有覆盖一侧的粘性层。连接到第一胶膜45的环46是载体(未绘示于图中)的一部分,其例如一个圆形的支架,用以在后续的制作工艺中支撑第一胶膜45。通过载体的支撑,柔软的第一胶膜45可以被限制成固定的几何形状,并可以在稳定的状态下被拉伸。不仅如此,环46可以用来维持整体结构稳固地设置于第一胶膜45之上,并将第一胶膜45在接下来的制造流程中固定在同样的位置上。参考图5,多个切割线48形成在发光二极管晶片18的另一表面47上,且邻近发光二极管芯片5的一侧。这些切割线48可以被用来分开与劈裂发光二极管芯片5。参考图6,发光二极管芯片5被沿着切割线48分开,而第一胶膜45在劈裂的步骤中依然与发光二极管芯片5相连。在劈裂的步骤之后,第一胶膜45可以被移除。此后,第二胶膜55被连接到发光二极管晶片18的另一表面47,第一胶膜45接着被移除。在本实施例中,环56是载体的一部分,并支撑的第二胶膜55。如上所述,环56可以用来固定整体结构使其稳固地设置于第二胶膜55之上,并将第二胶膜55在接下来的制造流程中限制在同样的位置上。图案化光致抗蚀剂层25可以利用湿式剥离法(溶剂或者酸)或等离子体气体剥离法加以去除。连接到发光二极管晶片18的金属层(Ti/Cu)10、15则被选择性地蚀刻。因此,部分的铜金属层29保留下来作为弹簧或者可延伸的金属丝线30、以及接触电极35的部分。而未被蚀刻的钛金属层10则连接到接触电极35。利用可以蚀刻钛而不会蚀刻铜的蚀刻液,以湿式蚀刻选择性地蚀刻钛金属层10后,可以形成包括多个可延伸金属丝线30的图案(来自于选择性蚀刻后原始铜金属层残余的部分),金属丝线30并连接到多个发光二极管芯片5,其中,相邻发光二极管芯片5通过这些可延伸的金属丝线30彼此相连。在本实施例图2至图6中所发生的制造步骤可以视为微机电制造步骤。参考图7,当通过加热或者UV光线移除第二胶膜55时,接触电极35被连接或安置到延展盘38上。延展盘38是一个加工好的金属组件,其具有多个转换阶段(x向、y向、z向、径向),并有一个中心延展区域(未绘示)以承载发光二极管晶片18。延展盘38的中心延展区域的尺寸取决于晶片的尺寸。延展盘38还具有多个延展臂(未绘示),以预定间隔环绕着中心延展区域以拉伸发光二极管晶片18的数边。
因为发光二极管芯片5已经沿着切割线48被分离并断开,发光二极管芯片5便可以通过伸展第二胶膜55到所需长度与宽度更进一步分开,以将发光二极管芯片5安置到各式各样所需的基板上。同时,可延伸金属丝线30具有像弹簧的结构,在收缩的状态下以大致平行的方向摆放。被拉伸的相连发光二极管芯片5在可延伸金属丝线30处于延展状态下仍彼此电连接。可延伸的金属丝线30不论在拉伸/扩大的状态或者在压缩/缩小的状态下都可以作为导电线。可以将大量的可延伸金属丝线30形成到一个晶片上,并配置且用以形成特定图案以连接大量的发光二极管芯片5,例如,一次连接一个六英寸晶片上的96000个发光二极管芯片。由于可延伸金属丝线30的可延伸物理特性,各对相连发光二极管芯片5间的距离可以不同,并可以增加到一预定宽度以容许或提供发光二极管芯片5在安置与结合上的弹性,而无需担心可延伸金属丝线30太短或者纠缠在一起。
以下描述根据本发明第二实施例的结合及电连接多个发光二极管芯片的集成制造方法。如图8所示,金属晶种层100被形成于暂时基板105的一侧106。金属晶种层100含有钛。金属晶种层100可以用电子束蒸镀法沉积。如图9所示,光致抗蚀剂层110被形成用以覆盖金属晶种层100的上方。光致抗蚀剂层110可以是正光致抗蚀剂或者负光致抗蚀剂,并接着被蚀刻或者曝光/显影以作为光掩模。如图10所示,利用图案化光致抗蚀剂层110当作光掩模。含有铜的金属层117被填入位于被图案化光致抗蚀剂层110的开口119中以形成多个可延伸金属丝线120以及数个接触电极125,其中,金属丝线120可以是弹簧的形状。可延伸金属丝线120形成一个预定图案(未绘示于图中)以覆盖暂时基板105。可延伸金属线120的两端连接到一对在其两端上相邻的接触电极125。如图11~图12所示,图形化光致抗蚀剂层110可以利用如湿式剥离法(利用溶剂或者酸)或等离子体气体剥离法等制作工艺加以移除,并选择性蚀刻以移除金属晶种层100使得电连接到到接触电极125的可延伸金属丝线120保留在暂时基板105之上。亦即,部分位于可延伸金属丝线120之下的金属晶种层100a大体上通过选择性蚀刻被移除,而部分在接触电极125之下的金属晶种层100b则被保留下来。在本实施例图9至图12中所实施的制造步骤可以视为微机电制造步骤。如图13所示,第一胶膜130被连接到多个发光二极管芯片5的一侧,其中各个发光二极管芯片5具有一对连接垫135。连接到第一胶膜130的一个发光二极管芯片5的一对连接垫135分别与如图10中所示的一对接触电极125(连接到暂时基板105)相对齐。如图14所示,接触电极125的一侧被连接到相对应的连接垫135,而接触电极125的另一侧则连接到相对应的金属晶种层100b的部分。第一胶膜130被从发光二极管芯片5移开,并形成一个中间发光二极管芯片组件140。如图15所示,在利用热、UV光线或者有机溶剂等方式从中间发光二极管芯片组件140移除暂时基板105之后,中间发光二极管芯片组件140与发光二极管芯片5都被连接到最终基板145以形成一个玻璃芯片封装(COG;chip on glass)或一个基板芯片封装(COB;chip on board)。玻璃芯片封装包含一个作为载体的玻璃基板或者透明基板,基板芯片封装包含一个做为载体的印刷电路板(PCB)。
以下描述根据本发明的第三实施例的电连接多个发光二极管芯片的集成制造方法。如图16所示,发光二极管芯片5与多个由铜之类的金属所制造的接合垫20被形成于基板103的一个表面上。如图17所示,以例如电子束蒸镀法等方法所沉积的金属层116覆盖发光二极管芯片5与接合垫20。如图18所示,光致抗蚀剂层110被形成以覆盖金属层116的上方。光致抗蚀剂层110接着被蚀刻或图案化以作为掩模(光掩模)用。如图19所示,被蚀刻后或者被图案化后的光致抗蚀剂层110被作为掩模之用,而例如铜等金属材料被填入图案化光致抗蚀剂层110的开口以形成多个可延伸的金属丝线170。可延伸的金属丝线170可以为弹簧形状的短线,也形成多个位于发光二极管芯片5的接合垫20之上的接触电极35,而发光二极管芯片5则位于基板103之上。如图20所示,图案化的光致抗蚀剂层110通过湿式剥离(溶剂或者酸),或者利用等离子体气体剥离等方式移除,并以深层激光画线等方式于基板103上形成切割线48。如图21所示,以选择性蚀刻的方式移除金属层116,以保留位于接合垫20与接触电极35之间的金属层116的部分。连接到发光二极管芯片5的接合垫20被保留下来。被保留下来的金属层更作为弹簧结构以提供可延伸的金属丝线170与接触电极35。选择性蚀刻钛金属层后,再由铜金属层形成连接发光二极管芯片5的可延伸的金属丝线170的图样,其中,相邻的发光二极管芯片5则通过可延伸的金属丝线170彼此相连。位于可延伸金属丝线170之下的金属层大致上可以通过选择性蚀刻加以移除。如图22所示,由于发光二极管芯片5已经沿着切割线48分开,具有各自分开的发光二极管芯片5的基板103更可以再分割(score)或切线(scribe),并由此分隔开已经画线的结构。因此,多个发光二极管芯片组件具有连接相邻发光二极管芯片5的可延伸的金属丝线170。
以下描述根据本发明第四实施例的电连接多个发光二极管芯片至一基板上的一种集成制造方法。如图23所示,金属晶种层100形成于透明基板300的一侧之上。金属晶种层100可以利用电子束蒸镀法沉积。如图24所示,形成光致抗蚀剂层110以覆盖金属晶种层100上方,光致抗蚀剂层110接着被蚀刻或者被图案化以作为掩模使用。如图25所示,以光致抗蚀剂层110作为掩模,金属(例如铜)被填入图案化的光致抗蚀剂层110的开口119以形成多个可延伸的金属丝线120。多个可延伸金属丝线120可以具有弹簧的外型。包含铜的金属材料117被填入开口119以形成多个接触电极125。可延伸金属丝线120形成一覆盖透明基板300的预定图案。每一个可延伸的金属丝线120的两端分别连接一对相邻的接触电极125。如第26图所示,通过湿式剥离(溶剂或者酸)或者等离子体气体剥离等方式移除光致抗蚀剂层110,以留下填入开口以形成可延伸的金属丝线120与接触电极125的金属。每一个可延伸金属丝线120连接到一对相邻的接触电极125。此外,连接接触电极125的可延伸金属丝线120图案形成在透明基板300。如图27所示,进行选择性蚀刻以移除金属晶种层100,因此连接接触电极125的可延伸金属丝线120被保留在基板300之上。位于可延伸性的金属丝线120之下的金属晶种层100大致上都通过选择性蚀刻移除。在本实施例中从图24到图27发生的步骤可以被视为微机电装置制作工艺。如图28所示,第一胶膜130被结合到多个发光二极管芯片5的一侧,其中每一个发光二极管芯片5都有一对接触垫135。每个发光二极管芯片5连接到第一胶膜130的接触垫135对准相应的接触电极125(连接到透明基板),如图28所示。如图29所示,接触垫135被连接到相对应的接触电极125。将第一胶膜130自发光二极管芯片5移除,以形成一中间发光二极管芯片组件140。如图30所示,透明基板300被切割并断开。如图31所示,被可延伸金属丝线120连接的多个发光二极管芯片5可以在垂直方向上(沿着y轴)以及水平方向上(沿着x轴)移动及/或扩张,因此让一结构体便于与一个软性载板(未绘示于图中)相连接,此结构体包含独立的发光二极管芯片5及与其相连的独立透明基板300块。
以下描述根据本发明第五实施例的电连接多个发光二极管芯片至一基板上的集成制造方法。如图32所示,金属晶种层100被形成于透明基板300的一侧。金属晶种层100可以用电子束沉积的方法形成。如图33所示,形成光致抗蚀剂层110以覆盖金属晶种层100。然后蚀刻光致抗蚀剂层110以当作掩模之用。如图34所示,使用被蚀刻后的光致抗蚀剂层110作为掩模,包含铜的金属材料被填入被蚀刻后的光致抗蚀剂层110的开口119以形成多个可延伸的金属丝线120与多个接合端310。可延伸的金属丝线120可以做成弹簧的形状。可延伸的金属丝线120形成一个预订的图案,其覆盖在例如透明基板300上的一个区域。可延伸的金属丝线120的两端连接到一对相邻的接合端310。如图35所示,通过湿式剥离(溶剂或者酸)或者等离子体气体剥离等方式移除被蚀刻的光致抗蚀剂层110,但是形成可延伸金属丝线120及接合端310的金属被保留下来。各个可延伸的金属丝线120连接到一对相邻的接合端310。此外,在透明基板300上形成连接许多结合端310的可延伸金属丝线120图案。如图36所示,利用选择性蚀刻的方式移除金属晶种层100,因此连接着接合端310的可延伸金属丝线120可以存留在透明载板300之上。位于可延伸性的金属线120之下的金属晶种层100大致上通过选择性蚀刻的方式移除掉。在本实施例中从图33到图36可以视为微机电装置制作工艺。如图37所示,多个发光二极管芯片5通过发光二极管芯片5的接合垫20形成于第一胶膜130之上。接着,通过加热、施加UV光线或者利用有机溶剂等方法,将第一胶膜130与形成于其上的发光二极管芯片5连接到透明基板300之上。其中,接合端310与可延伸金属丝线120可以选择性地连接到第一胶膜130。
根据第五实施例,不论是图38A中的导线接合结构180或者是图38B中的金属化结构190都可以用来形成电性路径以连接到外部电源或是其他发光二极管芯片5。如图38A所示,透明基板300被切割并断开成许多独立的透明载板块300a,其中每一个透明载板块300a承载着一个发光二极管芯片5。在接合端310与发光二极管芯片5的其中一个接合垫20以导线接合的方式形成电连接,同时,在图34与图35中所描述的步骤中形成的接合端310与可延伸的金属线120彼此电连接。如图38B所示,透明基板300被切开并分离成多个分开的透明载板块300b,其中每一个载板块300b承载/包含着一个发光二极管芯片5,再利用光学制作工艺与金属化制作工艺,在接合端310与发光二极管芯片5的其中一个接合垫20之间形成电连接。另一方面,在图34与图35中所描述的步骤中形成的可延伸金属丝线120与接合端310彼此电连接。如图39所示,根据本发明第五实施例,上视示意图揭示位于透明载板300上的发光二极管芯片5与由可延伸金属丝线120构成的弹簧结构连接到相邻的接合端310的态样。
在所述的实施例中,包括第一到第五实施例中,可延伸的金属丝线的厚度t(如第一实施例的图3所示)介于0~100μm。在另一实施例中,厚度t小于70μm。
如上述一些实施例所述,承载发光二极管芯片的胶膜与可延伸的金属丝线之间相隔一较大的距离,或者以一相当接近的距离靠近/相比邻。上述实施例中,所使用到的胶膜可以沿着一个方向上或者多个方向上扩张或者延伸。在上述所有的实施例中,可延伸的金属丝线可以悬空。在数个实施例中,胶膜是由一涂布着粘着层(未绘示于图中)的薄层(未绘示于图中)所组成。粘着层的材料可以是丙烯酸基底的材料。薄层的材料可以是由PVC所组成。除此之外,可延伸的金属丝线可以由金属所形成,例如镍、银或者金。
在其他替代实施例中,发光二极管芯片的接合垫可以形成在发光二极管芯片的不同表面上或者同样表面上。因此,p型接合垫与n型接合垫也可以形成在发光二极管芯片的不同侧。
在一实施例中,基板50支撑多个发光二极管芯片5,其中机板50可以被切成多个基板块51。如图40所示,基板50的每一个基板块51具有大于一个的发光二极管芯片5。在数个实施例中,可延伸金属丝线的宽度可以小于70μm,例如5μm、10μm、27μm、57μm或62μm。可延伸的金属丝线的长度在收缩的状态下可以是255μm,或者在拉伸的状态下可以是1200μm。另一方面,以可延伸金属丝线的收缩长度当作A,可延伸金属丝线的拉伸长度大约是3.5A~4A。可延伸金属丝线的曲率(R)与厚度(t)的比例t/2R不会超过可延伸金属丝线材料的降伏应变。
需了解的是,本发明中上述的实施例在适当的情况下,是可互相组合或替换,而非仅限于所描述的特定实施例。本发明所列举的各实施例仅用以说明本发明,并非用以限制本发明的范围。任何人对本发明所作的任何显而易见的修饰或变更接不脱离本发明的精神与范围。

Claims (10)

1.一种发光二极管装置,包含:
第一发光二极管芯片,包含第一电极;
第二发光二极管芯片,包含第二电极;
可拉伸的金属线,连接该第一电极与该第二电极;
第一金属晶种层,连接该可拉伸的金属线;以及
第二金属晶种层,连接该可拉伸的金属线,并与该第一金属晶种层形成于同一平面上;
其中该可拉伸的金属线形成一平面化结构于另一平面上,并沿着该另一平面延伸,且该平面平行该第一电极及该第二电极所在的平面。
2.如权利要求1所述的发光二极管装置,其中该可拉伸的金属线可沿着一第一方向延伸,并且该第一发光二极管芯片与该第二发光二极管芯片可沿着一不同于该第一方向的第二方向移动及/或扩张。
3.如权利要求1所述的发光二极管装置,还包含导线接合结构,位于该第一电极与该可拉伸的金属线之间。
4.如权利要求1所述的发光二极管装置,还包含:
第一透明基板,承载该第一发光二极管芯片;
第二透明基板,承载该第二发光二极管芯片;以及
金属化结构连接该第一电极与该可拉伸的金属线。
5.如权利要求1所述的发光二极管装置,该可拉伸的金属线,具有一厚度t与一曲率R,其中t/2R不会超过该可拉伸的金属线的降伏应变。
6.如权利要求1所述的发光二极管装置,该第一发光二极管芯片还包含第三电极,该第一电极与该第三电极位于该第一发光二极管芯片的不同面上。
7.一种发光二极管装置,包含:
发光二极管芯片,包含一上表面;
第一电极,形成于该上表面之上;
可拉伸的金属线,位于该上表面之上并电连接该第一电极,还包含一悬浮部;
第一金属晶种层,连接该可拉伸的金属线;以及
第二金属晶种层,连接该可拉伸的金属线,并与该第一金属晶种层形成于同一平面上;
其中,该可拉伸的金属线在一平行该上表面的平面上可沿着一方向延伸。
8.如权利要求7所述的发光二极管装置,还包含一延展盘,位于该上表面之上。
9.如权利要求8所述的发光二极管装置,其中该悬浮部悬浮于该延展盘与该发光二极管芯片之间。
10.如权利要求8所述的发光二极管装置,该发光二极管芯片还包含一第二电极,该第一电极与该第二电极位于该发光二极管芯片的不同面上。
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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105723528A (zh) * 2015-11-04 2016-06-29 歌尔声学股份有限公司 微发光二极管的转移方法、制造方法、装置和电子设备
KR102430500B1 (ko) 2017-05-30 2022-08-08 삼성전자주식회사 반도체 발광소자 및 이를 이용한 led 모듈
US10217718B1 (en) * 2017-10-13 2019-02-26 Denselight Semiconductors Pte. Ltd. Method for wafer-level semiconductor die attachment
CN111863690B (zh) * 2019-04-29 2023-10-20 成都辰显光电有限公司 批量转移头及其加工方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101376490A (zh) * 2007-08-29 2009-03-04 中国科学院微电子研究所 基于架空金属线桥的微机电系统磁执行器的制作方法
CN105280796A (zh) * 2014-03-06 2016-01-27 晶元光电股份有限公司 发光装置

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH036940Y2 (zh) * 1985-04-02 1991-02-21
DE102004036295A1 (de) * 2003-07-29 2005-03-03 GELcore, LLC (n.d.Ges.d. Staates Delaware), Valley View Flip-Chip-Leuchtdioden-Bauelemente mit Substraten, deren Dicke verringert wurde oder die entfernt wurden
JP4468210B2 (ja) * 2005-02-28 2010-05-26 株式会社東芝 Lsiパッケージ用インターフェイスモジュール及びlsi実装体
JP5059739B2 (ja) * 2005-03-11 2012-10-31 ソウル セミコンダクター カンパニー リミテッド 直列接続された発光セルのアレイを有する発光ダイオードパッケージ
KR100730072B1 (ko) * 2005-12-06 2007-06-20 삼성전기주식회사 수직구조 질화갈륨계 발광 다이오드 소자 및 그 제조방법
DE102007028097B4 (de) * 2007-06-19 2015-02-12 Automotive Lighting Reutlingen Gmbh Beleuchtungsanordnung mit Halbleiterlichtquellen auf flexiblen Leiterplatten
WO2009101551A1 (en) 2008-02-12 2009-08-20 Koninklijke Philips Electronics N.V. Light emitting device
KR101013557B1 (ko) * 2008-11-06 2011-02-14 주식회사 하이닉스반도체 플랙시블 반도체 패키지 및 이를 제조하기 위한 와이어 본딩 장치
JP4724222B2 (ja) * 2008-12-12 2011-07-13 株式会社東芝 発光装置の製造方法
WO2010086033A1 (en) * 2009-01-30 2010-08-05 Interuniversitair Microelektronica Centrum Vzw Stretchable electronic device
JP5549273B2 (ja) * 2009-02-27 2014-07-16 東芝ライテック株式会社 発光モジュール
US8912023B2 (en) * 2009-04-08 2014-12-16 Ledengin, Inc. Method and system for forming LED light emitters
EP2430652B1 (en) * 2009-05-12 2019-11-20 The Board of Trustees of the University of Illionis Printed assemblies of ultrathin, microscale inorganic light emitting diodes for deformable and semitransparent displays
JP5460374B2 (ja) 2010-02-19 2014-04-02 シチズン電子株式会社 半導体装置の製造方法
JP5390472B2 (ja) 2010-06-03 2014-01-15 株式会社東芝 半導体発光装置及びその製造方法
KR101746614B1 (ko) * 2011-01-07 2017-06-27 삼성전자 주식회사 발광소자 패키지 및 그 제조방법
KR101634369B1 (ko) * 2011-12-27 2016-06-28 서울바이오시스 주식회사 복수개의 발광셀들을 갖는 웨이퍼 레벨 발광 다이오드 패키지 및 그것을 제조하는 방법
US8957429B2 (en) 2012-02-07 2015-02-17 Epistar Corporation Light emitting diode with wavelength conversion layer
US20140070235A1 (en) 2012-09-07 2014-03-13 Peter Scott Andrews Wire bonds and light emitter devices and related methods
US10497633B2 (en) * 2013-02-06 2019-12-03 The Board Of Trustees Of The University Of Illinois Stretchable electronic systems with fluid containment
JP6398222B2 (ja) * 2013-02-28 2018-10-03 日亜化学工業株式会社 発光装置およびその製造方法
US8927338B1 (en) * 2013-06-13 2015-01-06 International Business Machines Corporation Flexible, stretchable electronic devices
JP6497647B2 (ja) * 2013-12-24 2019-04-10 パナソニックIpマネジメント株式会社 表示装置及び表示装置の製造方法
US9380697B2 (en) * 2014-01-28 2016-06-28 Panasonic Intellectual Property Management Co., Ltd. Electronic device and manufacturing method for same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101376490A (zh) * 2007-08-29 2009-03-04 中国科学院微电子研究所 基于架空金属线桥的微机电系统磁执行器的制作方法
CN105280796A (zh) * 2014-03-06 2016-01-27 晶元光电股份有限公司 发光装置

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