CN105453216A - 用于增强模式氮化镓晶体管的具有自对准凸出部的栅极 - Google Patents
用于增强模式氮化镓晶体管的具有自对准凸出部的栅极 Download PDFInfo
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- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 53
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Abstract
在栅极触点和二维电子气(2DEG)区域之间具有减小的栅极漏损电流的增强模式氮化镓晶体管及其制造方法。该增强模式的氮化镓晶体管包括:氮化镓层;阻挡层,其布置在氮化镓层上,并具有形成在氮化镓层和阻挡层之间界面处的2DEG区域;以及布置在该阻挡层上的源极触点和漏极触点。氮化镓晶体管还包括形成于所述阻挡层上方且在源极触点和漏极触点之间的p型栅极材料;以及布置在所述p型栅极材料上的栅极金属,其中p型栅极材料包括分别朝向源极触点和漏极触点延伸的自对准的一对凸出部。
Description
技术领域
本发明一般地涉及晶体管,并且更具体地,涉及在栅极与2DEG区域之间具有减小的栅极漏损电流的增强模式GaN晶体管。
背景技术
氮化镓半导体装置由于它们在高频切换以携带大电流并支持高电压的能力而越来越被需要。这些装置的发展已被普遍地用在高功率/高频应用。制造用于这些类型应用的装置是基于显现高电子移动性且被不同地称为异质接面场效应晶体管(HFET)、高速电子移动性晶体管(HEMT)、或调制掺杂场效应晶体管(MODFET)的一般性装置结构。这些类型的装置通常可例如在100kHz至100GHz的高频率操作时能够承受例如30V至2000V的高电压。
氮化镓HEMT装置包括具有至少两氮化物层的氮化物半导体。不同的材料形成于半导体或形成于缓冲层上,使得这些层具有不同的带隙。在相邻的氮化物层中的不同材料也导致极化,这有利于接近两层的接合处的导电性二维电子气(2DEG)区域,特别是在具有较窄带隙的层中。
导致极化的氮化物层通常包括邻近一层氮化镓的氮化铝镓阻挡层以包括2DEG,其允许电荷流经装置。该阻挡层可被掺杂或不掺杂。由于2DEG区域在零栅极偏压的状态下存在于栅极下方,大多数氮化物装置通常位于耗尽模式装置。如果2DEG区域在零施加栅极偏压的状态下位于栅极下方被耗尽(即,被移除),则该装置可以是增强模式装置。增强模式装置是常闭的并且是所需要的,由于它们提供增加的安全性,并且由于它们更容易以简单、成本低的驱动电路的方式控制。增强模式装置需要在栅极处施加的正偏压以便传导电流。
图1示出传统的增强模式氮化镓晶体管的示意图。如图所示,p型材料101用作栅极103。在0V偏压时,p型材料101耗损位于栅极103下方的2DEG102,并且该装置处于关断(OFF)状态。所述晶体管通过施加正电压到栅极103而转为接通(ON)。图2示出传统增强模式的氮化镓晶体管的两栅极漏损电流路径201,202的示意图。第一栅极漏损电流路径201沿着p型栅极材料101的侧壁流动,而第二栅极漏损电流路径202流过p型栅极材料101的凸块。
图3A和图3B示出两个测试结构300A,300B的示意图,其设计成确定用于增强模式氮化镓晶体管的可导致较低栅极漏损电流的结构类型。具体地,在图3A中所示的晶体管结构300A设计成当相比于图3B中所示的晶体管结构300B时具有更大的栅极表面区域和较少的栅极边缘。在该实例中,晶体管结构300A具有140,000μm2的栅极表面积和2,500μm的边缘,而晶体管结构300B具有84,000μm2的栅极表面积和247,000μm的边缘。
图4分别示出图3A和图3B所示的晶体管结构300A,300B的栅极漏损电流的比较曲线图。如图所示,结构300B具有高于结构300A的栅极漏损电流,这表明栅极漏损电流主要沿着栅极边缘即图2中所示的路径201。
因此,本发明的目的在于提供一种增强模式的氮化镓晶体管,其在栅极103和2DEG102之间具有减小的栅极漏损电流。
发明内容
本文中所公开的增强模式的氮化镓晶体管及其制造方法为在栅极触点和2DEG区域之间具有减小的栅极漏损电流的增强模式氮化镓晶体管及其制造方法。该增强模式的氮化镓晶体管包括:氮化镓层;阻挡层,其布置在氮化镓层上,并具有形成在氮化镓层和阻挡层之间界面处的2DEG区域;以及布置在该阻挡层上的源极触点和漏极触点。氮化镓晶体管还包括形成于所述阻挡层上方且在源极触点和漏极触点之间的p型栅极材料;以及布置在所述p型栅极材料上的栅极金属,其中p型栅极材料包括分别朝向源极触点和漏极触点延伸的一对自对准的凸出部。
本文所公开的用于制造增强模式氮化镓晶体管的方法包括下述步骤:形成氮化镓层;在氮化镓层上形成阻挡层;将p型栅极材料沉积在阻挡层上;将栅极金属沉积在p型栅极材料上;在栅极金属上形成光阻;
蚀刻栅极金属与p型栅极材料;以及各向同性地蚀刻栅极金属,以在p型栅极材料上在栅极金属下方形成一对凸出部。
附图说明
本公开的特征、目的、和优点从下面结合附图所作的详细描述将变得更加明了,遍及附图,相同的参考标记指代相同的元件,其中:
图1为示出传统增强模式氮化镓晶体管的示意图。
图2为示出传统增强模式氮化镓晶体管的两个栅极漏损电流路径的示意图。
图3A为示出增强模式的氮化镓晶体管测试结构的示意图。
图3B为示出另一增强模式氮化镓晶体管测试结构的示意图。
图4示出比较图3A和图3B中所示结构的栅极漏损电流的曲线图。
图5为示出根据本发明的示例性实施例的晶体管装置的示意图。
图6A至图6C示出制造根据示例性实施例的具有自对准的凸出部的晶体管装置的栅极的制造过程。
图7A为示出不具有凸出部的传统栅极结构的横截面图像。
图7B为示出根据示例性实施例的具有自对准的凸出部的栅极结构的横截面图像。
图8示出比较图7A和图7B中所示栅极结构的栅极漏损电流的曲线图。
具体实施方式
在下面的详细描述中,参考了某些实施例。这些实施例通过足够详细的描述使得本领域的技术人员能够实践它们。但是应当理解的是,可采用其它实例,并且可以做出不同结构、逻辑和电路方面的改变。在以下详细描述中所公开的特征组合可能没有必要在最广义的教导下实施,而是仅仅教导描述本发明教导的特定代表性实例。
图5为示出根据本发明示例性实施例的晶体管装置的示意图。如图所示,晶体管包括源极金属510(即,源极触点)和漏极金属512(即,漏极触点)以及设置于所述源极和漏极金属之间的栅极触点。具体地,氮化镓基体层501设置有形成在氮化镓基体层501上的阻挡层502以及形成在氮化镓基体层和阻挡层502之间界面处的二维电子气(2DEG)区域。在该示例性的实施例中,阻挡层502从氮化铝镓(AlGaN)形成。
如进一步所示,栅极触点包括形成于阻挡层502上的p型栅极材料503,并包括凸出部506,所述凸出部506由处于p型栅极材料503的顶部角落处的自对准过程创建,如下面详细地论述的那样。栅极金属504设置于p栅极材料503上。如图所示,栅极金属504具有比p型栅极材料503的宽度(即,p型栅极材料503的侧表面之间的宽度)更小的宽度(即,栅极金属504的侧壁之间的宽度),有效地在栅极金属504的每一侧上形成该对水平凸出部506。延伸经过栅极金属504侧壁的该对凸出部506具有相等或本质上相等的宽度,即,相应的凸出部由于自对准的制造过程从栅极金属的相应侧壁到p型栅极材料的侧面是对称的。
采用自对准制造过程的主要益处在于:(1)使得能够创建具有最小临界尺寸(“CD”)的p型栅极;(2)由于不需要第二掩模而降低制造成本;以及(3)创建相对于设置在p型栅极材料上的栅极金属504对称的凸出部506。如由在凸出部506和p型栅极材料503的侧面上所示的箭头(由附图标记505标示)所示,当正电压Vg施加到栅极金属504时,栅极电流路径505首先水平地沿着p-型栅极材料503的上边缘移动,并且一旦其到达凸出部506,则电流路径505就遵循沿着p型栅极材料503边缘的对角路径。这种结构导致如下面关于图8所述的降低的栅极漏损电流。
图6A-6C示出用于制造根据本发明示例性实施例的具有自对准的凸出部的栅极制造过程。如图6A所示,该装置的基体结构首先是形成有一氮化镓(GaN)的基体层601、形成于该氮化镓层601上的一氮化铝镓(AlGaN)阻挡层602以及形成于该阻挡层502上的一层p型栅极材料603,栅极金属604沉积于p型栅极材料603上。
接着,如图6B所示,沉积一光阻605并接着蚀刻栅极金属604。p型栅极材料603也以形成如图6B所示的栅极结构的方式被蚀刻。如图6C所示,栅极金属604接着被各向同性地蚀刻,其使得该栅极金属具有小于p型栅极材料603的平坦上表面的宽度。该第二蚀刻步骤导致p型栅极材料603的凸出部506的形成。
最后,该制造过程包括移除光阻605的步骤,其未示出,并且形成如图5所示具有自对准的凸出部的栅极。还应当理解的是,用于漏极触点和源极触点的接触金属可使用传统的制造技术来分开地沉积,但它们的形成将不会在本文中描述,以便不会不必要地混淆本发明的各方面。
图7A-7B示出根据本文所公开的示例性实施例的传统晶体管栅极的透射电子显微镜(“TEM”)截面视图的图像和具有自对准的凸出部的栅极的x射线截面视图。图8示出比较本发明的栅极漏损电流(如图7B中所示)和传统晶体管的栅极漏损电流(如图7A中所示)的曲线图。如图8可清楚地看到,当晶体管装置处于接通(ON)状态时,具有自对准凸出部的栅极具有显著低于传统的不具有凸出部的栅极的栅极漏损电流。
最后,应当指出的是,图示于图6A-6C的自对准过程显著优于使用分离的掩模形成栅极凸出部。在使用分离的掩模的过程中,光阻掩模在p型栅极材料沉积在装置的阻挡层上之后施加到未蚀刻结构。在这种情况下,第一掩模被用来图案化并蚀刻栅极金属至最小化的临界尺寸CD。第二掩模然后用于图案化并刻蚀p型材料而形成比栅极金属更宽的临界尺寸CD。这个两掩模过程的一个显著缺点是栅极金属与p型栅极材料之间不对准的可能性。
以上的描述和附图仅仅被认为是实现本文所述的特征和优点的具体实施例的说明。可对具体过程(或工艺)条件进行修改和替换。因此,本发明的实施例并不被视为受到前面的描述和附图的限制。
Claims (16)
1.一种增强模式的氮化镓晶体管,包括:
氮化镓层;
阻挡层,其布置在氮化镓层上,并具有形成在所述氮化镓层和所述阻挡层之间界面处的二维电子气区域;
形成于所述阻挡层上方的p型栅极材料,所述p型栅极材料具有朝向所述阻挡层延伸的侧面;以及
布置在所述p型栅极材料上的栅极金属,所述栅极金属具有朝向所述p型栅极材料延伸的侧壁;
其中所述p型栅极材料包括延伸经过所述栅极金属的相应侧壁的一对水平凸出部,所述对水平凸出部具有分别从所述栅极金属的侧壁至所述p型栅极材料的侧面的本质上相等的宽度。
2.根据权利要求1所述的增强模式的氮化镓晶体管,还包括设置在所述阻挡层上的源极触点和漏极触点。
3.根据权利要求2所述的增强模式的氮化镓晶体管,其中所述p型栅极材料的所述对水平凸出部分别朝向所述源极触点和所述漏极触点延伸。
4.根据权利要求3所述的增强模式的氮化镓晶体管,其中所述p型栅极材料的侧面分别水平地朝向所述源极触点和所述漏极触点延伸,且与所述阻挡层接触。
5.根据权利要求1所述的增强模式的氮化镓晶体管,其中p型栅极材料的所述对水平凸出部是自对准的。
6.根据权利要求1所述的增强模式的氮化镓晶体管,其中所述阻挡层包括氮化铝镓(AlGaN)。
7.根据权利要求1所述的增强模式的氮化镓晶体管,其中所述p型栅极材料具有在所述p型栅极材料的侧面之间的第一宽度,以及所述栅极金属具有在所述栅极金属的侧壁之间的第二宽度,所述第二宽度小于所述第一宽度。
8.一种增强模式的氮化镓晶体管,包括:
氮化镓层;
阻挡层,其布置在氮化镓层上,并具有形成在所述氮化镓层和所述阻挡层之间界面处的一个二维电子气区域;
布置在所述阻挡层上的源极触点和漏极触点;
p型栅极材料,其形成于所述阻挡层上方并在所述源极触点和所述漏极触点之间;以及
布置在所述p型栅极材料上的栅极金属;
其中所述p型栅极材料包括分别向所述源极触点和所述漏极触点延伸经过所述栅极金属的相应侧壁的一对自对准的凸出部。
9.根据权利要求8所述的增强模式的氮化镓晶体管,其中所述p型栅极材料还包括分别朝向所述源极触点和所述漏极触点水平地延伸且与所述阻挡层相接触的侧面。
10.根据权利要求8所述的增强模式的氮化镓晶体管,其中所述阻挡层包含氮化铝镓(AlGaN)。
11.根据权利要求8所述的增强模式的氮化镓晶体管,其中所述对自对准的凸出部相对于所述栅极金属是对称的。
12.一种用于制造增强型氮化镓晶体管的方法,所述方法包括:
形成氮化镓层;
在所述氮化镓层上形成阻挡层;
将p型栅极材料沉积在所述阻挡层上;
将栅极金属沉积在所述p型栅极材料上;
在所述栅极金属上形成光阻;
蚀刻所述栅极金属与所述p型栅极材料;以及
各向同性地蚀刻所述栅极金属,以在所述p型栅极材料上在所述栅极金属下方形成一对凸出部。
13.根据权利要求12所述的方法,其中各向同性地蚀刻所述栅极金属的步骤包括:蚀刻所述栅极金属以减小所述栅极金属的宽度,使得所述栅极金属的宽度小于所述p型栅极材料的宽度。
14.根据权利要求12所述的方法,还包括将源极触点和漏极触点沉积在所述阻挡层上。
15.根据权利要求12所述的方法,其中刻蚀所述p型材料的步骤包括:形成分别朝向所述源极触点和所述漏极触点水平地延伸并与所述阻挡层接触的所述p型栅极材料的侧面。
16.根据权利要求12所述的方法,其中所述p型栅极材料的所述对水平凸出部是自对准的。
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