CN105450071A - Auxiliary capacitance concentrated type half-bridge/single-clamping parallel-serial MMC self-voltage-sharing topology based on inequality constraints - Google Patents

Auxiliary capacitance concentrated type half-bridge/single-clamping parallel-serial MMC self-voltage-sharing topology based on inequality constraints Download PDF

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CN105450071A
CN105450071A CN201610047421.9A CN201610047421A CN105450071A CN 105450071 A CN105450071 A CN 105450071A CN 201610047421 A CN201610047421 A CN 201610047421A CN 105450071 A CN105450071 A CN 105450071A
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phase
module
submodule
brachium pontis
sub
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赵成勇
许建中
刘航
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North China Electric Power University
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North China Electric Power University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/49—Combination of the output voltage waveforms of a plurality of converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/0077—Plural converter units whose outputs are connected in series

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Conversion In General (AREA)
  • Inverter Devices (AREA)

Abstract

The invention provides an auxiliary capacitance concentrated type half-bridge/single-clamping parallel-serial MMC self-voltage-sharing topology based on inequality constraints. In the half-bridge/single-clamping parallel-serial MMC self-voltage-sharing topology, a half-bridge/single-clamping parallel-serial MMC model is electrically connected with a self-voltage-sharing auxiliary loop through 6N auxiliary switches in the auxiliary loop; the auxiliary switches are switched on, and the half-bridge/single-clamping parallel-serial MMC model and the self-voltage-sharing auxiliary loop form the auxiliary capacitance concentrated type half-bridge/single-clamping parallel-serial MMC self-voltage-sharing topology based on the inequality constraints; the auxiliary switches are switched off, and the topology is equivalent to the half-bridge/single-clamping parallel-serial MMC topology. Under the condition of not emphasizing the differences between the two topologies, 6K mechanical switches in the auxiliary switches can be omitted. By means of the half-bridge/single-clamping parallel-serial MMC self-voltage-sharing topology, DC side failures can be clamped without depending on special voltage-sharing control; the capacitances and voltages of sub-modules can be balanced spontaneously on the basis of completing DC and AC energy conversion; in addition, the triggering frequencies and capacitance values of the sub-modules can be correspondingly reduced, and base-frequency modulation of MMC is achieved.

Description

The centralized half-bridge of auxiliary capacitor based on inequality constraints/mono-clamp series-parallel connection MMC is from all pressing topology
Technical field
The present invention relates to flexible transmission field, being specifically related to the centralized half-bridge of a kind of auxiliary capacitor based on inequality constraints/mono-clamp series-parallel connection MMC from all pressing topology.
Background technology
Modularization multi-level converter MMC is the developing direction of following HVDC Transmission Technology, MMC adopts submodule (Sub-module, SM) mode of cascade constructs converter valve, avoid the direct series connection of large metering device, reduce the conforming requirement of device, be convenient to dilatation and redundant configuration simultaneously.Along with the rising of level number, output waveform, close to sinusoidal, effectively can avoid the defect of low level VSC-HVDC.
Half-bridge/mono-clamp series-parallel connection MMC is combined by half-bridge submodule and single clamp submodule.Half-bridge submodule by 2 IGBT module, 1 sub-module capacitance, 1 thyristor and 1 mechanical switch are formed; Single clamp submodule is by 3 IGBT module, 1 sub-module capacitance, and a diode and 1 mechanical switch are formed.This series-parallel connection MMC, cost is low, and running wastage is little, simultaneously can clamp DC side fault.
Different from two level, three level VSC, the DC voltage of half-bridge/mono-clamp series-parallel connection MMC is not supported by a bulky capacitor, but is supported by a series of separate suspension submodule capacitances in series.In order to ensure the waveform quality that AC voltage exports and ensure that in module, each power semiconductor bears identical stress, also in order to better support direct voltage, reduce alternate circulation, must ensure that submodule capacitor voltage is in the state of dynamic stability in the periodicity flowing of brachium pontis power.
Sequence based on capacitance voltage sequence all presses algorithm to be the main flow thinking solving half-bridge/mono-clamp series-parallel connection MMC Neutron module capacitance voltage equalization problem at present.But the realization of ranking function must rely on the Millisecond sampling of capacitance voltage, needs a large amount of transducers and optical-fibre channel to be coordinated; Secondly, when group number of modules increases, the operand of capacitance voltage sequence increases rapidly, for the hardware designs of controller brings huge challenge; In addition, sequence all presses the cut-off frequency of the realization of algorithm to submodule to have very high requirement, cut-offs frequency and all presses effect to be closely related, in practice process, may because all press the restriction of effect, the trigger rate of raising submodule of having to, and then bring the increase of converter loss.
Document " ADC-LinkVoltageSelf-BalanceMethodforaDiode-ClampedModula rMultilevelConverterWithMinimumNumberofVoltageSensors ", proposes a kind of clamp diode and transformer of relying on to realize the thinking of MMC submodule capacitor voltage equilibrium.But the program to a certain degree destroys the modular nature of submodule in design, submodule capacitive energy interchange channel is also confined to mutually, the existing structure of MMC could not be made full use of, while being introduced in of three transformers makes control strategy complicated, also can bring larger improvement cost.
Summary of the invention
For the problems referred to above, the object of the invention is to propose a kind of economy, modular, do not rely on and all press algorithm, simultaneously can corresponding reduction submodule trigger rate and capacitor's capacity and half-bridge/mono-clamp series-parallel connection MMC with DC Line Fault clamping ability from all pressing topology.
The concrete constituted mode of the present invention is as follows.
The centralized half-bridge of auxiliary capacitor based on inequality constraints/mono-clamp series-parallel connection MMC from all pressing topology, comprises the half-bridge MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by kindividual half-bridge submodule, n- kindividual single clamp submodule and 1 brachium pontis reactor are in series; Comprise by 6 nindividual auxiliary switch (6 kindividual mechanical switch, 6 n-6 kindividual IGBT module), 6 n+ 7 clamp diodes, 4 auxiliary capacitors, 2 auxiliary IGBT module compositions from all pressing subsidiary loop.
The centralized half-bridge of the above-mentioned auxiliary capacitor based on inequality constraints/mono-clamp series-parallel connection MMC all presses topology certainly, in series-parallel connection MMC model, and A phase upper and lower bridge arm, in single clamp submodule, diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole.1st submodule of brachium pontis in A phase, its submodule electric capacity negative pole is connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity negative pole downwards with the of brachium pontis in A phase i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase i-1 sub-module capacitance negative pole is connected; In A phase brachium pontis kindividual half-bridge submodule, its submodule electric capacity negative pole downwards with the of brachium pontis in A phase k+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase k-1 sub-module capacitance negative pole is connected; In A phase brachium pontis jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule diode and IGBT module tie-point be brachium pontis the downwards and in A phase j+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with brachium pontis in A phase j-1 submodule diode is connected with IGBT module tie-point; Brachium pontis in A phase nindividual submodule, its submodule diode and IGBT module tie-point are downwards through two brachium pontis reactors l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, its submodule IGBT module mid point upwards with the of brachium pontis in A phase n-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity negative pole downwards with A phase time brachium pontis the i+ 1 sub-module I GBT module mid point is connected, and its IGBT module mid point is the lower brachium pontis the with A phase upwards i-1 sub-module capacitance negative pole is connected; The of the lower brachium pontis of A phase kindividual submodule, its submodule electric capacity negative pole downwards with A phase time brachium pontis the k+ 1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards k-1 sub-module capacitance negative pole is connected; The lower brachium pontis of A phase the jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule diode and IGBT module tie-point downwards with A phase time brachium pontis the j+ 1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards j-1 submodule diode is connected with IGBT module tie-point; The lower brachium pontis of A phase the nindividual submodule diode is connected with DC bus negative pole downwards with IGBT module tie-point, its submodule IGBT module mid point upwards with A phase lower brachium pontis the n-1 submodule diode is connected with IGBT module tie-point.B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole, 1st submodule of upper brachium pontis, its submodule capacitance cathode is upwards connected with DC bus positive pole, and its submodule IGBT module mid point is connected with the 2nd sub-module capacitance positive pole of brachium pontis in B phase downwards; In B phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule capacitance cathode upwards with of brachium pontis in B phase i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase i+ 1 sub-module capacitance positive pole is connected; In B phase brachium pontis kindividual submodule, its submodule capacitance cathode upwards with of brachium pontis in B phase k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the k+ 1 sub-module I GBT module is connected with diode connection point; In B phase brachium pontis jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule IGBT module and diode connection point upwards with brachium pontis in B phase j-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the j+ 1 sub-module I GBT module is connected with diode connection point; Brachium pontis in B phase nindividual submodule, its submodule IGBT module and diode connection point upwards with brachium pontis in B phase n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is downwards through two brachium pontis reactors l 0be connected with the 1st sub-module capacitance positive pole of the lower brachium pontis of B phase; The of the lower brachium pontis of B phase iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule capacitance cathode upwards with B phase lower brachium pontis the i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis i+ 1 sub-module capacitance positive pole is connected; The of the lower brachium pontis of B phase kindividual submodule, its submodule capacitance cathode is the lower brachium pontis the with B phase upwards k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the k+ 1 sub-module I GBT module is connected with diode connection point; The lower brachium pontis of B phase the jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule IGBT module and diode connection point be the lower brachium pontis the with B phase upwards j-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the j+ 1 sub-module I GBT module is connected with diode connection point; The lower brachium pontis of B phase the nindividual submodule, its submodule IGBT module and diode connection point be the lower brachium pontis the with B phase upwards n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is connected with DC bus negative pole downwards.The connected mode of C phase upper and lower bridge arm submodule is consistent with A phase or B.
The centralized half-bridge of the above-mentioned auxiliary capacitor based on inequality constraints/mono-clamp series-parallel connection MMC is from all pressing topology, from all pressing in subsidiary loop, first auxiliary capacitor is in parallel by clamp diode with second auxiliary capacitor, and second auxiliary capacitor positive pole connects auxiliary IGBT module first auxiliary capacitor negative pole connection clamp diode and be incorporated to DC bus positive pole; 3rd auxiliary capacitor is in parallel by clamp diode with the 4th auxiliary capacitor, and the 3rd auxiliary capacitor negative pole connects auxiliary IGBT module the 4th auxiliary capacitor positive pole connection clamp diode and be incorporated to DC bus negative pole.Clamp diode, by the 1st sub-module capacitance and first auxiliary capacitor positive pole in brachium pontis in auxiliary switch connection A phase; The is connected in A phase in brachium pontis by auxiliary switch iindividual sub-module capacitance and i+ 1 sub-module capacitance positive pole, wherein ivalue be 1 ~ n-1; The is connected in A phase in brachium pontis by auxiliary switch nindividual sub-module capacitance brachium pontis 1st sub-module capacitance positive pole lower to A phase; The is connected in the lower brachium pontis of A phase by auxiliary switch ithe lower brachium pontis of individual sub-module capacitance and A phase the i+ 1 sub-module capacitance positive pole, wherein ivalue be 1 ~ n-1; The is connected in the lower brachium pontis of A phase by auxiliary switch nindividual sub-module capacitance and the 3rd auxiliary capacitor positive pole.Clamp diode, connects the negative pole of the 1st sub-module capacitance and second auxiliary capacitor in brachium pontis in B phase by auxiliary switch; The is connected in B phase in brachium pontis by auxiliary switch iindividual sub-module capacitance and ithe negative pole of+1 sub-module capacitance, wherein ivalue be 1 ~ n-1; The is connected in B phase in brachium pontis by auxiliary switch nindividual sub-module capacitance and B phase descend the negative pole of brachium pontis the 1st sub-module capacitance; The is connected in the lower brachium pontis of B phase by auxiliary switch ithe lower brachium pontis of individual sub-module capacitance and B phase the ithe negative pole of+1 sub-module capacitance, wherein ivalue be 1 ~ n-1; The is connected in the lower brachium pontis of B phase by auxiliary switch nthe negative pole of individual sub-module capacitance and the 4th auxiliary capacitor.The annexation of C phase clamp diode is corresponding with the annexation of its submodule.
Accompanying drawing explanation
Fig. 1 is the structural representation of half-bridge submodule;
Fig. 2 is the structural representation of single clamp submodule;
Fig. 3 is from all pressing topology based on the centralized half-bridge of auxiliary capacitor/mono-clamp series-parallel connection MMC of inequality constraints.
Embodiment
For setting forth performance of the present invention and operation principle further, be specifically described to the constituted mode invented and operation principle below in conjunction with accompanying drawing.But be not limited to Fig. 3 based on half-bridge/mono-clamp series-parallel connection MMC of this principle from all pressing topology.
With reference to figure 3, the centralized half-bridge of the auxiliary capacitor based on inequality constraints/mono-clamp series-parallel connection MMC from all pressing topology, comprises the half-bridge/mono-clamp series-parallel connection MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by kindividual half-bridge submodule, n- kindividual single clamp submodule and 1 brachium pontis reactor are in series; Comprise by 6 nindividual auxiliary switch (6 kindividual mechanical switch, 6 n-6 kindividual IGBT module), 6 n+ 7 clamp diodes, 4 auxiliary capacitors, 2 auxiliary IGBT module compositions from all pressing subsidiary loop.
In half-bridge/mono-clamp series-parallel connection MMC model, A phase upper and lower bridge arm, in single clamp submodule, diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole.1st submodule of brachium pontis in A phase, its submodule electric capacity c- au-_1negative pole is connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity c- au-_ i negative pole downwards with the of brachium pontis in A phase i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase i-1 sub-module capacitance c -au-_ i-1 negative pole is connected; In A phase brachium pontis kindividual half-bridge submodule, its submodule electric capacity c -au-_ k negative pole downwards with the of brachium pontis in A phase k+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase k-1 sub-module capacitance c- au-_ k-1 negative pole is connected; In A phase brachium pontis jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule diode and IGBT module tie-point be brachium pontis the downwards and in A phase j+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with brachium pontis in A phase j-1 submodule diode is connected with IGBT module tie-point; Brachium pontis in A phase nindividual submodule, its submodule diode and IGBT module tie-point are downwards through two brachium pontis reactors l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, its submodule IGBT module mid point upwards with the of brachium pontis in A phase n-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity c- al-_ i negative pole downwards with A phase time brachium pontis the i+ 1 sub-module I GBT module mid point is connected, and its IGBT module mid point is the lower brachium pontis the with A phase upwards i-1 sub-module capacitance c- al-_ i-1 negative pole is connected; The of the lower brachium pontis of A phase kindividual submodule, its submodule electric capacity c -al_ k negative pole downwards with A phase time brachium pontis the k+ 1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards k-1 sub-module capacitance c- al-_ k-1 negative pole is connected; The lower brachium pontis of A phase the jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule diode and IGBT module tie-point downwards with A phase time brachium pontis the j+ 1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards j-1 submodule diode is connected with IGBT module tie-point; The lower brachium pontis of A phase the nindividual submodule diode is connected with DC bus negative pole downwards with IGBT module tie-point, its submodule IGBT module mid point upwards with A phase lower brachium pontis the n-1 submodule diode is connected with IGBT module tie-point.B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole, the 1st submodule of upper brachium pontis, its submodule electric capacity c -bu-_1 positive pole is upwards connected with DC bus positive pole, its submodule IGBT module mid point downwards with the 2nd sub-module capacitance of brachium pontis in B phase c -bu-_2positive pole is connected; In B phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity c- bu-_ i positive pole upwards with of brachium pontis in B phase i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase i+ 1 sub-module capacitance c- bu-_ i+ 1 positive pole is connected; In B phase brachium pontis kindividual submodule, its submodule electric capacity c- bu-_ k positive pole upwards with of brachium pontis in B phase k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the k+ 1 sub-module I GBT module is connected with diode connection point; In B phase brachium pontis jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule IGBT module and diode connection point upwards with brachium pontis in B phase j-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the j+ 1 sub-module I GBT module is connected with diode connection point; Brachium pontis in B phase nindividual submodule, its submodule IGBT module and diode connection point upwards with brachium pontis in B phase n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is downwards through two brachium pontis reactors l 0with the 1st sub-module capacitance of the lower brachium pontis of B phase c -bl-_1positive pole is connected; The of the lower brachium pontis of B phase iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity c -bl_ i positive pole upwards with B phase lower brachium pontis the i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis i+ 1 sub-module capacitance c- bl-_ i+ 1 positive pole is connected; The of the lower brachium pontis of B phase kindividual submodule, its submodule electric capacity c -bl_ k positive pole is the lower brachium pontis the with B phase upwards k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the k+ 1 sub-module I GBT module is connected with diode connection point; The lower brachium pontis of B phase the jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule IGBT module and diode connection point be the lower brachium pontis the with B phase upwards j-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the j+ 1 sub-module I GBT module is connected with diode connection point; The lower brachium pontis of B phase the nindividual submodule, its submodule IGBT module and diode connection point be the lower brachium pontis the with B phase upwards n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is connected with DC bus negative pole downwards.The connected mode of C phase upper and lower bridge arm submodule is consistent with A.
From all pressing in subsidiary loop, auxiliary capacitor c 1with auxiliary capacitor c 2in parallel by clamp diode, auxiliary capacitor c 2positive pole connects auxiliary IGBT module t 1, auxiliary capacitor c 1negative pole connects clamp diode and is incorporated to DC bus positive pole; Auxiliary capacitor c 3with auxiliary capacitor c 4in parallel by clamp diode, auxiliary capacitor c 3negative pole connects auxiliary IGBT module t 2, auxiliary capacitor c 4positive pole connects clamp diode and is incorporated to DC bus negative pole.Clamp diode, passes through auxiliary switch k au_121st sub-module capacitance in brachium pontis in connection A phase c -au-_1with auxiliary capacitor c 1positive pole; Pass through auxiliary switch k au_ i2 , k au_( i+ 1) 2 to connect in A phase in brachium pontis the iindividual sub-module capacitance c -au-_ i with i+ 1 sub-module capacitance c -au-_ i+ 1 positive pole, wherein ivalue be 1 ~ k-1; Pass through auxiliary switch k au_ k2 , t au_ k+ 1 to connect in A phase in brachium pontis the kindividual sub-module capacitance c -au-_ k with k+ 1 sub-module capacitance c- au_ k+ 1 positive pole; Pass through auxiliary switch t au_ j , t au_ j+ 1 to connect in A phase in brachium pontis the jindividual sub-module capacitance c -au-_ j with j+ 1 sub-module capacitance c -au-_ j+ 1 positive pole, wherein jvalue be k+ 1 ~ n-1; Pass through auxiliary switch t au_ n , k al_12to connect in A phase in brachium pontis the nindividual sub-module capacitance c- au_ n brachium pontis 1st sub-module capacitance lower to A phase c -al-_1positive pole; Pass through auxiliary switch k al_ i2 , k al_( i+ 1) 2 to connect in the lower brachium pontis of A phase the iindividual sub-module capacitance c -al-_ i with i+ 1 sub-module capacitance c -al-_ i+ 1 positive pole, wherein ivalue be 1 ~ k-1; Pass through auxiliary switch k al_ k2 , t al_ k+ 1 to connect in the lower brachium pontis of A phase the kindividual sub-module capacitance c- al-_ k with k+ 1 sub-module capacitance c- al-_ k+ 1 positive pole; Pass through auxiliary switch t al_ j , t al_ j+ 1 to connect in the lower brachium pontis of A phase the jindividual sub-module capacitance c -al_ j with j+ 1 sub-module capacitance c -al-_ j+ 1 positive pole, wherein jvalue be k+ 1 ~ n-1; Pass through auxiliary switch t al_ n to connect in the lower brachium pontis of A phase the nindividual sub-module capacitance c -al_ n with auxiliary capacitor c 3positive pole.Clamp diode, passes through auxiliary switch k bu_121st sub-module capacitance in brachium pontis in connection B phase c -bu-_1with auxiliary capacitor c 2negative pole; Pass through auxiliary switch k bu_ i2 , k bu_( i+ 1) 2 to connect in B phase in brachium pontis the iindividual sub-module capacitance c- bu-_ i with i+ 1 sub-module capacitance c- bu-_ i+ 1 negative pole, wherein ivalue be 1 ~ k-1; Pass through auxiliary switch k bu_ k2 , t bu_ k+ 1 to connect in B phase in brachium pontis the kindividual sub-module capacitance c- bu-_ k with k+ 1 sub-module capacitance c- bu-_ k+ 1 negative pole; Pass through auxiliary switch t bu_ j , t bu_ j+ 1 to connect in B phase in brachium pontis the jindividual sub-module capacitance c- bu-_ j with j+ 1 sub-module capacitance c- bu-_ j+ 1 negative pole, wherein jvalue be k+ 1 ~ n-1; Pass through auxiliary switch t bu_ n , k bl_12to connect in B phase in brachium pontis the nindividual sub-module capacitance c- bu-_ n with the 1st sub-module capacitance in the lower brachium pontis of B phase c- bl_1negative pole; Pass through auxiliary switch k bl_ i2 , k bl_( i+ 1) 2 to connect in the lower brachium pontis of B phase the iindividual sub-module capacitance c- bl-_ i with i+ 1 sub-module capacitance c- bl-_ i+ 1 negative pole, wherein ivalue be 1 ~ k-1; Pass through auxiliary switch k bl_ k2 , t bl_ k+ 1 to connect in the lower brachium pontis of B phase the kindividual sub-module capacitance c- bl_ k with k+ 1 sub-module capacitance c- bl-_ k+ 1 negative pole; Pass through auxiliary switch t bl_ j , t bl_ j+ 1 to connect in the lower brachium pontis of B phase the jindividual sub-module capacitance c- bl-_ j with j+ 1 sub-module capacitance c- bl_ j+ 1 negative pole, wherein jvalue be k+ 1 ~ n-1; Pass through auxiliary switch t bl_ n to connect in the lower brachium pontis of B phase the nindividual sub-module capacitance c -bl-_ n with auxiliary capacitor c 4negative pole.The annexation of C phase clamp diode is consistent with A.
Under normal circumstances, from all pressing in subsidiary loop 6 nindividual auxiliary switch k au_ i2 , k al_ i2 , k bu_ i2 , k bl_ i2 , k cu_ i2 , k cl_ i2 , t au_ j , t al_ j , t bu_ j , t bl_ j , t cu_ j , t cl_ j normally closed, wherein ivalue be 1 ~ k, jvalue be k+ 1 ~ n, brachium pontis first sub-module capacitance in A phase c- au-_1during bypass, now auxiliary IGBT module t 1disconnect, submodule electric capacity c -au-_1with auxiliary capacitor c 1in parallel by clamp diode; Brachium pontis in A phase iindividual sub-module capacitance c- au-_ i during bypass, wherein ivalue be 2 ~ n, submodule electric capacity c- au-_ i with submodule electric capacity c- au-_ i-1 in parallel by clamp diode; Lower brachium pontis first the sub-module capacitance of A phase c- al_1during bypass, submodule electric capacity c- al-_1by clamp diode, two brachium pontis reactors l 0with submodule electric capacity c- au-_ n in parallel; The lower brachium pontis of A phase the iindividual sub-module capacitance c- al_ i during bypass, wherein ivalue be 2 ~ n, submodule electric capacity c- al-_ i with submodule electric capacity c- al_ i-1 in parallel by clamp diode; Auxiliary IGBT module t 2time closed, auxiliary capacitor c 3by clamp diode and submodule electric capacity c- al_ n in parallel.
Under normal circumstances, from all pressing in subsidiary loop 6 nindividual auxiliary switch k au_ i2 , k al_ i2 , k bu_ i2 , k bl_ i2 , k cu_ i2 , k cl_ i2 , t au_ j , t al_ j , t bu_ j , t bl_ j , t cu_ j , t cl_ j normally closed, wherein ivalue be 1 ~ k, jvalue be k+ 1 ~ n, auxiliary IGBT module t 1time closed, auxiliary capacitor c 2with submodule electric capacity c- bu-_1in parallel by clamp diode; Brachium pontis in B phase iindividual sub-module capacitance c- bu-_ i during bypass, wherein ivalue be 1 ~ n-1, submodule electric capacity c- bu-_ i with submodule electric capacity c- bu-_ i+ 1 in parallel by clamp diode; Brachium pontis in B phase nindividual sub-module capacitance c- bu_ n during bypass, submodule electric capacity c -bu-_ n by clamp diode, two brachium pontis reactors l 0with submodule electric capacity c- bl-_1in parallel; The lower brachium pontis of B phase the iindividual sub-module capacitance c- bl_ i during bypass, wherein ivalue be 1 ~ n-1, submodule electric capacity c -bl-_ i with submodule electric capacity c- bl_ i+ 1 in parallel by clamp diode; The lower brachium pontis of B phase the nindividual sub-module capacitance c- bl_ n during bypass, submodule electric capacity c- bl-_ n with auxiliary capacitor c- 4in parallel by clamp diode.Above-mentioned auxiliary IGBT module t 1triggering signal consistent with " the logic sum " of brachium pontis first submodule triggering signal in A, C phase; Auxiliary IGBT module t 2the lower brachium pontis of triggering signal and B phase the nthe triggering signal of individual submodule is consistent.
In the process of orthogonal stream energy conversion, each submodule alternately drops into, bypass, auxiliary IGBT module t 1, t 2be alternately closed, turn off, between A, B phase upper and lower bridge arm, capacitance voltage is under the effect of clamp diode, meets lower column constraint:
Auxiliary capacitor c 1, c 2between voltage, auxiliary capacitor c 3, c 4inequality constraints condition is there is between voltage:
It can thus be appreciated that, at half-bridge/mono-clamp series-parallel connection MMC in the dynamic process completing the conversion of orthogonal stream energy, meet constraints below:
The constraints that between C, B phase upper and lower bridge arm, the constraints of capacitance voltage is alternate with A, B is consistent.
Illustrated from above-mentioned, this half-bridge/mono-clamp series-parallel connection MMC topology possesses submodule capacitor voltage from the ability of equalization.
Finally should be noted that: described embodiment is only some embodiments of the present application, instead of whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the application's protection.

Claims (6)

1. based on the centralized half-bridge of auxiliary capacitor/mono-clamp series-parallel connection MMC of inequality constraints from all pressing topology, it is characterized in that: comprise the half-bridge/mono-clamp series-parallel connection MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by kindividual half-bridge submodule, n- kindividual single clamp submodule and 1 brachium pontis reactor are in series; Comprise by 6 nindividual auxiliary switch (6 kindividual mechanical switch, 6 n-6 kindividual IGBT module), 6 n+ 7 clamp diodes, 4 auxiliary capacitors c 1, c 2 , C 3, c 4, 2 auxiliary IGBT module t 1, t 2what form all presses subsidiary loop certainly.
2. the centralized half-bridge of the auxiliary capacitor based on inequality constraints according to right 1/mono-clamp series-parallel connection MMC is from all pressing topology, it is characterized in that: A phase upper and lower bridge arm, in single clamp submodule, diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole; 1st submodule of brachium pontis in A phase, its submodule electric capacity c- au-_1negative pole is connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity c- au-_ i negative pole downwards with the of brachium pontis in A phase i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase i-1 sub-module capacitance c -au-_ i-1 negative pole is connected; In A phase brachium pontis kindividual half-bridge submodule, its submodule electric capacity c -au-_ k negative pole downwards with the of brachium pontis in A phase k+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase k-1 sub-module capacitance c- au-_ k-1 negative pole is connected; In A phase brachium pontis jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule diode and IGBT module tie-point be brachium pontis the downwards and in A phase j+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with brachium pontis in A phase j-1 submodule diode is connected with IGBT module tie-point; Brachium pontis in A phase nindividual submodule, its submodule diode and IGBT module tie-point are downwards through two brachium pontis reactors l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, its submodule IGBT module mid point upwards with the of brachium pontis in A phase n-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity c- al-_ i negative pole downwards with A phase time brachium pontis the i+ 1 sub-module I GBT module mid point is connected, and its IGBT module mid point is the lower brachium pontis the with A phase upwards i-1 sub-module capacitance c- al-_ i-1 negative pole is connected; The of the lower brachium pontis of A phase kindividual submodule, its submodule electric capacity c -al_ k negative pole downwards with A phase time brachium pontis the k+ 1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards k-1 sub-module capacitance c- al-_ k-1 negative pole is connected; The lower brachium pontis of A phase the jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule diode and IGBT module tie-point downwards with A phase time brachium pontis the j+ 1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards j-1 submodule diode is connected with IGBT module tie-point; The lower brachium pontis of A phase the nindividual submodule diode is connected with DC bus negative pole downwards with IGBT module tie-point, its submodule IGBT module mid point upwards with A phase lower brachium pontis the n-1 submodule diode is connected with IGBT module tie-point; B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole, the 1st submodule of upper brachium pontis, its submodule electric capacity c -bu-_1 positive pole is upwards connected with DC bus positive pole, its submodule IGBT module mid point downwards with the 2nd sub-module capacitance of brachium pontis in B phase c -bu-_2positive pole is connected; In B phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity c- bu-_ i positive pole upwards with of brachium pontis in B phase i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase i+ 1 sub-module capacitance c- bu-_ i+ 1 positive pole is connected; In B phase brachium pontis kindividual submodule, its submodule electric capacity c- bu-_ k positive pole upwards with of brachium pontis in B phase k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the k+ 1 sub-module I GBT module is connected with diode connection point; In B phase brachium pontis jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule IGBT module and diode connection point upwards with brachium pontis in B phase j-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the j+ 1 sub-module I GBT module is connected with diode connection point; Brachium pontis in B phase nindividual submodule, its submodule IGBT module and diode connection point upwards with brachium pontis in B phase n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is downwards through two brachium pontis reactors l 0with the 1st sub-module capacitance of the lower brachium pontis of B phase c -bl-_1positive pole is connected; The of the lower brachium pontis of B phase iindividual submodule, wherein ivalue be 2 ~ k-1, its submodule electric capacity c -bl_ i positive pole upwards with B phase lower brachium pontis the i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis i+ 1 sub-module capacitance c- bl-_ i+ 1 positive pole is connected; The of the lower brachium pontis of B phase kindividual submodule, its submodule electric capacity c -bl_ k positive pole is the lower brachium pontis the with B phase upwards k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the k+ 1 sub-module I GBT module is connected with diode connection point; The lower brachium pontis of B phase the jindividual submodule, wherein jvalue be k+ 2 ~ n-1, its submodule IGBT module and diode connection point be the lower brachium pontis the with B phase upwards j-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the j+ 1 sub-module I GBT module is connected with diode connection point; The lower brachium pontis of B phase the nindividual submodule, its submodule IGBT module and diode connection point be the lower brachium pontis the with B phase upwards n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is connected with DC bus negative pole downwards; The connected mode of C phase upper and lower bridge arm submodule can be consistent with A, also can be consistent with B; Due to the existence of single clamp submodule, unnecessary configuration thyristor between the upper and lower output line of half-bridge submodule; Therefore A, B, C phase upper and lower bridge arm submodule be parallel with mechanical switch between output line up and down k au_ i1 , k al_ i1 , k bu_ i1 , k bl_ i1 , k cu_ i1 , k cl_ i1 , k au_ j , k al _ j , k bu_ j , k bl_ j , k cu_ j , k cl_ j , wherein ivalue be 1 ~ k, jvalue be k+ 1 ~ n; A, B, C three-phase status that above-mentioned annexation is formed is consistent, and other topologys after three-phase symmetrized in turn are in interest field.
3. the centralized half-bridge of the auxiliary capacitor based on inequality constraints according to right 1/mono-clamp series-parallel connection MMC, from all pressing topology, is characterized in that: from all pressing in subsidiary loop, auxiliary capacitor c 1with auxiliary capacitor c 2in parallel by clamp diode, auxiliary capacitor c 2positive pole connects auxiliary IGBT module t 1, auxiliary capacitor c 1negative pole connects clamp diode and is incorporated to DC bus positive pole; Auxiliary capacitor c 3with auxiliary capacitor c 4in parallel by clamp diode, auxiliary capacitor c 3negative pole connects auxiliary IGBT module t 2, auxiliary capacitor c 4positive pole connects clamp diode and is incorporated to DC bus negative pole; Clamp diode, passes through auxiliary switch k au_121st sub-module capacitance in brachium pontis in connection A phase c -au-_1with auxiliary capacitor c 1positive pole; Pass through auxiliary switch k au_ i2 , k au_( i+ 1) 2 to connect in A phase in brachium pontis the iindividual sub-module capacitance c -au-_ i with i+ 1 sub-module capacitance c -au-_ i+ 1 positive pole, wherein ivalue be 1 ~ k-1; Pass through auxiliary switch k au_ k2 , t au_ k+ 1 to connect in A phase in brachium pontis the kindividual sub-module capacitance c -au-_ k with k+ 1 sub-module capacitance c- au_ k+ 1 positive pole; Pass through auxiliary switch t au_ j , t au_ j+ 1 to connect in A phase in brachium pontis the jindividual sub-module capacitance c -au-_ j with j+ 1 sub-module capacitance c -au-_ j+ 1 positive pole, wherein jvalue be k+ 1 ~ n-1; Pass through auxiliary switch t au_ n , k al_12to connect in A phase in brachium pontis the nindividual sub-module capacitance c- au_ n brachium pontis 1st sub-module capacitance lower to A phase c -al-_1positive pole; Pass through auxiliary switch k al_ i2 , k al_( i+ 1) 2 to connect in the lower brachium pontis of A phase the iindividual sub-module capacitance c -al-_ i with i+ 1 sub-module capacitance c -al-_ i+ 1 positive pole, wherein ivalue be 1 ~ k-1; Pass through auxiliary switch k al_ k2 , t al_ k+ 1 to connect in the lower brachium pontis of A phase the kindividual sub-module capacitance c- al-_ k with k+ 1 sub-module capacitance c- al-_ k+ 1 positive pole; Pass through auxiliary switch t al_ j , t al_ j+ 1 to connect in the lower brachium pontis of A phase the jindividual sub-module capacitance c -al_ j with j+ 1 sub-module capacitance c -al-_ j+ 1 positive pole, wherein jvalue be k+ 1 ~ n-1; Pass through auxiliary switch t al_ n to connect in the lower brachium pontis of A phase the nindividual sub-module capacitance c -al_ n with auxiliary capacitor c 3positive pole; Clamp diode, passes through auxiliary switch k bu_121st sub-module capacitance in brachium pontis in connection B phase c -bu-_1with auxiliary capacitor c 2negative pole; Pass through auxiliary switch k bu_ i2 , k bu_( i+ 1) 2 to connect in B phase in brachium pontis the iindividual sub-module capacitance c- bu-_ i with i+ 1 sub-module capacitance c- bu-_ i+ 1 negative pole, wherein ivalue be 1 ~ k-1; Pass through auxiliary switch k bu_ k2 , t bu_ k+ 1 to connect in B phase in brachium pontis the kindividual sub-module capacitance c- bu-_ k with k+ 1 sub-module capacitance c- bu-_ k+ 1 negative pole; Pass through auxiliary switch t bu_ j , t bu_ j+ 1 to connect in B phase in brachium pontis the jindividual sub-module capacitance c- bu-_ j with j+ 1 sub-module capacitance c- bu-_ j+ 1 negative pole, wherein jvalue be k+ 1 ~ n-1; Pass through auxiliary switch t bu_ n , k bl_12to connect in B phase in brachium pontis the nindividual sub-module capacitance c- bu-_ n with the 1st sub-module capacitance in the lower brachium pontis of B phase c- bl_1negative pole; Pass through auxiliary switch k bl_ i2 , k bl_( i+ 1) 2 to connect in the lower brachium pontis of B phase the iindividual sub-module capacitance c- bl-_ i with i+ 1 sub-module capacitance c- bl-_ i+ 1 negative pole, wherein ivalue be 1 ~ k-1; Pass through auxiliary switch k bl_ k2 , t bl_ k+ 1 to connect in the lower brachium pontis of B phase the kindividual sub-module capacitance c- bl_ k with k+ 1 sub-module capacitance c- bl-_ k+ 1 negative pole; Pass through auxiliary switch t bl_ j , t bl_ j+ 1 to connect in the lower brachium pontis of B phase the jindividual sub-module capacitance c- bl-_ j with j+ 1 sub-module capacitance c- bl_ j+ 1 negative pole, wherein jvalue be k+ 1 ~ n-1; Pass through auxiliary switch t bl_ n to connect in the lower brachium pontis of B phase the nindividual sub-module capacitance c -bl-_ n with auxiliary capacitor c 4negative pole; The annexation of C phase clamp diode is corresponding with the annexation of its submodule; In above-mentioned A, B, C three-phase 6 nindividual auxiliary switch k au_ i2 , k al_ i2 , k bu_ i2 , k bl_ i2 , k cu_ i2 , k cl_ i2 , t au_ j , t al_ j , t bu_ j , t bl_ j , t cu_ j , t cl_ j , wherein ivalue be 1 ~ k, jvalue be k+ 1 ~ n, 6 n+ 7 clamp diodes, 4 auxiliary capacitors c 1, c 2, c 3, c 4and 2 auxiliary IGBT module t 1, t 2, common formation is from all pressing subsidiary loop.
4. the centralized half-bridge of the auxiliary capacitor based on inequality constraints according to right 1/mono-clamp series-parallel connection MMC from all pressing topology, is characterized in that: during normal condition, from all pressing in subsidiary loop 6 nindividual auxiliary switch k au_ i2 , k al_ i2 , k bu_ i2 , k bl_ i2 , k cu_ i2 , k cl_ i2 , t au_ j , t al_ j , t bu_ j , t bl_ j , t cu_ j , t cl_ j normally closed, wherein ivalue be 1 ~ k, jvalue be k+ 1 ~ n; During failure condition, 6 n-6 kindividual auxiliary switch t au_ j , t al_ j , t bu_ j , t bl_ j , t cu_ j , t cl_ j disconnect, wherein jvalue be k+ 1 ~ n; Under normal circumstances, brachium pontis first sub-module capacitance in A phase c- au-_1during bypass, now auxiliary IGBT module t 1disconnect, submodule electric capacity c -au-_1with auxiliary capacitor c 1in parallel by clamp diode; Brachium pontis in A phase iindividual sub-module capacitance c- au-_ i during bypass, wherein ivalue be 2 ~ n, submodule electric capacity c- au-_ i with submodule electric capacity c- au-_ i-1 in parallel by clamp diode; Lower brachium pontis first the sub-module capacitance of A phase c- al_1during bypass, submodule electric capacity c- al-_1by clamp diode, two brachium pontis reactors l 0with submodule electric capacity c- au-_ n in parallel; The lower brachium pontis of A phase the iindividual sub-module capacitance c- al_ i during bypass, wherein ivalue be 2 ~ n, submodule electric capacity c- al-_ i with submodule electric capacity c- al_ i-1 in parallel by clamp diode; Auxiliary IGBT module t 2time closed, auxiliary capacitor c 3by clamp diode and submodule electric capacity c- al_ n in parallel; Auxiliary IGBT module t 1time closed, auxiliary capacitor c 2with submodule electric capacity c- bu-_1in parallel by clamp diode; Brachium pontis in B phase iindividual sub-module capacitance c- bu-_ i during bypass, wherein ivalue be 1 ~ n-1, submodule electric capacity c- bu-_ i with submodule electric capacity c- bu-_ i+ 1 in parallel by clamp diode; Brachium pontis in B phase nindividual sub-module capacitance c- bu_ n during bypass, submodule electric capacity c -bu-_ n by clamp diode, two brachium pontis reactors l 0with submodule electric capacity c- bl-_1in parallel; The lower brachium pontis of B phase the iindividual sub-module capacitance c- bl_ i during bypass, wherein ivalue be 1 ~ n-1, submodule electric capacity c -bl-_ i with submodule electric capacity c- bl_ i+ 1 in parallel by clamp diode; The lower brachium pontis of B phase the nindividual sub-module capacitance c- bl_ n during bypass, submodule electric capacity c- bl-_ n with auxiliary capacitor c- 4in parallel by clamp diode; Wherein auxiliary IGBT module t 1triggering signal consistent with " the logic sum " of brachium pontis first submodule triggering signal in A, C phase; Auxiliary IGBT module t 2the lower brachium pontis of triggering signal and B phase the nthe triggering signal of individual submodule is consistent; In the process of orthogonal stream energy conversion, each submodule alternately drops into, bypass, auxiliary IGBT module t 1, t 2be alternately closed, turn off, A phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint, u c1 >= u c-au_1 >= u c-au_2 >= u c-au_ n >= u c-al_1 >= u c-al_2 >= u c-al_ n >= u c3 ; B phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint, u c2 ≤ u c-bu_1 ≤ u c-bu_2 ≤ u c-bu_ n ≤ u c-bl_1 ≤ u c-bl_2 ≤ u c-bl_ n ≤ u c4 ; Against auxiliary capacitor c 1, c 2between voltage, auxiliary capacitor c 3, c 4two inequality constraintss between voltage, u c1 ≤ u c2 , u c3 >= u c4 , in A, B phase upper and lower bridge arm 4 nindividual sub-module capacitance, c au_ i , C al_ i , c bu_ i , c bl_ i , wherein ivalue is 1 ~ n, and auxiliary capacitor c 1, c 2, c 3, c 4, voltage be in self-balancing state, topological A, B are alternate possesses submodule capacitor voltage from the ability of equalization; If the form of the composition of C phase is consistent with A in topology, then the constraints of C, B capacitive coupling voltage is consistent with capacitance voltage constraints between A, B; If the form of the composition of C phase is consistent with B in topology, then the constraints of A, C capacitive coupling voltage is consistent with capacitance voltage constraints between A, B, and topology possesses submodule capacitor voltage from the ability of equalization; Realize on the basis of the single-phase flowing of capacitive energy between adjacent submodule mutually utilizing clamp diode; rely on the inequality constraints between auxiliary capacitor; the alternate flowing realizing capacitive energy forms the peripheral passage of capacitive energy; and then keep alternate submodule capacitor voltage to stablize, be the protection content of this right.
5. the centralized half-bridge of the auxiliary capacitor based on inequality constraints according to right 1/mono-clamp series-parallel connection MMC, from all pressing topology, is characterized in that: auxiliary capacitor c 1, c 2, c 3, c 4both as the passage of A, B capacitive coupling energy exchange, again as the passage of B, C capacitive coupling energy exchange; Function focus utilization in topology of auxiliary capacitor all presses the device consumption in subsidiary loop certainly with minimizing; Auxiliary capacitor c 1, c 2function concentrate, auxiliary capacitor c 3, c 4function do not concentrate; Auxiliary capacitor c 1, c 2function do not concentrate, auxiliary capacitor c 3, c 4function concentrate topology in interest field.
6. the centralized half-bridge of the auxiliary capacitor based on inequality constraints according to right 1/mono-clamp series-parallel connection MMC is from all pressing topology, it is characterized in that: the centralized half-bridge of the auxiliary capacitor based on inequality constraints/mono-clamp series-parallel connection MMC is from all pressing topology, flexible direct-current transmission field can not only be directly applied to as multi-level voltage source current converter, also by forming STATCOM (STATCOM), Research on Unified Power Quality Conditioner (UPQC), the application of installations such as THE UPFC (UPFC) are in flexible AC transmission field; Other application scenarios of this invention topology of indirect utilization and thought are in interest field.
CN201610047421.9A 2016-01-25 2016-01-25 Auxiliary capacitance concentrated type half-bridge/single-clamping parallel-serial MMC self-voltage-sharing topology based on inequality constraints Pending CN105450071A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101253675A (en) * 2005-08-30 2008-08-27 西门子公司 Converter circuit comprising distributed energy stores
CN102223080A (en) * 2011-06-10 2011-10-19 浙江大学 Mixed clamping back-to-back multi-level AC-DC-AC switching circuit
CN102832841A (en) * 2012-08-27 2012-12-19 清华大学 Modularized multi-level converter with auxiliary diode
CN203608108U (en) * 2013-12-17 2014-05-21 山东大学 Capacitance voltage self-balancing circuit of modular multilevel converter
CN205960989U (en) * 2016-01-25 2017-02-15 华北电力大学 Supplementary centralized half -bridge of electric capacity / single clamp series -parallel connection MMC is from voltage -sharing topology based on inequality constraint

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101253675A (en) * 2005-08-30 2008-08-27 西门子公司 Converter circuit comprising distributed energy stores
CN102223080A (en) * 2011-06-10 2011-10-19 浙江大学 Mixed clamping back-to-back multi-level AC-DC-AC switching circuit
CN102832841A (en) * 2012-08-27 2012-12-19 清华大学 Modularized multi-level converter with auxiliary diode
CN203608108U (en) * 2013-12-17 2014-05-21 山东大学 Capacitance voltage self-balancing circuit of modular multilevel converter
CN205960989U (en) * 2016-01-25 2017-02-15 华北电力大学 Supplementary centralized half -bridge of electric capacity / single clamp series -parallel connection MMC is from voltage -sharing topology based on inequality constraint

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
CONGZHE GAO 等: "A DC-Link Voltage Self-Balance Method for a Diode-Clamped Modular Multilevel Converter With Minimum Number of Voltage Sensors", 《IEEE TRANSACTIONS ON POWER ELECTRONICS》 *
XIN ZHAO 等: "Research on submodule capacitance voltage balancing of MMC based on carrier phase shifted SPWM technique", 《CHINA INTERNATIONAL CONFERENCE ON ELECTRICITY DISTRIBUTION》 *

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