CN105261343A - GOA (Gate Driver On Array) driving circuit - Google Patents
GOA (Gate Driver On Array) driving circuit Download PDFInfo
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- CN105261343A CN105261343A CN201510824291.0A CN201510824291A CN105261343A CN 105261343 A CN105261343 A CN 105261343A CN 201510824291 A CN201510824291 A CN 201510824291A CN 105261343 A CN105261343 A CN 105261343A
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Abstract
The invention discloses a GOA (Gate Driver On Array) driving circuit, which comprises multiple stages of GOA driving modules. Each stage of GOA driving module comprises a first driving unit, a second driving unit and an awaken driving unit, wherein the first driving unit is used for outputting a row scanning signal during a row scanning period; the output end of the second driving unit is coupled with the output end of the first driving unit for maintaining an output signal at the output end during the row scanning period and outputting a scanning signal corresponding to a touch control scanning signal during a touch control scanning period; and the awakening driving unit is used for enabling each stage of GOA driving module to output an effective row signal at the same time when a black screen is awakened. The GOA driving circuit can effectively eliminate instable factors existing in the circuit, and risks of circuit function failure are reduced.
Description
Technical field
The present invention relates to the driving field of liquid crystal display, particularly relate to a kind of GOA driving circuit.
Background technology
The driving circuit of traditional liquid crystal display is generally the outside integrated circuit module carried and is formed, as TAB (TapeAutomatedBonding) encapsulating structure generally adopted.And along with having the low temperature polycrystalline silicon (LTPS of superhigh current carrying transport factor characteristic, LowTemperaturePolysilicon) development of semiconductor thin-film transistor, integrated circuit technique based on panel periphery becomes the focus of research gradually, wherein typical application is array base palte row cutting technology (GOA, GateDriverOnArray).
GOA driving circuit utilizes liquid crystal display Array processing procedure will go (Gate) scanning drive signal circuit production to realize scanning the driving line by line of pixel cell on array base palte.GOA driving circuit can not only reduce the welding sequence of external integrated circuit, improves integrated level, and can also promote production capacity and reduce production cost, be the first-selection of small-medium size liquid crystal display product (such as mobile phone, PDA etc.).In addition, along with mobile intelligent process is accelerated day by day, the touch technology of small-medium size liquid crystal display also needs to obtain corresponding technical support, therefore proposes more requirements to driving circuit.But existing GOA driving circuit, due to the electric leakage of inside circuit node, many times can not make node remain on the magnitude of voltage of expectation, and then cause the timing error of circuit working, there is the risk of disabler.
To sum up, the risk improving to reduce its disabler to existing GOA driving circuit is needed badly.
Summary of the invention
One of technical matters to be solved by this invention reduces the disabler risk of GOA driving circuit.
In order to solve the problems of the technologies described above, the embodiment of the application provide firstly a kind of GOA driving circuit, is provided with multistage GOA driver module, and every grade of GOA driver module comprises: the first driver element, and for being expert at, scan period exports line scan signals; Second driver element, the output terminal of its output terminal and described first driver element couples, and maintains the output signal of output terminal, and export the sweep signal corresponding with touch scanning signals in touch-control scan period for scan period of being expert at; Wake driver element up, export effective row signal for making driver module at different levels when blank screen wakes up simultaneously.
Preferably, described every grade of GOA driver module also comprises: the first control module, for closing described first driver element; Second control module, for opening or closing described second driver element; Sweep signal control module, receives the line scan signals of previous stage or rear stage driver module, exports control signal to realize forward scan or reverse scan to the first driver element at the corresponding levels.
Preferably, described every grade of GOA driver module also comprises: electric leakage control unit, connects described first driver element and described sweep signal control module, prevents the control signal arriving described first driver element from producing leakage current.
Preferably, described first driver element comprises: the 4th on-off element, and its control end receives the control signal that described sweep signal control module exports, and exports line scan signals according to the second clock signal received; First electric capacity, its two ends are coupled in control end and the output terminal of described 4th on-off element respectively, for the current potential of the control end of the 4th on-off element described in pullup or pulldown.
Preferably, described second driver element comprises: the 5th on-off element, its output terminal is coupled in the output terminal of described 4th on-off element, and its input end is expert at indirect low level signal sweep time, in the sweep signal that touch-control sweep time is indirectly corresponding with touch scanning signals; 6th on-off element, the control end of its output terminal and described 5th on-off element couples, its control end and its input end short circuit, for opening described 5th on-off element after blank screen wakes up; Second electric capacity, its two ends are coupled in control end and the input end of described 5th on-off element respectively, for keeping the current potential of the control end of described 5th on-off element.
Preferably, described in wake driver element up and comprise: the 13 on-off element, the output terminal of its output terminal and described 4th on-off element couples, its control end and input end short circuit; 14 on-off element, its input end and output terminal are respectively coupled to input end and the control end of described 5th on-off element; Between blank screen awake period, described 13 on-off element and described 14 on-off element are all opened, the current potential of the control end of drop-down described 5th on-off element of described 14 on-off element, described 13 on-off element exports effective row signal at its output terminal and makes all horizontal scanning line signal standard-sized sheets.
Preferably, described electric leakage control unit comprises: the 15 on-off element, and its input end and output terminal are respectively coupled to the output terminal of described sweep signal control module and the control end of described 4th on-off element; The control termination high level signal of described 15 on-off element, and it closes the discharge loop of the control end of the 4th on-off element when the control end of described 4th on-off element is noble potential.
Preferably, described every grade of GOA driver module also comprises: sixteenmo closes element, and its input end and output terminal are respectively coupled to input end and the output terminal of described 5th on-off element; In touch-control scan period, described sixteenmo closes the element sweep signal corresponding with touch scanning signals with described 5th on-off element synchronism output.
Preferably, described every grade of GOA driver module also comprises: the 17 on-off element, and its output terminal is coupled to the output terminal of described sweep signal control module, its input termination low level signal; Described 17 on-off element is opened when driving circuit starts with the control end of drop-down described 4th on-off element to electronegative potential.
Preferably, for drive the driver module of odd-numbered line with for driving the driver module of even number line to adopt two clock cables separately, described two clock cable interlaced alternatives are connected to described driver module.
Compared with prior art, the one or more embodiments in such scheme can have the following advantages or beneficial effect by tool:
By controlling key node in driving circuit, effectively eliminating the labile factor existed in circuit, reducing the risk that circuit function lost efficacy.
Other advantages of the present invention, target, to set forth in the following description to a certain extent with feature, and to a certain extent, based on will be apparent to those skilled in the art to investigating hereafter, or can be instructed from the practice of the present invention.Target of the present invention and other advantages can by instructionss below, claims, and in accompanying drawing, specifically noted structure realizes and obtains.
Accompanying drawing explanation
Accompanying drawing is used to provide the further understanding of technical scheme to the application or prior art, and forms a part for instructions.Wherein, the expression accompanying drawing of the embodiment of the present application and the embodiment one of the application are used from the technical scheme explaining the application, but do not form the restriction to technical scheme.
Fig. 1 is the structural representation of every grade of driver module of the GOA driving circuit of the embodiment of the present application;
The corresponding relation schematic diagram of TP signal and Gate signal when Fig. 2 is touch-control scanning;
Fig. 3 is the sequential control figure of the GOA driving circuit shown in Fig. 1;
Fig. 4 is the structural representation of every grade of driver module of the GOA driving circuit of another embodiment of the application;
Fig. 5 is the sequential control figure of the GOA driving circuit shown in Fig. 4.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, to the present invention, how application technology means solve technical matters whereby, and the implementation procedure reaching relevant art effect can fully understand and implement according to this.Each feature in the embodiment of the present application and embodiment, can be combined with each other under prerequisite of not conflicting mutually, the technical scheme formed is all within protection scope of the present invention.
In order to meet the requirement of small size liquid crystal display, in the embodiment of the application, GOA line-scanning drive circuit is separately positioned on the both sides of viewing area, every a line pixel cell correspondence arranges one-level GOA driver module.Such as, by the left side of the drive module setting of odd-numbered line in viewing area, the drive module setting of even number line is in the right side of viewing area, and driving circuit entirety adopts interleaved type of drive, and left and right odd-even alternation exports.Structural representation below in conjunction with the n-th line odd line interlace driver module shown in Fig. 1 is described in detail.
As shown in Figure 1, every one-level driver module of the GOA driving circuit of the embodiment of the present application comprises: sweep signal control module 100, first driver element 200, second driver element 300, first control module 400, second control module 500, wake up driver element 600 and electric leakage control unit 700.
Sweep signal control module 100, receive the line scan signals of previous stage or rear stage driver module, export the control signal for opening or close the first driver element 200 at the corresponding levels, and the control signal exported can realize forward scan and the reverse scan of driving circuit respectively.Concrete, as shown in Figure 1, sweep signal control module 100 uses the line scan signals Gn-2/Gn+2 of the n-th-2 row or the n-th+2 row as the level number of delivering a letter, and uses U2D/D2U as selection input signal.Sweep signal control module 100 comprises the first on-off element NT9, second switch element NT10 and the 3rd on-off element NT1.Wherein, the line scan signals Gn-2 of the control end of NT9 and the lastrow at interval couples, and its input end connects the selection input signal U2D of scanning downwards.The line scan signals Gn+2 of the control end of NT10 and the next line at interval couples, and its input end connects the selection input signal D2U upwards scanned.Together with the output terminal of NT9 with NT10 is coupled in.The input end of the 3rd on-off element NT1 is coupled in the output terminal of NT9 and NT10, the output terminal of NT1 is as the output terminal of sweep signal control module 100, the control end of NT1 receives the first clock XCK, in the sequential of regulation, effective control signal can be exported to the first driver element 200.
When scanning from the top down, U2D is set to high level, D2U is set to low level, then under the effect of the high level of the line scan signals Gn-2 of lastrow, the output terminal of NT9 and NT10 exports the high level signal of U2D, and this control signal outputs to the output terminal of sweep signal control module 100 when XCK is high level.Same, when scanning from bottom to top, D2U is set to high level, U2D is set to low level, then under the effect of the high level of the line scan signals Gn+2 of next line, the output terminal of NT9 and NT10 exports the high level signal of D2U, and this control signal outputs to the output terminal of sweep signal control module 100 when XCK is high level, the control signal of output may be used for unlatching first driver element 200.Same, the low level signal of D2U or U2D may be used for closedown first driver element 200 as the low level signal that sweep signal control module 100 exports.
First driver element 200, for being expert at, scan period exports line scan signals, to open the pixel cell being positioned at a line.The control signal that first driver element 200 can export according to the sweep signal control module 100 received is opened or is closed.Concrete, as shown in Figure 1, the first driver element 200 comprises the 4th on-off element NT7 and the first electric capacity C1.Wherein, the control end of NT7 receives the control signal of sweep signal control module 100 output, its input end connects second clock CK, its output terminal is as the output terminal of the first driver element 200, when NT7 opens, first driver element 200 exports the clock signal of second clock CK for the formation of line scan signals Gn, realizes the scanning to one-row pixels unit.The two ends of the first electric capacity C1 are coupled in the control end (grid of NT7) of NT7 and output terminal (source electrode of NT7) respectively, and therefore the voltage at the first electric capacity C1 two ends equals the gate source voltage V of NT7
gS.
When the current potential of the output terminal of NT7 changes, the first electric capacity C1 can the current potential of the correspondingly control end of pullup or pulldown NT7.As shown in the Q point in Fig. 1, when the first driver element 200 exports effective line scan signals Gn (namely Gn is high level), under the effect of the first electric capacity C1, the current potential of Q point also increases, and ensures that NT7 can stablize unlatching.When line scan signals Gn gets back to low level, under the effect of the first electric capacity C1, the current potential of Q point is dragged down, and NT7 closes or is in can the state of quick closedown, for the action of next sequential is prepared.
Second driver element 300, together with its output terminal is coupled in the output terminal of the first driver element 200, for maintaining the output signal (stable low level signal) of output terminal during the line scanning of non-one's own profession pixel cell, and export the sweep signal corresponding with touch scanning signals in touch-control (TouchPannel, TP) scan period.Concrete, as shown in Figure 1, the second driver element 300 comprises the 5th on-off element NT8, the 6th on-off element NT13 and the second electric capacity C2.Wherein, the drain electrode of NT8 is its output terminal, this output terminal also as the output terminal of the second driver element 300, together with being coupled in the output terminal (i.e. the source electrode of NT7) of the 4th on-off element NT7.The source electrode of NT8 is its input end, meets fixing low level signal VGL, and therefore when the control end (as Suo Shi the P point in Fig. 1) of NT8 is for high level, NT8 opens, and the output terminal of NT8 drags down as stable electronegative potential by low level signal VGL.By the work schedule of control NT8, second driver element 300 is matched with the first driver element 200, when NT7 exports high level, NT8 keeps closing, and does not have an impact, when NT7 output low level to line scan signals Gn, utilize the pulldown function of NT8, maintain stable low level signal at the second driver element 300 (the first driver element 200) output terminal Nodes, the clock signal of holding compared to only relying on CK, to maintain the situation of electronegative potential, improves the reliability of circuit.
After the high level signal that second electric capacity C2 can add in P point place disappears, maintain the current potential of P point.Concrete, when P point is noble potential, C2 is charged to the gate source voltage V of NT8
gS, after the noble potential of P point disappears, the voltage at the second electric capacity C2 two ends can be maintained gate source voltage V
gS, keep the unlatching of NT8.
The output terminal of the 6th on-off element NT13 is coupled in P point, its control end and input end short circuit, and NT13 can draw high P point current potential to open NT8 after blank screen wakes up.Concrete, after the input end input high level signal RST of NT13, be low level because now P point is actual, therefore NT13 opens, and the high level of RST puts on P point, and then NT8 is opened, and drags down output terminal Gn.Simultaneously under the effect of the first electric capacity C1, the current potential of Q is also pulled down on a lower current potential, so that can quick closedown at next sequential NT7.
During the blank screen of display panels, due to the restriction of drive IC, make the signal inputting GOA driving circuit generally can maintain fixing 5V or-5V, and cause the voltage on the node of GOA driving circuit inside to be in uncertain state further, by arranging NT13, make P point can remain on the noble potential determined after blank screen wakes up, namely export reliable low level signal at Gn end, eliminate the risk that circuit function lost efficacy.
Further, the 5th on-off element NT8 is also for exporting the sweep signal corresponding with TP sweep signal in TP scan period.On the one hand, in TP scanning, stop the stage, the public electrode (Common electrode) for scan electrode needs to connect TP sweep signal, as shown in Figure 2, TP is the TP sweep signal putting on public electrode, therefore causes the current potential of public electrode to change with the change of TP sweep signal.On the other hand, in order to make the display effect of now LCD screen influenced, the voltage being added in liquid crystal molecule two ends need be made to remain unchanged, namely needing the current potential converting pixel electrode accordingly to adapt to the change of the current potential of public electrode.Further, for the on-off element in each pixel cell, the current potential of its source electrode (connection public electrode) and drain electrode (connection pixel electrode) also can occur correspondingly to change, therefore, in order to ensure on-off element reliable operation, need the current potential of the grid of on-off element is also correspondingly changed.So stop the stage in TP scanning, the public output Gn of the first driver element 200 and the second driver element 300 needs to export the sweep signal corresponding with TP sweep signal.In an embodiment of the application, the 5th on-off element NT8 is utilized to realize above-mentioned functions.Concrete, in touch-control scan period, the sweep signal that the input termination of NT8 is corresponding with touch scanning signals, and make to be held open to export this sweep signal in the touch-control scan period of NT8
First control module 400, the control signal of drop-down input first driver element 200 can close to make it during the line scanning of non-one's own profession pixel cell, namely the current potential of drop-down Q point is to close the 4th on-off element NT7.Concrete, as shown in Figure 1, the first control module 400 comprises the 7th on-off element NT4 and the 8th on-off element NT5.Wherein, the control termination second clock CK of NT4, its output terminal is coupled in the output terminal of the 3rd on-off element NT1, and together with its input end is coupled in the output terminal of NT5, the low level signal VGL that the input termination of NT5 is fixing, its control end is coupled in P point.When second clock CK and P point is high level, NT4 and NT5 opens formation path simultaneously, can in the value of the output terminal output low level signal VGL of NT4.And the current potential of Q point is dragged down further by on-off element NT6.
Second control module 500, the current potential controlling the control end P point of the 5th on-off element NT8 according to scanning sequence exports to open or closes NT8, namely opens or closes the second driver element 300.During blank screen awakening phase and line scanning, drop-down P point to electronegative potential, close NT8, not to Gn end horizontal scanning line signal standard-sized sheet function and line scanning have an impact.During the line scanning of non-one's own profession pixel cell, pull-up P point, to noble potential, is opened NT8, is made the low level signal of Gn stable output.Concrete, as shown in Figure 1, the second control module 500 comprises the 9th on-off element NT2, the tenth on-off element NT3, the 11 on-off element NT14 and twelvemo and closes element NT15.Wherein, the control termination first clock XCK of NT14, its input end connects the selection input signal U2D of scanning downwards.The control termination second clock CK of NT15, its input end connects the selection input signal D2U upwards scanned.The control end of NT3 is coupled in together with the output terminal of NT14 with NT15, the high level signal VGH that the input termination of NT3 is fixing, together with its output terminal is coupled in the output terminal of NT2, together with the input end of NT2 is coupled in the control end of NT3, receive the output signal of the public output of NT14 and NT15, the control end of NT2 receives the control signal of sweep signal control module 100 output.NT2, NT3, NT14 and NT15 regulate the process of P point current potential to describe in detail in conjunction with work schedule below.
Wake driver element 600 up, between blank screen awake period, make driver module at different levels export effective row signal simultaneously, for realizing the function of all horizontal scanning line signal standard-sized sheets (Allgateon) between blank screen awake period.Allgateon function refers to when display panels blank screen wakes up, usually needs to realize the operation that the gate level of the whole pixel cells in viewing area is opened simultaneously in a period of time to empty the residual electric potential on pixel electrode.Concrete, as shown in Figure 1, wake driver element 600 up and comprise the 13 on-off element NT11 and the 14 on-off element NT12.Wherein, the output terminal of NT11 is coupled to the output terminal of the 5th on-off element NT8, i.e. the public output terminal Gn of the first driver element 200 and the second driver element 300.The control end of NT11 and input end short circuit, and utilize input signal GAS1 to realize Allgateon function when blank screen wakes up.When Gn end is driven by NT11, should ensure that NT7 and NY8 is all in closed condition, avoid influencing each other between the output signal of NT11 and line-scanning drive circuit.The output terminal of NT12 is coupled to P point, the low level signal VGL that input termination is fixing, and it controls termination GAS1.GAS1 remains high level between blank screen awake period, and NT11 opens, and export effective row signal at Gn end, the high level signal namely continued makes all horizontal scanning line signal standard-sized sheets.NT12 opens, can the current potential of drop-down P point, and NT8 is closed reliably.
Electric leakage control unit 700, its input end and output terminal couple with sweep signal control module 100 and the first driver element 200 respectively, leak electricity for preventing the control signal input end of the first driver element 200.The control signal being input to the first driver element 200 for opening NT7 so that sequence exports line scan signals in due course, and whether NT7 can correctly open, also will with reference to the voltage of the drain-source end of NT7, if the grid (control end of NT7, i.e. Q point) current potential do not reach desired value, just likely causes unlatching or the closedown of NT7 mistake, and then line scan signals cannot be exported in the sequential of setting, therefore Q point is key node, needs to control accurately its voltage.Concrete, as shown in Figure 1, electric leakage control unit 700 comprises the 15 on-off element NT6, and its input end and output terminal are respectively coupled to the output terminal of NT1 and the control end of NT7, the high level signal VGH that the control termination of NT6 is fixing.
When n-th line and n-th+2 or n-2 capable between insert the touch-control scan period time, need to keep ensureing after the touch-control end of scan to the voltage of the control end of NT7, the first driver element of rear stage or previous stage can obtain effective voltage signal (even if the NT7 of rear stage or previous stage can reliably open high level signal).On-off element NT6 is in closed condition at Q point for during high level, can block the discharge loop of Q point, and the current potential of Q point is kept.
GOA driving circuit in the embodiment of the present application adopts four clock cables altogether, and the odd-numbered line being positioned at the left side is input to CK/XCK by CK1/CK3 interlaced alternative and drives, and the even number line being positioned at the right is input to CK/XCK by CK2/CK4 interlaced alternative and drives.For left side odd-numbered line driving circuit (setting of even number line driving circuit is identical with function), in the driving circuit of n-th line, CK termination CK1, XCK termination CK3, and in the driving circuit of the n-th+2 row after it, CK termination CK3, XCK termination CK1.Sequential chart below with reference to Fig. 3 illustrates the course of work of above-mentioned driving circuit.
As shown in Figure 3, clock CK1, CK2, CK3 and CK4 form a complete cycle, and each clock accounts for 1/4th of the cycle.But the driving circuit in fact, being positioned at side only uses two clock signals wherein.It can also be seen that, between CK1 and the CK3 being input to the left side (or the right), (or between CK2 and CK4) was also spaced for 1/4th cycles.
Further, the complete blank screen awakening phase illustrated from blank screen to normal display frame of the sequential chart of Fig. 3, and the situation inserting TP scanning when normal display frame.In the blank screen stage, due to the restriction of drive IC, each input signal is 5V or-5V, and the current potential of each node (such as key node P point and Q point) of driving circuit inside is then in uncertain state.Utilize the Allgateon function that GAS1 signal realizes between blank screen awake period, when GAS1 is high level, NT11 opens and exports high level signal at Gn end, and period is for emptying the residual electric potential on pixel electrode.
After blank screen wakes end up, hold applying high level signal at RST, to ensure that the initial potential of P point is for height, namely guarantee Gn can the low level signal of stable output.When scan mode is for scanning from the top down, U2D is high level signal, and D2U is low level signal, VGH and VGL is respectively fixing high level signal and low level signal.STV is first trigger pip for starting scanning, is described below for n-th line, now the high level of the line scan signals Gn-2 of the n-th-2 row level pass to the control end of NT9.
First stage, when CK3 is high level, when CK1 is low level.NT9 opens, and the high level of U2D is delivered to the input end of NT1.Because CK3 (XCK) is high level, therefore NT1 opens, and high level signal is delivered to the output terminal of NT1.In addition, it is also to be noted that, now, NT6 is generally also in opening, will see when scan round below, after this line scanning completes, Q point can be set to electronegative potential, and therefore NT6 opens, then high level signal is delivered to Q point via NT6, the control end signal of NT7 becomes high level signal from low level signal, is input to the clock signal C K1 of NT7 at Gn output low level signal.Meanwhile, the high level at Q point place makes the first electric capacity C1 charge to the first voltage, is kept the noble potential of Q point further by the first electric capacity C1.
In the first stage, NT14 opens under the effect of clock signal C K3, the control end of NT3 receives the high level signal of U2D, one end of NT3 inputs fixing high level signal VGH, other end P point is also noble potential, and is maintained by the second electric capacity C2, if now the high level signal of the control end of NT3 can not make NT3 open, then the noble potential of P point still can be maintained by the second electric capacity C2, and namely NT8 is held open.If now the current potential of P point is a little less than the high level signal of control end, and the unlocking condition of NT3 can be reached, then NT3 opens, and the noble potential of instability on P point draws high in a stable value by high level signal VGH, its result is still and NT8 is held open, and holds output low level signal VGL at Gn.
Subordinate phase, when CK1 and CK3 is low level.NT14 closes, and NT13 control end no longer includes the high level signal initiatively applied, then the noble potential of P point can not maintain well, have certain reduction, if this place's current potential is down to, NT2 is opened, then relatively the noble potential of P point can be dragged down, but be unlikely to NT8 is closed.Another kind of situation is that NT2 now can't open, then the noble potential of P point is still maintained by the second electric capacity C2.
Phase III, when CK1 is high level, when CK3 is low level.NT15 opens, and the low level signal of the input end access D2U of NT2, NT2 opens, and P point is pulled to low level, NT5 and NT8 closes.Meanwhile, the high level output of clock signal C K1 is held to Gn by the NT7 being in opening, and the first electric capacity C1 is charged again, and make the voltage of Q point be raised to the second voltage, the second voltage is higher than the first voltage.
In the phase III, because the current potential of Q point raises, NT6 will be caused to close, simultaneously due to the first electric capacity C1 effect, the current potential of Q point can be maintained, and other bang paths of Q point and driving circuit are all blocked by NT6, so Q point can not leak electricity via other bang paths.
Fourth stage, when CK1 and CK3 is low level.The line scan signals Gn exported follows the change of clock signal C K1, gets back to low level.First electric capacity C1 discharges, and Q point current potential is correspondingly reduced to the first voltage, and then NT6 is opened again.
Five-stage, when CK3 is high level, when CK1 is low level.Although should be noted that now clock signal repeats the clock signal into the first stage, the process of inside circuit is not identical, specific as follows.Now Gn-2 invalidating signal, but Gn+2 signal effectively (because adjacent CK1 and CK3 exchanges, therefore when Gn exports at CK1 time, is equivalent to the first stage of Gn+2; And Gn+2 exports the high level of Gn+2 at CK3, be equivalent to Gn exports Gn high level at CK1).Under Gn+2 effect, NT10 opens, and the low level signal of D2U reaches Q point, and NT7 is closed.Simultaneously NT14 opens, and the high level signal of U2D reaches the control end of NT3, and because P point was electronegative potential in the last stage, therefore NT3 opens, and P point is pulled up to noble potential, and then NT8 unlatching, the low level signal VGL of output terminal Gn stable output.Second electric capacity C2 is charged simultaneously, after NT3 closes, can maintain the noble potential of P point.
6th stage, when CK1 is high level, when CK3 is low level.Now NT4 and NT5 opens simultaneously, and low level puts on Q point, and NT7 is more reliably closed.Output terminal Gn is still maintained stable low level by NT8.Stray capacitance is there is between the control end and clock signal input terminal of NT7, due to the effect of this stray capacitance, the current potential of Q is likely caused to be lifted when second clock CK is high level, and then the unlatching causing NT7 causes the disabler of circuit, utilize NT4 and NT5 can in the scanning process of a frame picture, repeatedly apply low level signal to Q point, improve the reliability of circuit.
At ensuing multiple sweep phase, it is all invalid that the level due to n-th line is conveyed into signal Gn-2 and Gn+2, and therefore this horizontal drive circuit no longer changes.
When needing in the process in normal line scanning to perform TP scanning, comprise following process:
Suppose to insert TP scanning process between the n-th-2 row and n-th line, then now n-th line pixel cell is in the subordinate phase of above-mentioned line scanning driving, namely CK1 and CK3 is low level, and Q point is charged to noble potential, and NT7 opens and exports the low level signal of CK1 or CK3.NT8 opens simultaneously, and VGL signal is transformed to Gate (grid) signal corresponding with TP sweep signal and exports at the output terminal of NT8, as shown in the touch-control sweep phase in Fig. 2 and Fig. 3.
Can find out that the GOA driving circuit of the embodiment of the present application can realize allgateon function at blank screen awakening phase, and by the control to driving circuit inside key node, eliminate the risk that circuit generating function lost efficacy, improve the reliability of driving circuit.
Fig. 4 is the structural representation of the GOA driving circuit of another embodiment of the application.Compared with previous embodiment, this driving circuit adds sixteenmo and closes element NT16.The input end of this on-off element NT16 and output terminal are respectively coupled to the input end (VGL) of the 5th on-off element NT8 and output terminal (Gn), and input termination VGL, controls termination GAS2 signal.At TP sweep phase, will affect the effect of TP scanning when the output terminal current potential of NT8 is unstable, NT16 can be used for the risk eliminating Gate output potential shakiness.Concrete, in TP, stop the stage, NT16 can be held open under the effect of GAS2, and with NT8 synchronism output TP sweep signal, doubleway output is to ensure to stop stablizing of stage sweep signal in TP.
It can also be seen that from Fig. 4, compared with previous embodiment, this driving circuit also add the 17 on-off element NT17.The output terminal of NT17 is coupled to the output terminal of sweep signal control module 100, i.e. the output terminal of NT1, the low level signal VGL that its input termination is fixing, controls termination RST signal.The control end of this on-off element drop-down 4th on-off element NT7 after circuit start, by carrying out to the current potential of Q point the reliability that electronegative potential initialization improves circuit.Concrete, for the driving circuit of odd-numbered line, driving circuit unloading phase, because the current potential at Q point place be can not determine, therefore, other row except the first row pixel cell when high level signal that CK holds arrives, due to the effect of the stray capacitance between the control end of NT7 and clock signal input terminal, likely cause the current potential of Q to be lifted, thus NT7 is opened and the disabler of detonator circuit.NT17 is used in the current potential of the drop-down Q point of initial time that driving circuit starts to the electronegative potential determined, to ensure that driving circuit can reliably start.
It should be noted that, in previous embodiment, in order to the starting stage making Q point start at driving circuit is positioned at the electronegative potential determined, by increasing the width of RST pulse, even if RST signal remains effective between the high period of CK1 and CK2, as shown in Figure 3, the NT4 conducting that grid is controlled by clock signal C K1 and CK2 can be made like this, and by the current potential of the drop-down Q point of NT4 and NT5, but for the NT4 that grid is controlled by clock signal C K3 and CK4, can not in Startup time conducting, and then owing to not arranging for Q point the electronegative potential determined and there is certain failure risk.The introducing of NT17 can reduce this risk.
Further as can be seen from Figure 4, the annexation that 11 on-off element NT14 and twelvemo close element NT15 and signal XCK, U2D and D2U also converts, this is the current potential in order to more stably control P point, the work schedule of composition graphs 5 can analyze, repeats no more herein.
The GOA driving circuit of the embodiment of the present application, can eliminate the labile factor existed in circuit effectively, reduces the disabler risk of circuit.The GOA drive circuit structure of the embodiment of the present application is applicable to NMOS and PMOS circuit simultaneously, and is widely used, and can be used in the raster data model field of the mobile phone of LCD and OLED, display, TV etc.
Although the embodiment disclosed by the present invention is as above, the embodiment that described content just adopts for the ease of understanding the present invention, and be not used to limit the present invention.Technician in any the technical field of the invention; under the prerequisite not departing from the spirit and scope disclosed by the present invention; any amendment and change can be done what implement in form and in details; but scope of patent protection of the present invention, the scope that still must define with appending claims is as the criterion.
Claims (10)
1. a GOA driving circuit, is provided with multistage GOA driver module, and every grade of GOA driver module comprises:
First driver element, for being expert at, scan period exports line scan signals;
Second driver element, the output terminal of its output terminal and described first driver element couples, and maintains the output signal of output terminal, and export the sweep signal corresponding with touch scanning signals in touch-control scan period for scan period of being expert at;
Wake driver element up, export effective row signal for making driver module at different levels when blank screen wakes up simultaneously.
2. GOA driving circuit according to claim 1, is characterized in that, described every grade of GOA driver module also comprises:
First control module, for closing described first driver element;
Second control module, for opening or closing described second driver element;
Sweep signal control module, receives the line scan signals of previous stage or rear stage driver module, exports control signal to realize forward scan or reverse scan to the first driver element at the corresponding levels.
3. GOA driving circuit according to claim 2, is characterized in that, described every grade of GOA driver module also comprises:
Electric leakage control unit, connects described first driver element and described sweep signal control module, prevents the control signal arriving described first driver element from producing leakage current.
4. GOA driving circuit according to claim 3, is characterized in that, described first driver element comprises:
4th on-off element, its control end receives the control signal that described sweep signal control module exports, and exports line scan signals according to the second clock signal received;
First electric capacity, its two ends are coupled in control end and the output terminal of described 4th on-off element respectively, for the current potential of the control end of the 4th on-off element described in pullup or pulldown.
5. GOA driving circuit according to claim 4, is characterized in that, described second driver element comprises:
5th on-off element, its output terminal is coupled in the output terminal of described 4th on-off element, and its input end is expert at indirect low level signal sweep time, in the sweep signal that touch-control sweep time is indirectly corresponding with touch scanning signals;
6th on-off element, the control end of its output terminal and described 5th on-off element couples, its control end and its input end short circuit, for opening described 5th on-off element after blank screen wakes up;
Second electric capacity, its two ends are coupled in control end and the input end of described 5th on-off element respectively, for keeping the current potential of the control end of described 5th on-off element.
6. GOA driving circuit according to claim 5, is characterized in that, described in wake driver element up and comprise:
13 on-off element, the output terminal of its output terminal and described 4th on-off element couples, its control end and input end short circuit;
14 on-off element, its input end and output terminal are respectively coupled to input end and the control end of described 5th on-off element;
Between blank screen awake period, described 13 on-off element and described 14 on-off element are all opened, the current potential of the control end of drop-down described 5th on-off element of described 14 on-off element, described 13 on-off element exports effective row signal at its output terminal and makes all horizontal scanning line signal standard-sized sheets.
7. GOA driving circuit according to claim 5, is characterized in that, described electric leakage control unit comprises:
15 on-off element, its input end and output terminal are respectively coupled to the output terminal of described sweep signal control module and the control end of described 4th on-off element;
The control termination high level signal of described 15 on-off element, and it closes the discharge loop of the control end of the 4th on-off element when the control end of described 4th on-off element is noble potential.
8. GOA driving circuit according to claim 5, is characterized in that, described every grade of GOA driver module also comprises:
Sixteenmo closes element, and its input end and output terminal are respectively coupled to input end and the output terminal of described 5th on-off element;
In touch-control scan period, described sixteenmo closes the element sweep signal corresponding with touch scanning signals with described 5th on-off element synchronism output.
9. GOA driving circuit according to claim 5, is characterized in that, described every grade of GOA driver module also comprises:
17 on-off element, its output terminal is coupled to the output terminal of described sweep signal control module, its input termination low level signal;
Described 17 on-off element is opened when driving circuit starts with the control end of drop-down described 4th on-off element to electronegative potential.
10. GOA driving circuit according to any one of claim 1 to 9, it is characterized in that, for drive the driver module of odd-numbered line with for driving the driver module of even number line to adopt two clock cables separately, described two clock cable interlaced alternatives are connected to described driver module.
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