CN105261343B - A kind of GOA drive circuits - Google Patents
A kind of GOA drive circuits Download PDFInfo
- Publication number
- CN105261343B CN105261343B CN201510824291.0A CN201510824291A CN105261343B CN 105261343 B CN105261343 B CN 105261343B CN 201510824291 A CN201510824291 A CN 201510824291A CN 105261343 B CN105261343 B CN 105261343B
- Authority
- CN
- China
- Prior art keywords
- switch element
- output end
- signal
- scanning
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a kind of GOA drive circuits, are provided with multistage GOA drive modules, and every grade of GOA drive module includes：First driver element, for exporting line scan signals during scanning of being expert at；Second driver element, its output end and the output end of first driver element couple, for maintaining the output signal of output end, and the output scanning signal corresponding with touch scanning signals during touch-control scans during scanning of being expert at；Driver element is waken up, for making drive modules at different levels when blank screen wakes up while exporting effective row signal.The GOA drive circuits can effectively eliminate destabilizing factor present in circuit, reduce the risk of circuit function failure.
Description
Technical field
The present invention relates to the Qu Donglingyu of liquid crystal display, more particularly to a kind of GOA drive circuits.
Background technology
The drive circuit of traditional liquid crystal display is generally the outside integrated circuit module carried and formed, and such as generally uses
TAB (Tape Automated Bonding) encapsulating structure.And as the low temperature with superhigh current carrying transport factor characteristic is more
The development of crystal silicon (LTPS, Low Temperature Poly silicon) semiconductor thin-film transistor, based on panel periphery
Integrated circuit technique is increasingly becoming the focus of research, wherein typical application is array base palte row actuation techniques (GOA, Gate
Driver On Array)。
GOA drive circuits are that row (Gate) scanning drive signal circuit production is existed using liquid crystal display Array processing procedures
The scanning of driving line by line to pixel cell is realized on array base palte.GOA drive circuits can not only reduce external integrated circuit
Welding sequence, improve integrated level, can also be lifted production capacity reduce production cost, be small-medium size liquid crystal display product (such as
Mobile phone, PDA etc.) first choice.In addition, as mobile intelligent process is increasingly accelerated, the touch-control of small-medium size liquid crystal display
Technology is also required to obtain corresponding technical support, therefore more requirements are proposed to drive circuit.But existing GOA drivings electricity
Road, due to the electric leakage of circuit internal node, many times node can not be made to be maintained on desired magnitude of voltage, and then cause circuit
The timing error of work, the risk of disabler be present.
To sum up, need badly and existing GOA drive circuits are improved to reduce the risk of its disabler.
The content of the invention
One of technical problems to be solved by the invention are to reduce the disabler risk of GOA drive circuits.
In order to solve the above-mentioned technical problem, embodiments herein provide firstly a kind of GOA drive circuits, be provided with more
Level GOA drive modules, every grade of GOA drive module include：First driver element, for exporting row scanning letter during scanning of being expert at
Number；Second driver element, its output end and the output end of first driver element couple, for remaining defeated during scanning of being expert at
Go out the output signal at end, and the output scanning signal corresponding with touch scanning signals during touch-control scans；It is single to wake up driving
Member, for making drive modules at different levels when blank screen wakes up while exporting effective row signal.
Preferably, every grade of GOA drive modules also include：First control unit, it is single for closing first driving
Member；Second control unit, for being turned on and off second driver element；Scanning signal control unit, receive previous stage or
The line scan signals of rear stage drive module, to this level the first driver element output control signal with realize forward scan or reversely
Scanning.
Preferably, every grade of GOA drive modules also include：Electric leakage preventing and treating unit, connect first driver element with
The scanning signal control unit, prevent the control signal for reaching first driver element from producing leakage current.
Preferably, first driver element includes：4th switch element, its control terminal receive the scanning signal control
The control signal of unit output, and according to the second clock signal output line scan signals of reception；First electric capacity, its both ends difference
It is coupled in the control terminal and output end of the 4th switch element, the control terminal for the 4th switch element described in pullup or pulldown
Current potential.
Preferably, second driver element includes：5th switch element, its output end are coupled in the 4th switch member
The output end of part, its input are expert at sweep time indirect low level signal, touch-control sweep time indirectly with touch scanning signals pair
The scanning signal answered；6th switch element, the control terminal of its output end and the 5th switch element couple, its control terminal and its
Input short circuit, for opening the 5th switch element after blank screen wakes up；Second electric capacity, its both ends are respectively coupled to described
The control terminal and input of 5th switch element, the current potential of the control terminal for keeping the 5th switch element.
Preferably, the wake-up driver element includes：13rd switch element, its output end and the 4th switch element
Output end coupling, its control terminal and input short circuit；14th switch element, its input are respectively coupled to institute with output end
State the input and control terminal of the 5th switch element；During blank screen wakes up, the 13rd switch element and the described 14th
Switch element is opened, the current potential of the control terminal of the 14th switch element drop-down the 5th switch element, and the described tenth
Three switch elements export effective row signal in its output end makes all horizontal scanning line signal standard-sized sheets.
Preferably, the electric leakage preventing and treating unit includes：15th switch element, its input and output end are respectively coupled to
The control terminal of the output end of the scanning signal control unit and the 4th switch element；The control of 15th switch element
System termination high level signal, and it closes the 4th switch element when the control terminal of the 4th switch element is high potential
The discharge loop of control terminal.
Preferably, every grade of GOA drive modules also include：Sixteenmo closes element, and its input is distinguished with output end
It is coupled to the input and output end of the 5th switch element；During touch-control scans, the sixteenmo closes element and institute
State the 5th switch element synchronism output scanning signal corresponding with touch scanning signals.
Preferably, every grade of GOA drive modules also include：17th switch element, its output end are coupled to described sweep
The output end of signaling control unit is retouched, it inputs termination low level signal；17th switch element starts in drive circuit
Shi Kaiqi is to pull down the control terminal of the 4th switch element to low potential.
Preferably, for driving the drive module of odd-numbered line with being used to drive the drive module of even number line each to use two
Clock cable, two clock cable interlaced alternatives are connected to the drive module.
Compared with prior art, one or more of such scheme embodiment can have the following advantages that or beneficial to effect
Fruit：
By being controlled to key node in drive circuit, destabilizing factor present in circuit is effectively eliminated,
Reduce the risk of circuit function failure.
Other advantages, the target of the present invention, and feature will be illustrated in the following description to a certain extent, and
And to a certain extent, based on will be apparent to those skilled in the art to investigating hereafter, Huo Zheke
To be instructed from the practice of the present invention.The target and other advantages of the present invention can be wanted by following specification, right
Specifically noted structure is sought in book, and accompanying drawing to realize and obtain.
Brief description of the drawings
Accompanying drawing is used for providing to the technical scheme of the application or further understanding for prior art, and constitution instruction
A part.Wherein, the accompanying drawing for expressing the embodiment of the present application is used for the technical side for explaining the application together with embodiments herein
Case, but do not form the limitation to technical scheme.
Fig. 1 is the structural representation of every grade of drive module of the GOA drive circuits of the embodiment of the present application；
Fig. 2 is the corresponding relation schematic diagram of TP signals and Gate signals when touch-control scans；
Fig. 3 is the SECO figure of the GOA drive circuits shown in Fig. 1；
Fig. 4 is the structural representation of every grade of drive module of the GOA drive circuits of another embodiment of the application；
Fig. 5 is the SECO figure of the GOA drive circuits shown in Fig. 4.
Embodiment
Embodiments of the present invention are described in detail below with reference to drawings and Examples, and how the present invention is applied whereby
Technological means solves technical problem, and the implementation process for reaching relevant art effect can fully understand and implement according to this.This Shen
Each feature that please be in embodiment and embodiment, can be combined with each other under the premise of not colliding, the technical scheme formed
Within protection scope of the present invention.
In order to meet the requirement of small size liquid crystal display, in embodiments herein, by GOA rows turntable driving electricity
Road is separately positioned on the both sides of viewing area, and one-level GOA drive modules are correspondingly arranged per one-row pixels unit.For example, by odd number
Capable drive module setting drives in the left side of viewing area, the drive module setting of even number line in the right side of viewing area
Circuit integrally uses interleaved type of drive, the output of left and right odd-even alternation.With reference to the line n odd-numbered line shown in Fig. 1
The structural representation of scan driver module is described in detail.
As shown in figure 1, every one-level drive module of the GOA drive circuits of the embodiment of the present application includes：Scanning signal controls
Unit 100, the first driver element 200, the second driver element 300, the first control unit 400, the second control unit 500, wake-up
Driver element 600 and electric leakage preventing and treating unit 700.
Scanning signal control unit 100, the line scan signals of previous stage or rear stage drive module are received, exported for opening
The control signal of the first driver element of this grade 200 is opened or closes, and the control signal exported can realize drive circuit respectively
Forward scan and reverse scan.Specifically, as shown in figure 1, scanning signal control unit 100 uses the n-th -2 row or the n-th+2 row
Line scan signals Gn-2/Gn+2 passes signal as level, uses U2D/D2U alternatively input signals.Scanning signal control unit
100 include first switching element NT9, second switch element NT10 and the 3rd switch element NT1.Wherein, NT9 control terminal and
Every lastrow line scan signals Gn-2 couplings, the selection input signal U2D that scans downwards of its input connection.NT10 control
End processed and the line scan signals Gn+2 of the next line at interval are coupled, the selection input signal D2U that the connection of its input scans up.
NT9 and NT10 output end is coupled together.3rd switch element NT1 input is coupled in NT9 and NT10 output end,
Output end of the NT1 output end as scanning signal control unit 100, NT1 control terminal receive the first clock XCK, Ke Yi
Effective control signal is exported to the first driver element 200 in defined sequential.
When being scanned from the top down, U2D is arranged to high level, and D2U is arranged to low level, then is swept in the row of lastrow
In the presence of the high level for retouching signal Gn-2, NT9 and NT10 output end output U2D high level signal, the control signal exist
XCK is output to the output end of scanning signal control unit 100 when being high level.Likewise, when being scanned from bottom to top,
D2U is arranged to high level, and U2D is arranged to low level, then in the presence of the line scan signals Gn+2 of next line high level,
NT9 and NT10 output end output D2U high level signal, the control signal are output to scanning signal when XCK is high level
The output end of control unit 100, the control signal of output can be used for opening the first driver element 200.Likewise, D2U or U2D
Low level signal as the low level signal that scanning signal control unit 100 exports can be used for close the first driver element
200。
First driver element 200, for exporting line scan signals during scanning of being expert at, to open the pixel list positioned at a line
Member.First driver element 200 can be turned on and off according to the control signal that the scanning signal control unit 100 of reception exports.
Specifically, as shown in figure 1, the first driver element 200 includes the 4th switch element NT7 and the first electric capacity C1.Wherein, NT7 control
End processed receives the control signal of the output of scanning signal control unit 100, its input connection second clock CK, its output end conduct
The output end of first driver element 200, when NT7 is opened, the first driver element 200 output second clock CK clock signal is used
In forming line scan signals Gn, the scanning to one-row pixels unit is realized.First electric capacity C1 both ends are respectively coupled to the control in NT7
End (NT7 grid) processed and output end (NT7 source electrode), therefore the voltage at the first electric capacity C1 both ends is equal to NT7 gate source voltage
VGS。
When the current potential of NT7 output end changes, the first electric capacity C1 can correspondingly pullup or pulldown NT7 control
The current potential at end.As shown in the Q points in Fig. 1, when the first driver element 200 exports effective line scan signals Gn, (i.e. Gn is high electricity
It is flat) when, in the presence of the first electric capacity C1, the current potential of Q points also increases, and ensures that NT7 can stablize and opens.When row scanning letter
When number Gn returns to low level, in the presence of the first electric capacity C1, the current potential of Q points is pulled low, and NT7 is closed or in can quickly be closed
The state closed, prepared for the action of next sequential.
Second driver element 300, its output end and the output end of the first driver element 200 are coupled together, for non-
The output signal (stable low level signal) of output end is maintained during the row scanning of one's own profession pixel cell, and in touch-control
(Touch Pannel, TP) exports the scanning signal corresponding with touch scanning signals during scanning.Specifically, as shown in figure 1,
Second driver element 300 includes the 5th switch element NT8, the 6th switch element NT13 and the second electric capacity C2.Wherein, NT8
Drain and also serve as the output end of the second driver element 300, the output with the 4th switch element NT7 for its output end, the output end
End (i.e. NT7 source electrode) is coupled together.NT8 source electrode is its input, meets fixed low level signal VGL, therefore work as NT8
Control terminal when being high level (as shown in the P points in Fig. 1), NT8 is opened, low level signal VGL by NT8 output end down for
Stable low potential.By controlling NT8 work schedule, the second driver element 300 is set to be engaged with the first driver element 200,
When NT7 exports high level, NT8 is remained turned-off, and line scan signals Gn is not had an impact, and when NT7 exports low level, is utilized
NT8 pulldown function, stable low level is maintained at the second driver element 300 (the first driver element 200) output end node
Signal, the situation of low potential is maintained compared to the clock signal for only relying on CK ends, improve the reliability of circuit.
After the high level signal that second electric capacity C2 can add in P points place disappears, the current potential of P points is maintained.Specifically, work as P
When point is high potential, C2 is charged to NT8 gate source voltage VGS, after the high potential of P points disappears, the electricity at the second electric capacity C2 both ends
Pressure energy is enough maintained gate source voltage VGS, keep NT8 unlatching.
6th switch element NT13 output end is coupled in P points, and its control terminal and input short circuit, NT13 can be in blank screen
P point current potentials are drawn high after wake-up to open NT8.Specifically, after NT13 input input high level signal RST, due to now P
It is low level that point is actual, therefore NT13 is opened, and RST high level puts on P points, and then opens NT8, drags down output end Gn.
Simultaneously in the presence of the first electric capacity C1, Q current potential is also pulled down on a relatively low current potential, so as in next sequential NT7
Can be with quick closedown.
During the blank screen of liquid crystal display panel, due to driving IC limitation so that the signal one of input GOA drive circuits
As can maintain fixed 5V or -5V, and further result in the voltage on the node inside GOA drive circuits be in it is uncertain
State, by setting NT13 so that P points can be maintained at the high potential of determination after blank screen wake-up, i.e., output is reliable at Gn ends
Low level signal, eliminate circuit function failure risk.
Further, the 5th switch element NT8 is additionally operable to export corresponding with TP scanning signals sweep during TP is scanned
Retouch signal.On the one hand, the stage is stopped in TP scannings, the public electrode (Common electrodes) for scan electrode, which needs to meet TP, to be swept
Signal is retouched, as shown in Fig. 2 TP is the TP scanning signals for putting on public electrode, therefore and causes the current potential of public electrode with TP
The change of scanning signal and change.On the other hand, in order that now the display effect of LCD screen is impacted, need to make to be added in liquid crystal
The voltage at molecule both ends keeps constant, that is, needs accordingly to convert the current potential of pixel electrode to adapt to the change of the current potential of public electrode
Change.Further, for the switch element in each pixel cell, its source electrode (connection public electrode) and drain electrode (connection pixel electricity
Pole) current potential can also occur correspondingly to change, therefore, in order to ensure switch element reliable operation, it is necessary to make the grid of switch element
The current potential of pole also correspondingly changes.So stop the stage in TP scannings, the first driver element 200 and the second driver element
300 public output Gn needs to export the scanning signal corresponding with TP scanning signals.In one embodiment of the application,
Above-mentioned function is realized using the 5th switch element NT8.Specifically, during touch-control scans, NT8 input termination and touch-control scan
Scanning signal corresponding to signal, and make to keep it turned on to export the scanning signal in during NT8 touch-control scanning
First control unit 400, drop-down it can input the first driver element during the row scanning of non-one's own profession pixel cell
200 control signal pulls down the current potentials of Q points to close the 4th switch element NT7 so that it is closed.Specifically, such as Fig. 1 institutes
Show, the first control unit 400 includes the 7th switch element NT4 and the 8th switch element NT5.Wherein, NT4 control termination second
Clock CK, its output end are coupled in the 3rd switch element NT1 output end, and its input and NT5 output end are coupled together,
The low level signal VGL of NT5 input termination fixation, its control terminal are coupled in P points.When second clock CK and P points are high electricity
Usually, NT4 and NT5 is opened and is formed path simultaneously, can be in NT4 output end output low level signal VGL value.And further
The current potential of Q points is dragged down by switch element NT6.
Second control unit 500, the current potential of the 5th switch element NT8 control terminal P points is controlled to export according to scanning sequence
To be turned on and off NT8, that is, it is turned on and off the second driver element 300.During blank screen awakening phase and row scanning, P is pulled down
Point is closed NT8, the horizontal scanning line signal standard-sized sheet function at Gn ends and row scanning not had an impact to low potential.In non-one's own profession picture
During the row scanning of plain unit, pull-up P points to high potential, NT8 is opened, make the stable low level signal of Gn outputs.Specifically, such as
Shown in Fig. 1, the second control unit 500 includes the 9th switch element NT2, the tenth switch element NT3, the 11st switch element NT14
With the 12nd switch element NT15.Wherein, NT14 control terminates the first clock XCK, the choosing that the connection of its input scans downwards
Select input signal U2D.NT15 control termination second clock CK, the selection input signal D2U that the connection of its input scans up.
NT14 and NT15 output end is coupled in NT3 control terminal together, and the high level signal VGH of NT3 input termination fixation, its is defeated
Go out end and NT2 output end is coupled together, NT2 input and NT3 control terminal are coupled together, and receive NT14 and NT15
Public output output signal, NT2 control terminal receives the control signal of the output of scanning signal control unit 100.NT2、
The process of NT3, NT14 and NT15 regulation P point current potentials is described in detail later in connection with work schedule.
Driver element 600 is waken up, during blank screen wakes up, makes drive modules at different levels while exports effective row signal, is used
The function of all horizontal scanning line signal standard-sized sheets (All gate on) during realizing that blank screen wakes up.All gate on functions are
Refer to when liquid crystal display panel blank screen wakes up, it usually needs realize the whole pixel cells made in viewing area in a period of time
The operation opened simultaneously of gate levels empty the residual electric potential on pixel electrode.Specifically, as shown in figure 1, wake up driving list
Member 600 includes the 13rd switch element NT11 and the 14th switch element NT12.Wherein, NT11 output end is coupled to the 5th and opened
Close the public output end Gn of element NT8 output end, i.e. the first driver element 200 and the second driver element 300.NT11 control
End processed and input short circuit, and realize All gate on functions during blank screen wake-up using input signal GAS1.When Gn ends by
When NT11 is to drive, it should ensure that NT7 and NY8 is in closed mode, avoid NT11 output signal and line-scanning drive circuit
Between influence each other.NT12 output end is coupled to P points, and the fixed low level signal VGL of input termination, it controls termination
GAS1.GAS1 remains high level during blank screen wakes up, and NT11 is opened, and effective row signal is exported at Gn ends, i.e., lasting
High level signal makes all horizontal scanning line signal standard-sized sheets.NT12 is opened, and can be pulled down the current potential of P points, NT8 is reliably closed
Close.
Electric leakage preventing and treating unit 700, its input and output end drive single with scanning signal control unit 100 and first respectively
Member 200 couples, for preventing the control signal input of the first driver element 200 from leaking electricity.It is input to the first driver element
200 control signal is used to open NT7 so as to the output line scan signals of sequence in due course, and whether NT7 can correctly open, also
Will be with reference to the voltage at NT7 drain-source end, if NT7 grid (control terminal, i.e. Q point) current potential does not reach desired value, it is possible to lead
Being turned on and off for NT7 mistakes is caused, and then line scan signals can not be exported in the sequential of setting, therefore Q points are key node,
Need accurately to control its voltage.Specifically, as shown in figure 1, electric leakage preventing and treating unit 700 includes the 15th switch element
NT6, its input and output end are respectively coupled to NT1 output end and NT7 control terminal, the height of NT6 control termination fixation
Level signal VGH.
When the touch-control scan period is inserted between line n and n-th+2 or n-2 rows, it is necessary to NT7 control terminal
Voltage is kept to ensure after the touch-control end of scan, and the first driver element of rear stage or previous stage can obtain effectively
Voltage signal (even if high level signal that rear stage or the NT7 of previous stage can be opened reliably).Switch element NT6 is in Q points
To be closed during high level, the discharge loop of Q points can be blocked, is maintained the current potential of Q points.
GOA drive circuits in the embodiment of the present application use four clock cables altogether, positioned at the left side odd-numbered line by
CK1/CK3 interlaced alternatives are input to CK/XCK and are driven, and the even number line positioned at the right is input to by CK2/CK4 interlaced alternatives
CK/XCK is driven.By taking the odd number horizontal drive circuit of the left side as an example (setting of even number horizontal drive circuit and function phase are same), n-th
In capable drive circuit, CK termination CK1, XCK termination CK3, and behind in the drive circuit of n-th+2 row in face, CK terminations
CK3, XCK terminate CK1.Illustrate the course of work of above-mentioned drive circuit below with reference to Fig. 3 timing diagram.
As shown in figure 3, clock CK1, CK2, CK3 and CK4 form a complete cycle, each clock accounts for four points of cycle
One of.But in fact, the drive circuit positioned at side only uses two clock signals therein.It can also be seen that it is input to a left side
(or between CK2 and CK4) is also spaced a quarter cycle between the CK1 and CK3 on side (or the right).
Further, Fig. 3 timing diagram completely shows the blank screen awakening phase from blank screen to normal display picture, Yi Ji
The situation of TP scannings is inserted during normal display picture.In the blank screen stage, due to driving IC limitation, each input signal is 5V
Or -5V, and the current potential of each node (such as key node P points and Q points) inside drive circuit is then in uncertain state.Profit
All gate on functions during realizing blank screen wake-up with GAS1 signals, when GAS1 is high level, NT11 is opened and at Gn end
High level signal is exported, is during which used to empty the residual electric potential on pixel electrode.
After blank screen wake-up terminates, apply a high level signal at RST ends, using the initial potential for ensureing P points as height, that is, protect
Card Gn can export stable low level signal.When scan mode for when scanning from the top down, U2D is high level signal, and D2U is
Low level signal, VGH and VGL are respectively fixed high level signal and low level signal.STV is for starting the first of scanning
Individual trigger signal, is illustrated by taking line n as an example below, now the line scan signals Gn-2 of the n-th -2 row high level level
Pass to NT9 control terminal.
First stage, when CK3 is high level, and CK1 is low level.NT9 is opened, and U2D high level is delivered to the defeated of NT1
Enter end.Because CK3 (XCK) is high level, therefore NT1 is opened, and high level signal is delivered to NT1 output end.In addition, it is also necessary to
It is noted that now, NT6 is typically also at opening, will be seen that later in scan round, after the completion of one's own profession scanning, Q
Point can be set to low potential, therefore NT6 is to open, then high level signal is delivered to Q points, NT7 control end signal via NT6
It is changed into high level signal from low level signal, the clock signal CK1 for being input to NT7 exports low level signal in Gn.Meanwhile Q points
The high level at place makes the first electric capacity C1 charge to first voltage, and the high potential of Q points is further kept by the first electric capacity C1.
In the first stage, NT14 is opened in the presence of clock signal CK3, and NT3 control terminal receives U2D high level
Signal, the high level signal VGH of NT3 one end input fixation, other end P points are also high potential, and are maintained by the second electric capacity C2,
If now the high level signal of NT3 control terminal can not open NT3, the high potential of P points still can be by the second electric capacity
C2 is maintained, i.e., NT8 is kept it turned on.If now the current potential of P points is slightly below the high level signal of control terminal, and can reach NT3's
Unlocking condition, then NT3 open, high level signal VGH draws high high potential unstable on P points onto a stable value, its
Result is still to keep it turned on NT8, in Gn ends output low level signal VGL.
Second stage, when CK1 and CK3 is low level.NT14 is closed, and there is no the height that active applies for NT13 control terminals
Level signal, then the high potential of P points can not maintain well, certain reduction is had, if current potential is down to and opens NT2 at this
Open, then relatively can drag down the high potential of P points, but be unlikely to close NT8.Another situation is, NT2 is now also not
It can open, then the high potential of P points is still maintained by the second electric capacity C2.
Phase III, when CK1 is high level, and CK3 is low level.NT15 is opened, and NT2 input access D2U's is low
Level signal, NT2 are opened, and P points are pulled to low level, and NT5 and NT8 are closed.Meanwhile the NT7 in opening believes clock
Number CK1 high level output is electrically charged again to Gn ends, the first electric capacity C1, the voltage of Q points is raised to second voltage, the second electricity
Pressure is higher than first voltage.
In the phase III, because the current potential of Q points raises, NT6 will be caused to close, simultaneously because the first electric capacity C1 is acted on, Q points
Current potential can be maintained, and other bang paths of Q points and drive circuit are blocked by NT6, so Q points will not be via it
His bang path leaks electricity.
Fourth stage, when CK1 and CK3 is low level.The line scan signals Gn of output follows clock signal CK1 change
Change, return to low level.First electric capacity C1 discharges, and Q point current potentials are correspondingly lowered to first voltage, and then are again turned on NT6.
5th stage, when CK3 is high level, and CK1 is low level.It should be noted that now although clock signal is repeated as
The clock signal in one stage, but the process inside circuit differs, it is specific as follows.Now Gn-2 invalidating signals, but Gn+2 believes
Number effectively (because adjacent CK1 and CK3 are exchanged, therefore when Gn exports in CK1, the first stage equivalent to Gn+2；And
Gn+2 exports Gn+2 high level in CK3, exports Gn high level in CK1 equivalent to Gn).Under Gn+2 effects, NT10 is opened,
D2U low level signal reaches Q points, closes NT7.NT14 is opened simultaneously, and U2D high level signal reaches NT3 control terminal,
Because P points were low potential in the last stage, therefore NT3 is opened, and P points are pulled up to high potential, and then NT8 is opened, output end Gn
Export stable low level signal VGL.The second electric capacity C2 is electrically charged simultaneously, after NT3 closings, can maintain the high potential of P points.
6th stage, when CK1 is high level, and CK3 is low level.Now NT4 and NT5 are opened simultaneously, and low level applies
In Q points, NT7 is set more reliably to close.Output end Gn is still maintained stable low level by NT8.In NT7 control terminal
Parasitic capacitance between clock signal input terminal be present, due to the effect of the parasitic capacitance, it is possible to cause Q current potential second
Clock CK is lifted when being high level, and then triggers NT7 unlatching to cause the disabler of circuit, can be using NT4 and NT5
In the scanning process of one frame picture, repeatedly apply low level signal to Q points, improve the reliability of circuit.
In ensuing multiple sweep phases, due to the level of line n, to be conveyed into signal Gn-2 and Gn+2 invalid, therefore should
Horizontal drive circuit no longer changes.
When needing to perform TP scannings in normal row during scanning, including following process：
Assuming that inserting TP scanning processes between the n-th -2 row and line n, then now line n pixel cell is in above-mentioned row
The second stage of turntable driving, i.e. CK1 and CK3 are low level, and Q points have been charged to high potential, and NT7 is opened and exported
CK1 or CK3 low level signal.NT8 is opened simultaneously, and VGL signals are transformed to Gate (grid) letter corresponding with TP scanning signals
Number NT8 output end export, as shown in the touch-control sweep phase in Fig. 2 and Fig. 3.
As can be seen that the GOA drive circuits of the embodiment of the present application, can realize all gate in blank screen awakening phase
Function, and by the control to drive circuit inside key node, eliminate the risk of circuit generating function failure, improve drive
The reliability of dynamic circuit.
Fig. 4 is the structural representation of the GOA drive circuits of another embodiment of the application.Compared with previous embodiment, the drive
Dynamic circuit adds sixteenmo and closes element NT16.Switch element NT16 input is respectively coupled to the 5th with output end and opened
Close element NT8 input (VGL) and output end (Gn), input termination VGL, control termination GAS2 signals.In TP sweep phases,
The effect for scanning influence TP when NT8 output terminal potential is unstable, NT16 can be used for eliminating Gate output current potential shakinesses
Risk.Specifically, stopping the stage in TP, NT16 can be kept it turned in the presence of GAS2, and be scanned with NT8 synchronism outputs TP
Signal, doubleway output is to ensure to stop in TP the stabilization of stage scanning signal.
From Fig. 4 it can also be seen that compared with previous embodiment, the drive circuit also add the 17th switch element
NT17.NT17 output end is coupled to the output end of scanning signal control unit 100, i.e. NT1 output end, and it is solid that it inputs termination
Fixed low level signal VGL, control termination RST signal.The switch element pulls down the 4th switch element NT7's after circuit start
Control terminal, by carrying out low potential initialization to the current potential of Q points to improve the reliability of circuit.Specifically, the drive with odd-numbered line
Exemplified by dynamic circuit, in the startup stage of drive circuit, because the current potential at Q points not can determine that, therefore, except the first row pixel cell
Other rows in addition are when the high level signal at CK ends arrives, due to posting between NT7 control terminal and clock signal input terminal
The effect of raw electric capacity, it is possible to cause Q current potential to be lifted, so that NT7 is opened and the disabler of detonator circuit.NT17
Current potential available for the initial time drop-down Q points started in drive circuit is to the low potential determined, to ensure that drive circuit can be with
Reliably start.
It should be noted that in previous embodiment, determined in order that Q points are located in the starting stage that drive circuit starts
Low potential, by increasing the width of RST pulse, even if RST signal maintains effectively between CK1 and CK2 high period, such as scheme
Shown in 3, the NT4 that grid is controlled by clock signal CK1 and CK2 can so turned on, and pull down the electricity of Q points by NT4 and NT5
Position, but for the NT4 that grid control by clock signal CK3 and CK4, it is impossible to carve turn on startup, and then due to can not
The low potential determined is set certain failure risk to be present for Q points.NT17 introducing can reduce this risk.
Further figure 4, it is seen that the 11st switch element NT14 and the 12nd switch element NT15 and signal
XCK, U2D and D2U annexation are also converted, and this is to more stably control the current potential of P points, can combine Fig. 5
Work schedule analyzed, here is omitted.
The GOA drive circuits of the embodiment of the present application, destabilizing factor present in circuit can be effectively eliminated, reduce electricity
The disabler risk on road.The GOA drive circuit structures of the embodiment of the present application are applied to NMOS and PMOS circuits simultaneously, and apply
Extensively, it can be used in the raster data model field of LCD and OLED mobile phone, display, TV etc..
Although disclosed herein embodiment as above, described content only to facilitate understand the present invention and adopt
Embodiment, it is not limited to the present invention.Any those skilled in the art to which this invention pertains, this is not being departed from
On the premise of the disclosed spirit and scope of invention, any modification and change can be made in the implementing form and in details,
But the scope of patent protection of the present invention, still should be subject to the scope of the claims as defined in the appended claims.
Claims (6)
1. a kind of GOA drive circuits, are provided with multistage GOA drive modules, every grade of GOA drive module includes：
First driver element, for exporting line scan signals during scanning of being expert at；
Second driver element, its output end and the output end of first driver element couple, for being maintained during scanning of being expert at
The output signal of output end, and the output scanning signal corresponding with touch scanning signals during touch-control scans；
Driver element is waken up, for making drive modules at different levels when blank screen wakes up while exporting effective row signal；
First control unit, for closing first driver element；
Second control unit, for being turned on and off second driver element；
Scanning signal control unit, the line scan signals of previous stage or rear stage drive module are received, list is driven to this level first
First output control signal is to realize forward scan or reverse scan；
First driver element includes：
4th switch element, its control terminal receive the control signal of the scanning signal control unit output, and according to reception
Second clock signal output line scan signals；
First electric capacity, its both ends is respectively coupled to control terminal and output end in the 4th switch element, for pullup or pulldown
The current potential of the control terminal of 4th switch element；
Second driver element includes：
5th switch element, its output end are coupled in the output end of the 4th switch element, and its input is expert at during scanning
Low level signal is connect, in touch-control sweep time scanning signal corresponding with touch scanning signals indirectly；
6th switch element, its output end and the control terminal of the 5th switch element couple, and its control terminal and its input are short
Connect, for opening the 5th switch element after blank screen wakes up；
Second electric capacity, its both ends are respectively coupled to control terminal and input in the 5th switch element, for keeping described
The current potential of the control terminal of five switch elements；
The wake-up driver element includes：
13rd switch element, its output end and the output end of the 4th switch element couple, and its control terminal and input are short
Connect；
14th switch element, its input are respectively coupled to input and the control of the 5th switch element with output end
End；
During blank screen wakes up, the 13rd switch element is opened with the 14th switch element, and the described 14th opens
The current potential that element pulls down the control terminal of the 5th switch element is closed, the 13rd switch element is effective in the output of its output end
Row signal make all horizontal scanning line signal standard-sized sheets.
2. GOA drive circuits according to claim 1, it is characterised in that every grade of GOA drive modules also include：
Electric leakage preventing and treating unit, connects first driver element and the scanning signal control unit, prevents from reaching described first
The control signal of driver element produces leakage current.
3. GOA drive circuits according to claim 2, it is characterised in that the electric leakage preventing and treating unit includes：
15th switch element, its input and output end are respectively coupled to output end and the institute of the scanning signal control unit
State the control terminal of the 4th switch element；
The control termination high level signal of 15th switch element, and it is height in the control terminal of the 4th switch element
The discharge loop of the control terminal of the 4th switch element is closed during current potential.
4. GOA drive circuits according to claim 2, it is characterised in that every grade of GOA drive modules also include：
Sixteenmo closes element, and its input is respectively coupled to input and the output of the 5th switch element with output end
End；
During touch-control scans, the sixteenmo closes element and the 5th switch element synchronism output and touch scanning signals
Corresponding scanning signal.
5. GOA drive circuits according to claim 2, it is characterised in that every grade of GOA drive modules also include：
17th switch element, its output end are coupled to the output end of the scanning signal control unit, and it, which is inputted, terminates low electricity
Ordinary mail number；
17th switch element is opened when drive circuit starts to pull down the control terminal of the 4th switch element to low
Current potential.
6. GOA drive circuits according to any one of claim 1 to 5, it is characterised in that for driving the drive of odd-numbered line
Dynamic model block drives the drive module of even number line each to use two clock cables, two clock cable interlacing with being used for
Alternating is connected to the drive module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510824291.0A CN105261343B (en) | 2015-11-24 | 2015-11-24 | A kind of GOA drive circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510824291.0A CN105261343B (en) | 2015-11-24 | 2015-11-24 | A kind of GOA drive circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105261343A CN105261343A (en) | 2016-01-20 |
| CN105261343B true CN105261343B (en) | 2018-01-02 |
Family
ID=55101003
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510824291.0A Active CN105261343B (en) | 2015-11-24 | 2015-11-24 | A kind of GOA drive circuits |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105261343B (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106652901B (en) * | 2016-12-22 | 2019-12-31 | 武汉华星光电技术有限公司 | Drive circuit and display device using the same |
| CN107358927B (en) * | 2017-07-31 | 2019-07-23 | 武汉华星光电半导体显示技术有限公司 | A kind of scan drive circuit and device |
| US10665192B2 (en) | 2017-07-31 | 2020-05-26 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Scan driving circuit and apparatus thereof |
| CN107195281B (en) * | 2017-07-31 | 2019-01-15 | 武汉华星光电半导体显示技术有限公司 | A kind of scan drive circuit and device |
| CN107767833A (en) * | 2017-11-17 | 2018-03-06 | 武汉华星光电技术有限公司 | A kind of GOA circuits |
| CN107871483B (en) * | 2017-11-27 | 2020-03-17 | 武汉华星光电技术有限公司 | GOA circuit embedded touch display panel |
| CN108877718B (en) * | 2018-07-24 | 2021-02-02 | 武汉华星光电技术有限公司 | GOA circuit and display device |
| CN112017583A (en) | 2020-09-09 | 2020-12-01 | 武汉华星光电技术有限公司 | Multiplexing grid drive circuit and display panel |
| CN114639349B (en) * | 2022-03-24 | 2023-12-22 | 京东方科技集团股份有限公司 | Display control module and display device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI401663B (en) * | 2009-03-13 | 2013-07-11 | Au Optronics Corp | Display device with bi-directional voltage stabilizers |
| CN103295512B (en) * | 2012-10-22 | 2016-01-27 | 上海中航光电子有限公司 | Shift register, array base palte and display panel |
| CN104485079B (en) * | 2014-12-31 | 2017-01-18 | 深圳市华星光电技术有限公司 | GOA (Gate Driver On Array) circuit for liquid crystal display device |
| CN104934011B (en) * | 2015-07-20 | 2018-03-23 | 合肥京东方光电科技有限公司 | Shift register cell, gate driving circuit and display device |
| CN105047158B (en) * | 2015-08-21 | 2017-11-10 | 深圳市华星光电技术有限公司 | A kind of GOA circuits and liquid crystal display |
-
2015
- 2015-11-24 CN CN201510824291.0A patent/CN105261343B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN105261343A (en) | 2016-01-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105261343B (en) | A kind of GOA drive circuits | |
| CN104252851B (en) | Shift register | |
| CN105810170B (en) | Shift register cell and its driving method, grid line driving circuit and array substrate | |
| CN106057147B (en) | Shift register cell and its driving method, gate driving circuit, display device | |
| CN105632441B (en) | Gate driving circuit | |
| CN105469761B (en) | GOA circuits for narrow frame liquid crystal display panel | |
| CN105068682B (en) | sensing display device and shift register thereof | |
| CN105469754B (en) | Reduce the GOA circuits of feed-trough voltage | |
| CN103050106B (en) | Gate driving circuit, display module and displayer | |
| CN103680387B (en) | A kind of shift register and driving method, display device | |
| CN104360781B (en) | Driver element, drive circuit, contact panel and the driving method of touch control electrode | |
| CN107578741A (en) | Shift register cell and its driving method, gate driving circuit, display device | |
| CN103413531B (en) | A kind of shift register cell, gate driver circuit and display device | |
| CN105609071B (en) | Shift register and its driving method, gate driving circuit and display device | |
| CN104240765B (en) | Shift register cell and driving method, gate driving circuit and display device | |
| CN104616618B (en) | Shifting register unit, shifting register, display panel and display device | |
| CN103456259B (en) | A kind of gate driver circuit and grid line driving method, display device | |
| CN104882168B (en) | Shifting deposit unit, shift register, gate driving circuit and display device | |
| CN106782395B (en) | The driving method and driving device of GOA circuit | |
| CN107958656A (en) | GOA circuits | |
| CN106782389A (en) | A kind of array base palte horizontal drive circuit | |
| CN106875911A (en) | Shift register cell, gate driving circuit and its driving method | |
| CN105185342B (en) | Raster data model substrate and the liquid crystal display using raster data model substrate | |
| CN107154245A (en) | A kind of gate driving circuit and its driving method | |
| CN108281124A (en) | Shift register cell and its driving method, gate driving circuit and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |