CN106782389A - A kind of array base palte horizontal drive circuit - Google Patents

A kind of array base palte horizontal drive circuit Download PDF

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Publication number
CN106782389A
CN106782389A CN201611255343.8A CN201611255343A CN106782389A CN 106782389 A CN106782389 A CN 106782389A CN 201611255343 A CN201611255343 A CN 201611255343A CN 106782389 A CN106782389 A CN 106782389A
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China
Prior art keywords
transistor
signal
grid
node
output end
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CN201611255343.8A
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Chinese (zh)
Inventor
颜尧
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to CN201611255343.8A priority Critical patent/CN106782389A/en
Publication of CN106782389A publication Critical patent/CN106782389A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a kind of array base palte horizontal drive circuit, it is characterised in that including multiple drive power module, N grades of drive module includes:Scan control unit, node charhing unit, output holding unit, drop-down holding unit, drop-down control unit, blank screen output control unit and blank screen wake up output control unit.The competitive risk that circuit exists in normal non-touch-control sweep phase key node current potential can be eliminated using this programme, and holding circuit circuit key node when touch-control sweep phase sequential needs special variation stabilization.

Description

A kind of array base palte horizontal drive circuit
Technical field
Electricity is driven the present invention relates to the drive circuit technical field of liquid crystal display, more particularly to a kind of array base palte row Road.
Background technology
Array base palte horizontal drive circuit, that is, using existing thin-film transistor liquid crystal display array processing procedure by gate line Scanning drive signal circuit production realizes a technology of the type of drive to grid progressive scan on array base palte.Array Substrate horizontal drive circuit can not only reduce the welding sequence of external integrated circuit, improve integrated level, can also improve production capacity drop Low production cost, becomes the first-selection of In Cell (touch-control circuit is in liquid crystal cell inner mold) type touch-control display panel.In Cell types The type of drive of touch-control display panel is that timesharing drives, and will show that driving and touching signals are driven apart is carried out.
With developing rapidly for lcd technology, In Cell types touch-control display panels are widely used by people.Fig. 1 It is the N grades of structural representation of drive module of the array base palte horizontal drive circuit of existing In Cell type touch-control display panels, such as Shown in figure, N grade drive module includes scan control unit 100, node charhing unit 200, exports holding unit 300, drop-down Holding unit 400, drop-down control unit 500, blank screen output control unit 600 and blank screen wake up output control unit 700.The electricity Road generally there are competitive risk in normal non-touch-control sweep phase key node current potential, and in touch-control sweep phase due to sequential Special variation is needed to impact the stability of circuit key node.
To sum up, need badly to be improved existing array base palte horizontal drive circuit and scanned in normal non-touch-control with eliminating circuit The competitive risk that stage key node current potential is present, and holding circuit electricity when touch-control sweep phase sequential needs special variation The stabilization of road key node.
The content of the invention
For above-mentioned technical problem, the invention provides a kind of array base palte horizontal drive circuit, including multiple drive power module, N grades of drive module includes:
Scan control unit, its forward and reverse scanning direction for being used to control circuit and transmission come from front stage drive module Level pass signal;
Node charhing unit, the output end of its electrical connection scan control unit, for according to the scan control list The level of unit's output passes the signal transmission between signal control malleation constant voltage signal and Q nodes, and thus Q nodes are pre-charged;
Output holding unit, its electrical connection Q nodes, the first clock signal and this grade of drive module output end, for according to Q The voltage of node controls the signal transmission between the first clock signal and this grade of drive module output end, thus in drive module This grade of drive signal is exported during effect;
Drop-down holding unit, its electrical connection P node, negative pressure constant voltage signal, Q nodes and this grade of drive module output end, uses Controlled between negative pressure constant voltage signal and Q nodes and according to the voltage of P node control negative pressure constant pressure letter according to the voltage of P node The signal transmission number and this grade of row drive module output end between, maintains Q nodes between the inaction period of drive module of being thus expert at With this grade of low level state of circuit output end;
Drop-down control unit, the output end of its electrical connection scan control unit, the first clock signal, second clock letter Number, negative pressure constant voltage signal and P node, and this grade of row drive module output end, for when the normal display stage is according to first Clock signal and second clock signal control the voltage of P node, and keep P when this grade of drive signal is lifted to high level state The low level state of node;
Blank screen output control unit, its electrical connection first grid selection control signal, P node and this grade of row drive module are defeated Go out end, low level state and this grade of high level of circuit output end for keeping P node in all drive module opening stages State;
Blank screen wakes up output control unit, and its electrical connection second grid selection control signal and this grade of row drive module are exported End, for controlling this grade of output of drive signal in touch screen sweep phase.
In one embodiment, the scan control unit includes the first transistor and transistor seconds, and described first is brilliant The grid of body pipe is connected with the first drive signal, and the source electrode of the first transistor is connected with the gate drive signal;It is described The grid of transistor seconds is connected with the second drive signal, and the source electrode of the transistor seconds and the gate drive signal connect Connect.
In one embodiment, the node charhing unit include third transistor, the grid of the third transistor with The output end connection of the scan control unit, the source electrode of the third transistor is connected with malleation constant voltage signal, and the described 3rd The drain electrode of transistor is connected with Q nodes.
In one embodiment, the output holding unit includes the 4th transistor, the tenth two-transistor and the first electric capacity, The grid of the 4th transistor is connected with malleation constant voltage signal, and the source electrode of the 4th transistor is connected with the Q nodes, institute The drain electrode for stating the 4th transistor is connected with the grid of the tenth two-transistor;The source electrode of the tenth two-transistor and when first Clock signal is connected, and the drain electrode of the tenth two-transistor is connected with this grade of drive module output end.
In one embodiment, the drop-down holding unit includes the tenth transistor, the 11st transistor and the second electric capacity, The grid of the tenth transistor is connected with the P node, and the source electrode of the tenth transistor is connected with the Q nodes, described The drain electrode of the tenth transistor is connected with negative pressure constant voltage signal;The grid of the 11st transistor is connected with the P node, described The source electrode of the 11st transistor is connected with described level drive module output end, and the drain electrode of the 11st transistor is permanent with negative pressure Pressure signal connection;One end of second electric capacity is connected with the P node, and the other end of second electric capacity is permanent with the negative pressure Pressure signal connection.
In one embodiment, the drop-down control unit include the 5th transistor, the 6th transistor, the 7th transistor, 8th transistor, the 9th transistor, the 16th transistor and the 3rd electric capacity, the grid and source electrode of the 5th transistor respectively with The first clock signal connection, the drain electrode of the 5th transistor is connected with the grid of the 6th transistor;Described 6th The source electrode of transistor is connected with second clock signal, and the drain electrode of the 6th transistor connects with the grid of the 7th transistor Connect;The source electrode of the 7th transistor is connected with the second clock signal, the drain electrode of the 7th transistor and the P node Connection;The grid of the 8th transistor is connected with the output end of the scan control unit, the source electrode of the 8th transistor Drain electrode with the 5th transistor is connected, and the drain electrode of the 8th transistor is connected with negative pressure constant voltage signal;Described 9th is brilliant The grid of body pipe is connected with the grid of the 8th transistor, and the source electrode of the 9th transistor is connected with the P node, described The drain electrode of the 9th transistor is connected with negative pressure constant voltage signal;The grid of the 16th transistor is defeated with described level drive module Go out end connection, the source electrode of the 16th transistor is connected with the P node, the drain electrode of the 16th transistor and negative pressure Constant voltage signal is connected;One end of 3rd electric capacity is connected with the drain electrode of the 5th transistor, the 3rd electric capacity it is another End is connected with negative pressure constant voltage signal.
In one embodiment, the blank screen output control unit includes the 14th transistor and the 15th transistor, institute The grid for stating the 14th transistor is connected with first grid selection control signal, the source electrode and the P of the 14th transistor Node is connected, and the drain electrode of the 14th transistor is connected with negative pressure constant voltage signal;The grid of the 15th transistor and source Pole is connected with first grid selection control signal respectively, drain electrode and the described level drive module of the 15th transistor Output end is connected.
In one embodiment, the blank screen wakes up output control unit includes the 13rd transistor, and the described 13rd is brilliant The grid of body pipe is connected with second grid selection control signal, and source electrode and the negative pressure constant voltage signal of the 13rd transistor connect Connect, the drain electrode of the 13rd transistor is connected with described level drive module output end.
Present invention also offers a kind of array base palte horizontal drive circuit, including multiple drive power module, N grades of drive module bag Include:
Scan control unit, its forward and reverse scanning direction for being used to control circuit and transmission come from front stage drive module Level pass signal;
Node charhing unit, the output end of its electrical connection scan control unit, for according to the scan control list The level of unit's output passes the signal transmission between signal control malleation constant voltage signal and Q nodes, and thus Q nodes are pre-charged;
Output holding unit, its electrical connection Q nodes, the first clock signal and this grade of drive module output end, for according to Q The voltage of node controls the signal transmission between the first clock signal and this grade of drive module output end, thus in drive module This grade of drive signal is exported during effect;
Drop-down holding unit, its electrical connection P node, negative pressure constant voltage signal, Q nodes and this grade of drive module output end, uses Controlled between negative pressure constant voltage signal and Q nodes and according to the voltage of P node control negative pressure constant pressure letter according to the voltage of P node The signal transmission number and this grade of row drive module output end between, maintains Q nodes between the inaction period of drive module of being thus expert at With this grade of low level state of circuit output end;
Drop-down control unit, the output end of its electrical connection scan control unit, the first clock signal, second clock letter Number, negative pressure constant voltage signal, and Q nodes and P node, in the normal display stage according to the first clock signal and second clock Signal controls the voltage of P node, and voltage to Q nodes and P node to carry out coordinated signals;
Blank screen output control unit, its electrical connection first grid selection control signal, P node and this grade of row drive module are defeated Go out end, low level state and this grade of high level of circuit output end for keeping P node in all drive module opening stages State, and eliminate P node leaky caused by first grid selection control signal and negative pressure constant voltage signal impedance mismatch;
Blank screen wakes up output control unit, and its electrical connection second grid selection control signal and this grade of row drive module are exported End, for controlling this grade of output of drive signal in touch screen sweep phase.
In one embodiment, the drop-down control unit include the 5th transistor, the 6th transistor, the 7th transistor, 8th transistor, the 9th transistor and the 3rd electric capacity, the grid and source electrode of the 5th transistor respectively with first clock Signal is connected, and the drain electrode of the 5th transistor is connected with the grid of the 6th transistor;The source electrode of the 6th transistor It is connected with second clock signal, the drain electrode of the 6th transistor is connected with the grid of the 7th transistor;Described 7th is brilliant The source electrode of body pipe is connected with the second clock signal, and the drain electrode of the 7th transistor is connected with P node;8th crystal The grid of pipe is connected with the output end of the scan control unit, source electrode and the 5th transistor of the 8th transistor Drain electrode connection, the drain electrode of the 8th transistor is connected with negative pressure constant voltage signal;The grid of the 9th transistor is saved with the Q Point connection, the source electrode of the 9th transistor is connected with the P node, drain electrode and the negative pressure constant voltage signal of the 9th transistor Connection;One end of 3rd electric capacity is connected with the drain electrode of the 5th transistor, the other end and negative pressure of the 3rd electric capacity Constant voltage signal is connected.
In one embodiment, the blank screen output control unit includes the 14th transistor, the 15th transistor and the 17 transistors, the grid of the 14th transistor is connected with first grid selection control signal, the 14th transistor Source electrode be connected with the P node, the drain electrode of the 14th transistor is connected with the source electrode of the 17th transistor;It is described The grid and source electrode of the 15th transistor are connected with first grid selection control signal respectively, the 15th transistor Drain electrode is connected with described level drive module output end;The grid of the 17th transistor is exported with described level drive module End connection, the drain electrode of the 17th transistor is connected with negative pressure constant voltage signal.
In one embodiment, the blank screen wakes up output control unit includes the 13rd transistor, and the described 13rd is brilliant The grid of body pipe is connected with second grid selection control signal, and source electrode and the negative pressure constant voltage signal of the 13rd transistor connect Connect, the drain electrode of the 13rd transistor is connected with described level drive module output end.
Compared with prior art, one or more embodiments of the invention can have the following advantages that:
(1) in the first array base palte horizontal drive circuit that the present invention is provided, because drop-down control unit can be normal The display stage controls the voltage of P node according to the first clock signal and second clock signal, and in this grade of drive signal lifting To the low level state that P node is kept during high level state, thus, it is able to maintain that circuit in touch-control sweep phase using this programme Sequential needs the stabilization of circuit key node during special variation.
(2) in second array base palte horizontal drive circuit that the present invention is provided, because drop-down control unit can be according to the One clock signal and second clock signal control the voltage of P node, and voltage to Q nodes and P node carries out coordinated signals, Interference can be reduced beneficial to circuit stability, and blank screen output unit can eliminate first grid selection control signal and negative pressure is permanent Pressure signal impedance mismatches caused P node leaky.Thus, circuit can be eliminated using this programme and swept in normal non-touch-control Retouch the competitive risk of stage key node current potential presence.
Other features and advantages of the present invention will be illustrated in the following description, also, the partly change from specification Obtain it is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages can be by specification, rights Specifically noted structure is realized and obtained in claim and accompanying drawing.
Brief description of the drawings
Accompanying drawing is used for providing a further understanding of the present invention, and constitutes a part for specification, with reality of the invention Apply example to be provided commonly for explaining the present invention, be not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the N grades of knot of drive module of the array base palte horizontal drive circuit of existing In Cell type touch-control display panels Structure schematic diagram;
Fig. 2 is that the structure of N grades of drive module of array base palte horizontal drive circuit according to a first embodiment of the present invention is shown It is intended to;
Fig. 3 is SECO figure according to a first embodiment of the present invention;
Fig. 4 is that the structure of N grades of drive module of array base palte horizontal drive circuit according to a second embodiment of the present invention is shown It is intended to;
Fig. 5 be according to a second embodiment of the present invention in existing array base palte horizontal drive circuit in this grade of drive signal with it is negative The emulation schematic diagram for pressing the saltus step of constant voltage signal to postpone.
Specific embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, how the present invention is applied whereby Technological means solves technical problem, and reaches the implementation process of relevant art effect and can fully understand and implement according to this.This Shen Each feature that please be in embodiment and embodiment, can be combined with each other on the premise of not colliding, the technical side for being formed Case is within protection scope of the present invention.
First embodiment
In order to meet the requirement of small size In Cell type touch-control display panels, in the present embodiment, array base palte row is driven Dynamic circuit is separately positioned on the both sides of viewing area, and one-level array base palte row drive module is correspondingly arranged per one-row pixels unit. For example, by the drive module setting of odd-numbered line in the left side of viewing area, the drive module setting of even number line is in viewing area Right side, and drive circuit integrally uses interleaved type of drive, the output of left and right odd-even alternation.
Fig. 2 is that the structure of N grades of drive module of array base palte horizontal drive circuit according to a first embodiment of the present invention is shown It is intended to.This programme is described in detail with reference to Fig. 2.
As shown in Fig. 2 N grades of drive module of the present embodiment array base palte horizontal drive circuit includes:Scan control unit 100th, node charhing unit 200, output holding unit 300, drop-down holding unit 400, the output of drop-down control unit 501, blank screen Control unit 600 and blank screen wake up output control unit 700.
Scan control unit 100, its forward and reverse scanning direction for being used to control circuit and transmission drive from front stage The level of module passes signal.Specifically, as shown in Fig. 2 scan control unit 201 uses N-2 grades of gate drive signal G (n-2) Or N+2 grades of gate drive signal G (n+2) passes signal as level, uses the first drive signal U2D or the second drive signal D2U Alternatively input signal.
The scan control unit 100 includes the first transistor NT1 and transistor seconds NT2, the first transistor NT1 Grid be connected with the first drive signal, the source electrode of the first transistor NT1 is connected with N-2 grades of gate drive signal;Institute The grid for stating transistor seconds NT2 is connected with the second drive signal, the source electrode and N+2 grades of grid of the transistor seconds NT2 Drive signal is connected.
When being scanned from the top down, U2D is set to high level, and D2U is set to low level, then in N-2 grades of grid In the presence of the high level of drive signal G (n-2), the output end output U2D's of the first transistor NT1 and transistor seconds NT2 High level signal, the control signal output of output to scan control unit 100 when the first clock signal CK (N) is high level End.
Similarly, when being scanned from bottom to top, D2U is set to high level, and U2D is set to low level, then at N+2 grades In the presence of the high level of gate drive signal G (n-2), the output end output of the first transistor NT1 and transistor seconds NT2 Scan control unit 100 is arrived in the high level signal of D2U, control signal output when the first clock signal CK (N) is high level Output end.
The control signal of output can be used for opening node charhing unit 200.Similarly, the low level signal of U2D or D2U can For closed node charhing unit 200.
Node charhing unit 200, the output end of its electrical connection scan control unit, for according to the scan control The level of unit output passes the signal transmission between signal control malleation constant voltage signal VGH and Q node, and thus Q nodes are pre-charged.
The node charhing unit 200 includes third transistor NT3, and the grid of the third transistor NT3 is swept with described The output end connection of control unit is retouched, the source electrode of the third transistor NT3 is connected with malleation constant voltage signal VGH, the described 3rd The drain electrode of transistor NT3 is connected with Q nodes.
After third transistor NT3 is opened, malleation constant voltage signal VGH to Q nodes are input into by third transistor NT3, Q is saved Point precharge.
Output holding unit 300, its electrical connection Q nodes, the first clock signal CK (N) and this grade of drive module output end, For controlling the signal transmission between the first clock signal CK (N) and this grade of drive module output end according to the voltage of Q nodes, by This exports this grade of drive signal during the effect of drive module.
The output holding unit 300 includes the 4th transistor NT4, the tenth two-transistor NT12 and the first electric capacity C1, institute The grid for stating the 4th transistor NT4 is connected with malleation constant voltage signal VGH, source electrode and the Q nodes of the 4th transistor NT4 Connection, the drain electrode of the 4th transistor NT4 is connected with the grid of the tenth two-transistor NT12;Tenth two-transistor The source electrode of NT12 is connected with the first clock signal CK (N), and the drain electrode of the tenth two-transistor NT12 is defeated with this grade of drive module Go out end connection.
Malleation constant voltage signal VGH is input into the 4th transistor NT4, to open the 4th transistor NT4.The first electric capacity C1's Under effect, the current potential of Q nodes is also increased, the grid potential of the tenth two-transistor NT12 also in lifting, it is ensured that the 12nd Transistor NT12 can stablize unlatching.First clock signal CK (N) is used to form this grade of drive signal Gn, realizes to one-row pixels The scanning of unit.
Drop-down holding unit 400, its electrical connection P node, negative pressure constant voltage signal VGL, Q node and this grade of drive module output End, for according between the voltage of P node control negative pressure constant voltage signal VGL and Q node and negative according to the control of the voltage of P node Signal transmission, the inaction period of drive module of being thus expert between pressure constant voltage signal VGL and this grade of row drive module output end Between maintain the low level state of Q nodes and this grade of circuit output end.
The drop-down holding unit 400 includes the tenth transistor NT10, the 11st transistor NT11 and the second electric capacity C2, institute The grid for stating the tenth transistor NT10 is connected with the P node, and source electrode and the Q nodes of the tenth transistor NT10 connect Connect, the drain electrode of the tenth transistor NT10 is connected with negative pressure constant voltage signal VGL;The grid of the 11st transistor NT11 with The P node connection, the source electrode of the 11st transistor NT11 is connected with described level drive module output end, and the described tenth The drain electrode of one transistor NT11 is connected with negative pressure constant voltage signal VGL;One end of the second electric capacity C2 is connected with the P node, The described other end is connected with the negative pressure constant voltage signal VGL.
Between the inaction period of drive module of being expert at, the second electric capacity C2 can maintain P node after the current potential of P node disappears Current potential, so that the tenth transistor NT10 and the 11st transistor NT11 conductings.Negative pressure constant voltage signal VGL is by the tenth transistor NT10 Output end down for the low level of stabilization, using the pulldown function of the tenth transistor NT10, the low electricity of stabilization is maintained in Q nodes It is flat.Using the pulldown function of the 11st transistor NT11, this grade of circuit output end maintains the low level of stabilization.
Drop-down control unit 501, the output end of its electrical connection scan control unit, the first clock signal CK (N), the Two clock signal CK (N+2), negative pressure constant voltage signal VGL and P node, and this grade of row drive module output end, for normal The display stage controls the voltage of P node according to the first clock signal CK (N) and second clock signal, and in this grade of drive signal The low level state of P node is kept when being lifted to high level state.
The drop-down control unit 501 includes the 5th transistor NT5, the 6th transistor NT6, the 7th transistor NT7, the 8th Transistor NT8, the 9th transistor NT9, the 16th transistor NT16 and the 3rd electric capacity C3, the grid of the 5th transistor NT5 It is connected with the first clock signal CK (N) respectively with source electrode, drain electrode and the 6th transistor of the 5th transistor NT5 The grid connection of NT6;The source electrode of the 6th transistor NT6 is connected with second clock signal CK (N+2), the 6th transistor The drain electrode of NT6 is connected with the grid of the 7th transistor NT7;The source electrode and the second clock of the 7th transistor NT7 Signal CK (N+2) is connected, and the drain electrode of the 7th transistor NT7 is connected with the P node;The grid of the 8th transistor NT8 Pole is connected with the output end of the scan control unit, and the source electrode of the 8th transistor NT8 is with the 5th transistor NT5's Drain electrode connection, the drain electrode of the 8th transistor NT8 is connected with negative pressure constant voltage signal VGL;The grid of the 9th transistor NT9 Grid with the 8th transistor NT8 is connected, and the source electrode of the 9th transistor NT9 is connected with the P node, and the described 9th The drain electrode of transistor NT9 is connected with negative pressure constant voltage signal VGL;The grid of the 16th transistor NT16 and this grade of drive module Output end is connected, and the source electrode of the 16th transistor NT16 is connected with the P node, the 16th transistor NT16's Drain electrode is connected with negative pressure constant voltage signal VGL;One end of the 3rd electric capacity C3 is connected with the drain electrode of the 5th transistor NT5, The other end of the 3rd electric capacity C3 is connected with negative pressure constant voltage signal VGL.
Increase a transistor NT16 in existing drop-down control unit 500, the tenth is controlled by this grade of drive signal The grid of six transistor NT16, negative pressure constant voltage signal VGL drags down the current potential of P node, is lifted to being maintained at this grade of drive signal The low level state of P node is kept during high level state, prevents it from making the tenth transistor NT10 in drop-down holding unit 400 micro- Cause Q node high potentials are convinced by patient analysis to miss and cause circuit output impacted.
Blank screen output control unit 600, its electrical connection first grid selection control signal GAS1, P node and this level row drive Dynamic model block output end, low level state and this grade of circuit output end for keeping P node in all drive module opening stages High level state.
The blank screen output control unit 600 includes the 14th transistor NT14 and the 15th transistor NT15, described the The grid of 14 transistor NT14 is connected with first grid selection control signal GAS1, the source electrode of the 14th transistor NT14 It is connected with the P node, the drain electrode of the 14th transistor NT14 is connected with negative pressure constant voltage signal VGL;Described 15th is brilliant The grid and source electrode of body pipe NT15 are connected with first grid selection control signal GAS1 respectively, the 15th transistor The drain electrode of NT15 is connected with described level drive module output end.
All drive module opening functions refer to when liquid crystal display panel blank screen, it usually needs realized in a period of time Make the operation that the grid of the whole pixel cells in viewing area is opened simultaneously to empty the residual electric potential on pixel electrode.First Grid selection control signal GAS1 remains high level, the 14th transistor NT14 and the 15th transistor NT15 during blank screen Open, in this grade of drive output output drive signal, i.e., lasting high level signal makes all horizontal scanning line signal standard-sized sheets.The 14 transistor NT14 are opened, can be with the current potential of drop-down P node.
Blank screen wakes up output control unit 700, and its electrical connection second grid selection control signal GAS2 and this level row drive Module output end, for controlling this grade of output of drive signal in touch screen sweep phase.
The blank screen wakes up output control unit 700 includes the 13rd transistor NT13, the 13rd transistor NT13 Grid and second grid selection control signal GAS2 be connected, the source electrode and negative pressure constant voltage signal of the 13rd transistor NT13 VGL is connected, and the drain electrode of the 13rd transistor NT13 is connected with described level drive module output end.
In touch-control sweep phase, the effect of touch-control scanning, the 13rd will be influenceed when the 11st transistor NT11 is unstable Transistor NT13 can be used to eliminate the unstable risk of grid output current potential.Specifically, during touch-control is scanned, the 13rd crystal Pipe NT13 can keep it turned in the presence of second grid selection control signal GAS2, and synchronous with the 11st transistor NT11 Output touch scanning signals, it is ensured that the stabilization of touch scanning signals during touch-control scanning.
Fig. 3 is SECO figure according to a first embodiment of the present invention, and the SECO figure is the circuit in the present embodiment The corresponding all drive module opening stages of blank screen and blank screen normal display and the SECO of touch-control sweep phase after waking up Figure.
When scan mode to scan from top to bottom, U2D is high level signal, and D2U is low level signal, and VGH and VGL are Fixed high level signal and low level signal.STV is first trigger signal for starting scanning.Clock signal includes four Group clock signal:First group of clock signal CK1, second group of clock signal CK2, the 3rd group of clock signal CK3 and the 4th group of clock Signal CK4.When N group clock signals CK (N) is the 4th group of clock signal CK4,.When N group clock signals CK (N) is first During group clock signal CK1, N-1 group clock signals CK (N-1) is the 4th group of clock signal CK4.
The present embodiment provides array base palte horizontal drive circuit for touch-control display panel, the touch-control display panel it is worked During journey is divided into blank screen and during blank screen wake-up.Include that touch control detection stage and all gate drive signals open work(during blank screen Energy stage, blank screen awakening phase includes normal display stage and touch screen sweep phase.
It follows that in the array base palte horizontal drive circuit of the present embodiment offer, because drop-down control unit can be just Often the display stage controls the voltage of P node according to the first clock signal and second clock signal, and is lifted in this grade of drive signal The low level state of P node is kept when being raised to high level state, thus, it is able to maintain that circuit scans rank in touch-control using this programme Duan Shixu needs the stabilization of circuit key node during special variation.
In sum, the array base palte horizontal drive circuit of the present embodiment, has actual guidance in field of liquid crystal display Meaning.
Second embodiment
In order to meet the requirement of small size In Cell type touch-control display panels, in the present embodiment, array base palte row is driven Dynamic circuit is separately positioned on the both sides of viewing area, and one-level array base palte row drive module is correspondingly arranged per one-row pixels unit. For example, by the drive module setting of odd-numbered line in the left side of viewing area, the drive module setting of even number line is in viewing area Right side, and drive circuit integrally uses interleaved type of drive, the output of left and right odd-even alternation.
Fig. 4 is that the structure of N grades of drive module of array base palte horizontal drive circuit according to a second embodiment of the present invention is shown It is intended to.This programme is described in detail with reference to Fig. 4.
As shown in figure 4, N grades of drive module of the present embodiment array base palte horizontal drive circuit includes:Scan control unit 100th, node charhing unit 200, output holding unit 300, drop-down holding unit 400, the output of drop-down control unit 502, blank screen Control unit 601 and blank screen wake up output control unit 700.
Scan control unit 100, its forward and reverse scanning direction for being used to control circuit and transmission drive from front stage The level of module passes signal.Specifically, as shown in figure 4, scan control unit 201 uses N-2 grades of gate drive signal G (n-2) Or N+2 grades of gate drive signal G (n+2) passes signal as level, uses the first drive signal U2D or the second drive signal D2U Alternatively input signal.
The scan control unit 100 includes the first transistor NT1 and transistor seconds NT2, the first transistor NT1 Grid be connected with the first drive signal, the source electrode of the first transistor NT1 is connected with N-2 grades of gate drive signal;Institute The grid for stating transistor seconds NT2 is connected with the second drive signal, the source electrode and N+2 grades of grid of the transistor seconds NT2 Drive signal is connected.
When being scanned from the top down, U2D is set to high level, and D2U is set to low level, then in N-2 grades of grid In the presence of the high level of drive signal G (n-2), the output end output U2D's of the first transistor NT1 and transistor seconds NT2 High level signal, the control signal output of output to scan control unit 100 when the first clock signal CK (N) is high level End.
Similarly, when being scanned from bottom to top, D2U is set to high level, and U2D is set to low level, then at N+2 grades In the presence of the high level of gate drive signal G (n-2), the output end output of the first transistor NT1 and transistor seconds NT2 Scan control unit 100 is arrived in the high level signal of D2U, control signal output when the first clock signal CK (N) is high level Output end.
The control signal of output can be used for opening node charhing unit 200.Similarly, the low level signal of U2D or D2U can For closed node charhing unit 200.
Node charhing unit 200, the output end of its electrical connection scan control unit, for according to the scan control The level of unit output passes the signal transmission between signal control malleation constant voltage signal VGH and Q node, and thus Q nodes are pre-charged.
The node charhing unit 200 includes third transistor NT3, and the grid of the third transistor NT3 is swept with described The output end connection of control unit is retouched, the source electrode of the third transistor NT3 is connected with malleation constant voltage signal VGH, the described 3rd The drain electrode of transistor NT3 is connected with Q nodes.
After third transistor NT3 is opened, malleation constant voltage signal VGH to Q nodes are input into by third transistor NT3, Q is saved Point precharge.
Output holding unit 300, its electrical connection Q nodes, the first clock signal CK (N) and this grade of drive module output end, For controlling the signal transmission between the first clock signal CK (N) and this grade of drive module output end according to the voltage of Q nodes, by This exports this grade of drive signal during the effect of drive module.
The output holding unit 300 includes the 4th transistor NT4, the tenth two-transistor NT12 and the first electric capacity C1, institute The grid for stating the 4th transistor NT4 is connected with malleation constant voltage signal VGH, source electrode and the Q nodes of the 4th transistor NT4 Connection, the drain electrode of the 4th transistor NT4 is connected with the grid of the tenth two-transistor NT12;Tenth two-transistor The source electrode of NT12 is connected with the first clock signal CK (N), and the drain electrode of the tenth two-transistor NT12 is defeated with this grade of drive module Go out end connection.
Malleation constant voltage signal VGH is input into the 4th transistor NT4, to open the 4th transistor NT4.The first electric capacity C1's Under effect, the current potential of Q nodes is also increased, the grid potential of the tenth two-transistor NT12 also in lifting, it is ensured that the 12nd Transistor NT12 can stablize unlatching.First clock signal CK (N) is used to form this grade of drive signal Gn, realizes to one-row pixels The scanning of unit.
Drop-down holding unit 400, its electrical connection P node, negative pressure constant voltage signal VGL, Q node and this grade of drive module output End, for according between the voltage of P node control negative pressure constant voltage signal VGL and Q node and negative according to the control of the voltage of P node Signal transmission, the inaction period of drive module of being thus expert between pressure constant voltage signal VGL and this grade of row drive module output end Between maintain the low level state of Q nodes and this grade of circuit output end.
The drop-down holding unit 400 includes the tenth transistor NT10, the 11st transistor NT11 and the second electric capacity C2, institute The grid for stating the tenth transistor NT10 is connected with the P node, and source electrode and the Q nodes of the tenth transistor NT10 connect Connect, the drain electrode of the tenth transistor NT10 is connected with negative pressure constant voltage signal VGL;The grid of the 11st transistor NT11 with The P node connection, the source electrode of the 11st transistor NT11 is connected with described level drive module output end, and the described tenth The drain electrode of one transistor NT11 is connected with negative pressure constant voltage signal VGL;One end of the second electric capacity C2 is connected with the P node, The other end of the second electric capacity C2 is connected with the negative pressure constant voltage signal VGL.
Between the inaction period of drive module of being expert at, the second electric capacity C2 can maintain P node after the current potential of P node disappears Current potential, so that the tenth transistor NT10 and the 11st transistor NT11 conductings.Negative pressure constant voltage signal VGL is by the tenth transistor NT10 Output end down for the low level of stabilization, using the pulldown function of the tenth transistor NT10, the low electricity of stabilization is maintained in Q nodes It is flat.Using the pulldown function of the 11st transistor NT11, this grade of circuit output end maintains the low level of stabilization.
Drop-down control unit 502, the output end of its electrical connection scan control unit, the first clock signal CK (N), the Two clock signal CK (N+2), negative pressure constant voltage signal VGL, and Q nodes and P node, for showing the stage according to first normal Clock signal CK (N) and second clock signal CK (N+2) control the voltage of P node, and voltage to Q nodes and P node enters Row coordinated signals.
The drop-down control unit 502 includes the 5th transistor NT5, the 6th transistor NT6, the 7th transistor NT7, the 8th Transistor NT8, the 9th transistor NT9 and the 3rd electric capacity C3, the grid and source electrode of the 5th transistor NT5 are respectively with described One clock signal CK (N) is connected, and the drain electrode of the 5th transistor NT5 is connected with the grid of the 6th transistor NT6;It is described The source electrode of the 6th transistor NT6 is connected with second clock signal CK (N+2), the drain electrode of the 6th transistor NT6 and described The grid connection of seven transistor NT7;The source electrode of the 7th transistor NT7 is connected with the second clock signal CK (N+2), institute The drain electrode for stating the 7th transistor NT7 is connected with P node;The grid of the 8th transistor NT8 and the scan control unit Output end is connected, and the source electrode of the 8th transistor NT8 is connected with the drain electrode of the 5th transistor NT5, the 8th crystal The drain electrode of pipe NT8 is connected with negative pressure constant voltage signal VGL;The grid of the 9th transistor NT9 is connected with the Q nodes, described The source electrode of the 9th transistor NT9 is connected with the P node, and drain electrode and the negative pressure constant voltage signal VGL of the 9th transistor NT9 connect Connect;One end of the 3rd electric capacity C3 is connected with the drain electrode of the 5th transistor NT5, the other end of the 3rd electric capacity C3 with Negative pressure constant voltage signal VGL is connected.
The grid of the 9th transistor NT9 in existing drop-down control unit 500 is changed and is connected to Q nodes, realize Q nodes and P The coordinated signals of node potential, reduce interference and are beneficial to circuit stability.
Blank screen output control unit 601, its electrical connection first grid selection control signal GAS1, P node and this level row drive Dynamic model block output end, low level state and this grade of circuit output end for keeping P node in all drive module opening stages High level state, and eliminate first grid selection control signal GAS1 and negative pressure constant voltage signal VGL impedance mismatchs cause P node leaky.
The blank screen output control unit 601 includes the 14th transistor NT14, the 15th transistor NT15 and the 17th The grid of transistor NT17, the 14th transistor NT14 is connected with first grid selection control signal GAS1, and the described tenth The source electrode of four transistor NT14 is connected with the P node, drain electrode and the 17th crystal of the 14th transistor NT14 The source electrode connection of pipe NT17;The grid and source electrode of the 15th transistor NT15 are believed with first grid selection control respectively Number GAS1 connection, the drain electrode of the 15th transistor NT15 is connected with described level drive module output end;Described 17th The grid of transistor NT17 is connected with described level drive module output end, the drain electrode of the 17th transistor NT17 and negative pressure Constant voltage signal VGL is connected.
All drive module opening functions refer to when liquid crystal display panel blank screen, it usually needs realized in a period of time Make the operation that the grid of the whole pixel cells in viewing area is opened simultaneously to empty the residual electric potential on pixel electrode.First Grid selection control signal GAS1 remains high level, the 14th transistor NT14 and the 15th transistor NT15 during blank screen Open, in this grade of drive output output drive signal, i.e., lasting high level signal makes all horizontal scanning line signal standard-sized sheets.
Fig. 5 be in existing array base palte horizontal drive circuit in second embodiment of the invention this grade of drive signal with it is negative The emulation schematic diagram for pressing the saltus step of constant voltage signal to postpone, as illustrated, being scanned in touch-control in existing array base palte horizontal drive circuit This grade of drive signal of period differs with the saltus step delay degree of negative pressure constant voltage signal, and both postpone obvious mismatch, and negative pressure is permanent The delay of pressure signal can be much larger, directly results in the 14th transistor NT14 and is opened during touch-control is scanned, P point high potential wholes Leak to low, circuit malfunction.
In order to solve the above problems the 14th transistor NT14 and the tenth in existing blank screen output control unit 600 Seven transistor NT17 are connected, and the grid of the 17th transistor NT17 is controlled by this grade of drive module output end, eliminate former electricity Due to the 14th transistor caused by first grid selection control signal GAS1 and negative pressure constant voltage signal VGL impedance mismatchs in road NT14 opens the electric leakage of P points, and because the delay degree and negative pressure constant voltage signal VGL of this grade of drive signal are basically identical, the 17th is brilliant Body pipe NT17 is remained off during touch-control is scanned, and risk is eliminated.
Blank screen wakes up output control unit 700, and its electrical connection second grid selection control signal GAS2 and this level row drive Module output end, for controlling this grade of output of drive signal in touch screen sweep phase.
The blank screen wakes up output control unit 700 includes the 13rd transistor NT13, the 13rd transistor NT13 Grid and second grid selection control signal GAS2 be connected, the source electrode and negative pressure constant voltage signal of the 13rd transistor NT13 VGL is connected, and the drain electrode of the 13rd transistor NT13 is connected with described level drive module output end.
In touch-control sweep phase, the effect of touch-control scanning, the 13rd will be influenceed when the 11st transistor NT11 is unstable Transistor NT13 can be used to eliminate the unstable risk of grid output current potential.Specifically, during touch-control is scanned, the 13rd crystal Pipe NT13 can keep it turned in the presence of second grid selection control signal GAS2, and synchronous with the 11st transistor NT11 Output touch scanning signals, it is ensured that the stabilization of touch scanning signals during touch-control scanning.
It follows that in the array base palte horizontal drive circuit that provides of the present invention, because drop-down control unit can be according to the One clock signal and second clock signal control the voltage of P node, and voltage to Q nodes and P node carries out coordinated signals, Interference can be reduced beneficial to circuit stability, and blank screen output unit can eliminate first grid selection control signal and negative pressure is permanent Pressure signal impedance mismatches caused P node leaky.Thus, circuit can be eliminated using this programme and swept in normal non-touch-control Retouch the competitive risk of stage key node current potential presence.
Although disclosed herein implementation method as above, described content is only to facilitate understanding the present invention and adopting Implementation method, is not limited to the present invention.Any those skilled in the art to which this invention pertains, are not departing from this Under the premise of the disclosed spirit and scope of invention, any modification and change can be made in the formal and details implemented, but Scope of patent protection of the invention, must be still defined by the scope of which is defined in the appended claims.

Claims (10)

1. a kind of array base palte horizontal drive circuit, it is characterised in that including multiple drive power module, N grades of drive module includes:
Scan control unit, the level of its forward and reverse scanning direction for being used to control circuit and transmission from front stage drive module Pass signal;
Node charhing unit, the output end of its electrical connection scan control unit, for defeated according to the scan control unit The level for going out passes the signal transmission between signal control malleation constant voltage signal and Q nodes, and thus Q nodes are pre-charged;
Output holding unit, its electrical connection Q nodes, the first clock signal and this grade of drive module output end, for according to Q nodes The voltage signal transmission that controls between the first clock signal and this grade of drive module output end, thus in the effect of drive module Period exports this grade of drive signal;
Drop-down holding unit, its electrical connection P node, negative pressure constant voltage signal, Q nodes and this grade of drive module output end, for root According to P node voltage control negative pressure constant voltage signal and Q nodes between and according to the voltage of P node control negative pressure constant voltage signal with Signal transmission between this grade of row drive module output end, maintains Q nodes and sheet between the inaction period of drive module of being thus expert at The low level state of level circuit output end;
Drop-down control unit, the output end of its electrical connection scan control unit, the first clock signal, second clock signal, Negative pressure constant voltage signal and P node, and this grade of row drive module output end, for being believed according to the first clock in the normal display stage Number and second clock signal control the voltage of P node, and keep P node when this grade of drive signal is lifted to high level state Low level state;
Blank screen output control unit, its electrical connection first grid selection control signal, P node and this grade of row drive module output End, low level state and this grade of high level shape of circuit output end for keeping P node in all drive module opening stages State;
Blank screen wakes up output control unit, and its electrical connection second grid selects control signal and this grade of row drive module output end, For controlling this grade of output of drive signal in touch screen sweep phase.
2. circuit according to claim 1, it is characterised in that:
The output holding unit includes the 4th transistor, the tenth two-transistor and the first electric capacity, the grid of the 4th transistor Pole is connected with malleation constant voltage signal, and the source electrode of the 4th transistor is connected with the Q nodes, the drain electrode of the 4th transistor Grid with the tenth two-transistor is connected;The source electrode of the tenth two-transistor is connected with the first clock signal, and described The drain electrode of ten two-transistors is connected with this grade of drive module output end.
3. circuit according to claim 1, it is characterised in that:
The drop-down holding unit includes the tenth transistor, the 11st transistor and the second electric capacity, the grid of the tenth transistor Pole is connected with the P node, and the source electrode of the tenth transistor is connected with the Q nodes, the drain electrode of the tenth transistor with Negative pressure constant voltage signal is connected;The grid of the 11st transistor is connected with the P node, the source electrode of the 11st transistor It is connected with described level drive module output end, the drain electrode of the 11st transistor is connected with negative pressure constant voltage signal;Described One end of two electric capacity is connected with the P node, and the other end of second electric capacity is connected with the negative pressure constant voltage signal.
4. circuit according to claim 1, it is characterised in that:
The drop-down control unit includes the 5th transistor, the 6th transistor, the 7th transistor, the 8th transistor, the 9th crystal Pipe, the 16th transistor and the 3rd electric capacity, the grid and source electrode of the 5th transistor connect with first clock signal respectively Connect, the drain electrode of the 5th transistor is connected with the grid of the 6th transistor;The source electrode and second of the 6th transistor Clock signal is connected, and the drain electrode of the 6th transistor is connected with the grid of the 7th transistor;7th transistor Source electrode is connected with the second clock signal, and the drain electrode of the 7th transistor is connected with the P node;8th transistor Grid be connected with the output end of the scan control unit, the source electrode of the 8th transistor and the leakage of the 5th transistor Pole connects, and the drain electrode of the 8th transistor is connected with negative pressure constant voltage signal;The grid and the described 8th of the 9th transistor The grid connection of transistor, the source electrode of the 9th transistor be connected with the P node, the drain electrode of the 9th transistor with bear Pressure constant voltage signal connection;The grid of the 16th transistor is connected with described level drive module output end, and the described 16th The source electrode of transistor is connected with the P node, and the drain electrode of the 16th transistor is connected with negative pressure constant voltage signal;Described One end of three electric capacity is connected with the drain electrode of the 5th transistor, and the other end and the negative pressure constant voltage signal of the 3rd electric capacity connect Connect.
5. circuit according to claim 1, it is characterised in that:
The blank screen output control unit includes the 14th transistor and the 15th transistor, the grid of the 14th transistor It is connected with first grid selection control signal, the source electrode of the 14th transistor is connected with the P node, the described 14th is brilliant The drain electrode of body pipe is connected with negative pressure constant voltage signal;The grid and source electrode of the 15th transistor are selected with the first grid respectively Control signal connection is selected, the drain electrode of the 15th transistor is connected with described level drive module output end.
6. circuit according to claim 1, it is characterised in that:
The blank screen wakes up output control unit includes the 13rd transistor, the grid and second grid of the 13rd transistor Selection control signal connection, the source electrode of the 13rd transistor is connected with negative pressure constant voltage signal, the 13rd transistor Drain electrode is connected with described level drive module output end.
7. a kind of array base palte horizontal drive circuit, it is characterised in that including multiple drive power module, N grades of drive module includes:
Scan control unit, the level of its forward and reverse scanning direction for being used to control circuit and transmission from front stage drive module Pass signal;
Node charhing unit, the output end of its electrical connection scan control unit, for defeated according to the scan control unit The level for going out passes the signal transmission between signal control malleation constant voltage signal and Q nodes, and thus Q nodes are pre-charged;
Output holding unit, its electrical connection Q nodes, the first clock signal and this grade of drive module output end, for according to Q nodes The voltage signal transmission that controls between the first clock signal and this grade of drive module output end, thus in the effect of drive module Period exports this grade of drive signal;
Drop-down holding unit, its electrical connection P node, negative pressure constant voltage signal, Q nodes and this grade of drive module output end, for root According to P node voltage control negative pressure constant voltage signal and Q nodes between and according to the voltage of P node control negative pressure constant voltage signal with Signal transmission between this grade of row drive module output end, maintains Q nodes and sheet between the inaction period of drive module of being thus expert at The low level state of level circuit output end;
Drop-down control unit, the output end of its electrical connection scan control unit, the first clock signal, second clock signal, Negative pressure constant voltage signal, and Q nodes and P node, for being believed according to the first clock signal and second clock in the normal display stage The voltage of number control P node, and voltage to Q nodes and P node carries out coordinated signals;
Blank screen output control unit, its electrical connection first grid selection control signal, P node and this grade of row drive module output End, low level state and this grade of high level shape of circuit output end for keeping P node in all drive module opening stages State, and eliminate P node leaky caused by first grid selection control signal and negative pressure constant voltage signal impedance mismatch;
Blank screen wakes up output control unit, and its electrical connection second grid selects control signal and this grade of row drive module output end, For controlling this grade of output of drive signal in touch screen sweep phase.
8. circuit according to claim 7, it is characterised in that:
The drop-down control unit includes the 5th transistor, the 6th transistor, the 7th transistor, the 8th transistor, the 9th crystal Pipe and the 3rd electric capacity, the grid and source electrode of the 5th transistor are connected with first clock signal respectively, and the described 5th is brilliant The drain electrode of body pipe is connected with the grid of the 6th transistor;The source electrode of the 6th transistor is connected with second clock signal, The drain electrode of the 6th transistor is connected with the grid of the 7th transistor;The source electrode and described second of the 7th transistor Clock signal is connected, and the drain electrode of the 7th transistor is connected with P node;The grid of the 8th transistor and the scanning control The output end connection of unit processed, the source electrode of the 8th transistor is connected with the drain electrode of the 5th transistor, and the described 8th is brilliant The drain electrode of body pipe is connected with negative pressure constant voltage signal;The grid of the 9th transistor is connected with the Q nodes, the 9th crystal The source electrode of pipe is connected with the P node, and the drain electrode of the 9th transistor is connected with negative pressure constant voltage signal;3rd electric capacity One end is connected with the drain electrode of the 5th transistor, and the other end of the 3rd electric capacity is connected with negative pressure constant voltage signal.
9. circuit according to claim 7, it is characterised in that:
The blank screen output control unit includes the 14th transistor, the 15th transistor and the 17th transistor, the described tenth The grid of four transistors is connected with first grid selection control signal, and the source electrode of the 14th transistor connects with the P node Connect, the drain electrode of the 14th transistor is connected with the source electrode of the 17th transistor;The grid of the 15th transistor It is connected with first grid selection control signal respectively with source electrode, drain electrode and the described level of the 15th transistor drive Module output end is connected;The grid of the 17th transistor is connected with described level drive module output end, and the described 16th The drain electrode of transistor is connected with negative pressure constant voltage signal.
10. circuit according to claim 7, it is characterised in that:
The blank screen wakes up output control unit includes the 13rd transistor, the grid and second grid of the 13rd transistor Selection control signal connection, the source electrode of the 13rd transistor is connected with negative pressure constant voltage signal, the 13rd transistor Drain electrode is connected with described level drive module output end.
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Application publication date: 20170531