CN105226041A - A kind of power management chip packing forms - Google Patents
A kind of power management chip packing forms Download PDFInfo
- Publication number
- CN105226041A CN105226041A CN201510734517.8A CN201510734517A CN105226041A CN 105226041 A CN105226041 A CN 105226041A CN 201510734517 A CN201510734517 A CN 201510734517A CN 105226041 A CN105226041 A CN 105226041A
- Authority
- CN
- China
- Prior art keywords
- power management
- management chip
- tube core
- core module
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The present invention relates to a kind of power management chip packing forms, comprise tube core module, framework, frame pin, bonding wire, tube core module is fixed on framework by fixing glue, becomes plastic-sealed body eventually through shaping colloid overall package, tube core module can be power management drive circuit chip or triode, also or other circuit chip such as metal-oxide-semiconductor; Frame pin is horizontal to be applied to SMD automated production, the number of frame pin is less than or equal to 4, what the present invention was innovative passes through chip design art, the packing forms of rectifier bridge is used for the encapsulation of power management chip, belong to pioneering in industry, in the unaffected situation of the power of power management chip, not only reduce chip package volume, decrease pin, and power management chip can be used in automation paster and produce, extremely long-pending effect is played for the encapsulation of domestic and international power management chip and application.
Description
Technical field
The present invention relates to application-specific integrated circuit (ASIC), more specifically relate to a kind of power management chip packing forms.
Background technology
Now commercially used power management chip packing forms is the encapsulating structure such as SOP8, DIP8, TO-94, SOT23 mainly, SOP8, DIP8 encapsulating structure pin is all greater than 4, and single volume is large, take up room in the place that product space is limited greatly, the cost of encapsulation is high; TO-94 is direct insertion packing forms, can not mass automatic production, uses very inconvenience; Although SOT23 volume is little, power management chip power is restricted.
In view of the shortcoming of above packing forms, what the present invention was innovative passes through chip design art, the packing forms of rectifier bridge is used for the encapsulation of power management chip, belong to pioneering in industry, in the unaffected situation of the power of power management chip, not only reduce chip package volume, decrease pin, and power management chip can be used in automation paster and produce, extremely long-pending effect is played for the encapsulation of domestic and international power management chip and application.
Summary of the invention
The object of the invention is to: a kind of power management chip packing forms is provided, have that pin is many, cost is high, power is little or can not the problem of automated production to solve prior art power management chip.
The present invention is achieved through the following technical solutions: a kind of power management chip packing forms, comprises tube core module, framework, frame pin, bonding wire, and tube core module is fixed on framework by fixing glue, becomes plastic-sealed body eventually through shaping colloid overall package; It is characterized in that:
Described tube core module can be power management drive circuit chip or triode, also or other circuit chip such as metal-oxide-semiconductor;
Further, described tube core module optimization power supply management drive circuit chip.
Described frame pin is stretched out in plastic-sealed body;
Further, described frame pin is horizontal to be applied to SMD automated production.
The number of described frame pin is less than or equal to 4;
Further described pin number preferably 4;
The beneficial aspects that the present invention reaches is: the present invention is compared with other encapsulation mode of conventional power source managing chip, and number of pins obviously tails off, and has extraordinary cost performance, cheap cost advantage, high practical value, high reliability and high efficiency.
Accompanying drawing explanation
Fig. 1: structural representation of the present invention.
Fig. 2: frame pin of the present invention stretches out horizontal schematic diagram one in plastic-sealed body.
Fig. 3: frame pin of the present invention stretches out horizontal schematic diagram two in plastic-sealed body.
Fig. 4: frame pin of the present invention stretches out horizontal schematic diagram three in plastic-sealed body.
Embodiment
In conjunction with the accompanying drawings, the present invention is further detailed explanation.These accompanying drawings are the schematic diagram of simplification, only basic structure of the present invention are described in a schematic way, and therefore it only shows the formation relevant with the present invention.
Embodiment 1:
With reference to Fig. 1-4, a kind of power management chip packing forms, is characterized in that: comprise tube core module 11 ~ 12, framework 21 ~ 24, frame pin 31 ~ 34, bonding wire 41 ~ 46, tube core module 11 ~ 12 is fixed on framework 21 ~ 24 by fixing glue, becomes plastic-sealed body 5 eventually through shaping colloid overall package;
Described tube core module 11 is power management drive circuit chip;
Described tube core module 12 is triode;
Described frame pin 3 is stretched out from the both sides of plastic-sealed body 5 and is horizontal structure;
The number of described frame pin 3 equals 4.
Embodiment 2:
With reference to Fig. 1-4, a kind of power management chip packing forms, is characterized in that: comprise tube core module 11 ~ 12, framework 21 ~ 24, frame pin 31 ~ 34, bonding wire 41 ~ 46, tube core module 11 ~ 12 is fixed on framework 21 ~ 24 by fixing glue, becomes plastic-sealed body 5 eventually through shaping colloid overall package;
Described tube core module 11 ~ 12 is power management drive circuit chip;
Described frame pin 31 ~ 34 is stretched out from the both sides of plastic-sealed body 5 and is horizontal structure;
The number of described frame pin 31 ~ 34 equals 3.
Embodiment 3:
With reference to Fig. 1-4, a kind of power management chip packing forms, is characterized in that: comprise tube core module 11 ~ 12, framework 21 ~ 24, frame pin 31 ~ 34, bonding wire 41 ~ 46, tube core module 11 ~ 12 is fixed on framework 21 ~ 24 by fixing glue, becomes plastic-sealed body 5 eventually through shaping colloid overall package;
Described tube core module 11 is power management drive circuit chip;
Described frame pin 31 ~ 34 is stretched out from the both sides of plastic-sealed body 5 and is horizontal structure;
The number of described frame pin 31 ~ 34 equals 2.
Embodiment 4:
With reference to Fig. 1-4, a kind of power management chip packing forms, is characterized in that: comprise tube core module 11 ~ 12, framework 21 ~ 24, frame pin 31 ~ 34, bonding wire 41 ~ 46, tube core module 11 ~ 12 is fixed on framework 21 ~ 24 by fixing glue, becomes plastic-sealed body 5 eventually through shaping colloid overall package;
Described tube core module 11 is power management drive circuit chip;
Described tube core module 12 is triode;
Described frame pin 3 is stretched out from the exchange premium bottom surface, both sides of plastic-sealed body 5;
The number of described frame pin 3 equals 4.
Embodiment 5:
With reference to Fig. 1-4, a kind of power management chip packing forms, is characterized in that: comprise tube core module 11 ~ 12, framework 21 ~ 24, frame pin 31 ~ 34, bonding wire 41 ~ 46, tube core module 11 ~ 12 is fixed on framework 21 ~ 24 by fixing glue, becomes plastic-sealed body 5 eventually through shaping colloid overall package;
Described tube core module 11 ~ 12 is power management drive circuit chip;
Described frame pin 31 ~ 34 is stretched out from the exchange premium bottom surface, both sides of plastic-sealed body 5;
The number of described frame pin 31 ~ 34 equals 3.
Embodiment 6:
With reference to Fig. 1-4, a kind of power management chip packing forms, is characterized in that: comprise tube core module 11 ~ 12, framework 21 ~ 24, frame pin 31 ~ 34, bonding wire 41 ~ 46, tube core module 11 ~ 12 is fixed on framework 21 ~ 24 by fixing glue, becomes plastic-sealed body 5 eventually through shaping colloid overall package;
Described tube core module 11 is power management drive circuit chip;
Described frame pin 31 ~ 34 is stretched out from the exchange premium bottom surface, both sides of plastic-sealed body 5;
The number of described frame pin 31 ~ 34 equals 2.
With above-mentioned according to desirable embodiment of the present invention for enlightenment, by above-mentioned description, relevant staff in the scope not departing from this invention technological thought, can carry out various change and amendment completely.The technical scope of this invention is not limited to the content on specification, must determine its technical scope according to right.
Claims (3)
1. a power management chip packing forms, comprises tube core module, framework, frame pin, bonding wire, and tube core module is fixed on framework by fixing glue, becomes plastic-sealed body eventually through shaping colloid overall package; It is characterized in that: described tube core module includes power management drive circuit chip.
2. a kind of power management chip packing forms as claimed in claim 1, is characterized in that the number of described frame pin is less than or equal to 4.
3. a kind of power management chip packing forms as claimed in claim 1, it is characterized in that described frame pin be distributed in plastic-sealed body both sides and for horizontal structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510734517.8A CN105226041A (en) | 2015-11-03 | 2015-11-03 | A kind of power management chip packing forms |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510734517.8A CN105226041A (en) | 2015-11-03 | 2015-11-03 | A kind of power management chip packing forms |
Publications (1)
Publication Number | Publication Date |
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CN105226041A true CN105226041A (en) | 2016-01-06 |
Family
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Family Applications (1)
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CN201510734517.8A Pending CN105226041A (en) | 2015-11-03 | 2015-11-03 | A kind of power management chip packing forms |
Country Status (1)
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101859755A (en) * | 2010-05-14 | 2010-10-13 | 上海凯虹科技电子有限公司 | Power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) package body and package method thereof |
CN102569237A (en) * | 2010-12-14 | 2012-07-11 | 万国半导体股份有限公司 | Semiconductor chip package and assembly method thereof |
CN102903692A (en) * | 2011-07-26 | 2013-01-30 | 万国半导体股份有限公司 | Stacked power semiconductor device with double-layer lead frame and production method thereof |
CN104347568A (en) * | 2013-08-07 | 2015-02-11 | 万国半导体股份有限公司 | Multi-chip mixed packaging type semiconductor device and manufacturing method thereof |
-
2015
- 2015-11-03 CN CN201510734517.8A patent/CN105226041A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101859755A (en) * | 2010-05-14 | 2010-10-13 | 上海凯虹科技电子有限公司 | Power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) package body and package method thereof |
CN102569237A (en) * | 2010-12-14 | 2012-07-11 | 万国半导体股份有限公司 | Semiconductor chip package and assembly method thereof |
CN102903692A (en) * | 2011-07-26 | 2013-01-30 | 万国半导体股份有限公司 | Stacked power semiconductor device with double-layer lead frame and production method thereof |
CN104347568A (en) * | 2013-08-07 | 2015-02-11 | 万国半导体股份有限公司 | Multi-chip mixed packaging type semiconductor device and manufacturing method thereof |
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PB01 | Publication | ||
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WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20160106 |
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