CN105191205B - 用于亚稳态解决的循环式同步器电路 - Google Patents
用于亚稳态解决的循环式同步器电路 Download PDFInfo
- Publication number
- CN105191205B CN105191205B CN201480013914.XA CN201480013914A CN105191205B CN 105191205 B CN105191205 B CN 105191205B CN 201480013914 A CN201480013914 A CN 201480013914A CN 105191205 B CN105191205 B CN 105191205B
- Authority
- CN
- China
- Prior art keywords
- latch
- data
- input
- multiplexer
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
- H04L7/005—Correction by an elastic buffer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/755,056 US9509317B2 (en) | 2013-01-31 | 2013-01-31 | Rotational synchronizer circuit for metastablity resolution |
| US13/755,056 | 2013-01-31 | ||
| PCT/US2014/014114 WO2014121057A1 (en) | 2013-01-31 | 2014-01-31 | Rotational synchronizer circuit for metastablity resolution |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105191205A CN105191205A (zh) | 2015-12-23 |
| CN105191205B true CN105191205B (zh) | 2019-01-18 |
Family
ID=50102275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480013914.XA Active CN105191205B (zh) | 2013-01-31 | 2014-01-31 | 用于亚稳态解决的循环式同步器电路 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9509317B2 (enExample) |
| EP (1) | EP2951943B1 (enExample) |
| JP (1) | JP6397829B2 (enExample) |
| CN (1) | CN105191205B (enExample) |
| WO (1) | WO2014121057A1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10110232B2 (en) | 2015-06-30 | 2018-10-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multiplexer and latch system |
| CN105607689B (zh) * | 2015-12-22 | 2017-12-22 | 邓晨曦 | 高速多相时钟同步方法 |
| KR102501754B1 (ko) * | 2016-03-28 | 2023-02-20 | 삼성전자주식회사 | 불균형 멀티플렉서 및 이를 적용하는 스캔 플립플롭 |
| US9825636B1 (en) * | 2016-10-20 | 2017-11-21 | Arm Limited | Apparatus and method for reduced latency signal synchronization |
| US9793894B1 (en) * | 2016-11-18 | 2017-10-17 | Via Alliance Semiconductor Co., Ltd. | Data synchronizer for registering a data signal into a clock domain |
| CN107729614A (zh) * | 2017-09-18 | 2018-02-23 | 北京空间飞行器总体设计部 | 一种可扩展的通用功能级异步电路 |
| US11360704B2 (en) | 2018-12-21 | 2022-06-14 | Micron Technology, Inc. | Multiplexed signal development in a memory device |
| CN112800000B (zh) * | 2019-11-14 | 2023-07-18 | 海思光电子有限公司 | 一种电路以及电子设备 |
| US12154634B2 (en) * | 2022-02-18 | 2024-11-26 | Infineon Technologies LLC | Data path circuit and method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5598113A (en) * | 1995-01-19 | 1997-01-28 | Intel Corporation | Fully asynchronous interface with programmable metastability settling time synchronizer |
| US6137851A (en) * | 1998-02-13 | 2000-10-24 | Agilent Technologies | System and method for synchronizing a signal with respect to another signal |
| US6819156B1 (en) * | 2001-11-26 | 2004-11-16 | Xilinx, Inc. | High-speed differential flip-flop |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5045801A (en) | 1990-05-29 | 1991-09-03 | The United States Of America As Represented By The Secretary Of The Air Force | Metastable tolerant asynchronous interface |
| JPH07131302A (ja) * | 1993-11-08 | 1995-05-19 | Nec Corp | レジスタ回路 |
| JP3696077B2 (ja) * | 2000-11-13 | 2005-09-14 | シャープ株式会社 | 電圧変換回路及びこれを備えた半導体集積回路装置 |
| JP2002325041A (ja) * | 2001-04-25 | 2002-11-08 | Nec Corp | デコード回路及び符号変換回路と方法 |
| JP4339145B2 (ja) * | 2004-02-18 | 2009-10-07 | 旭化成エレクトロニクス株式会社 | 同期化回路 |
| US7656745B2 (en) * | 2007-03-15 | 2010-02-02 | Micron Technology, Inc. | Circuit, system and method for controlling read latency |
| DE102007059554A1 (de) | 2007-12-11 | 2009-06-25 | Robert Bosch Gmbh | Verfahren zur Ermittlung der Taktrate eines von einem Teilnehmer eines Kommunikationssystems empfangenen Datensignals, aktiver Sternkoppler zur Ausführung des Verfahrens und Kommunikationssystem mit einem solchen aktiven Sternkoppler |
-
2013
- 2013-01-31 US US13/755,056 patent/US9509317B2/en active Active
-
2014
- 2014-01-31 JP JP2015556166A patent/JP6397829B2/ja active Active
- 2014-01-31 WO PCT/US2014/014114 patent/WO2014121057A1/en not_active Ceased
- 2014-01-31 EP EP14704509.0A patent/EP2951943B1/en active Active
- 2014-01-31 CN CN201480013914.XA patent/CN105191205B/zh active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5598113A (en) * | 1995-01-19 | 1997-01-28 | Intel Corporation | Fully asynchronous interface with programmable metastability settling time synchronizer |
| US6137851A (en) * | 1998-02-13 | 2000-10-24 | Agilent Technologies | System and method for synchronizing a signal with respect to another signal |
| US6819156B1 (en) * | 2001-11-26 | 2004-11-16 | Xilinx, Inc. | High-speed differential flip-flop |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2951943B1 (en) | 2022-09-07 |
| EP2951943A1 (en) | 2015-12-09 |
| JP2016509810A (ja) | 2016-03-31 |
| JP6397829B2 (ja) | 2018-09-26 |
| US9509317B2 (en) | 2016-11-29 |
| US20140210526A1 (en) | 2014-07-31 |
| WO2014121057A1 (en) | 2014-08-07 |
| CN105191205A (zh) | 2015-12-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |