CN105186478B - Transient Voltage Suppressor - Google Patents
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- CN105186478B CN105186478B CN201510516444.5A CN201510516444A CN105186478B CN 105186478 B CN105186478 B CN 105186478B CN 201510516444 A CN201510516444 A CN 201510516444A CN 105186478 B CN105186478 B CN 105186478B
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Abstract
Disclose Transient Voltage Suppressor.The Transient Voltage Suppressor has signal end and earth terminal, including：The capacitive diode assembly and the first Zener diode being serially connected, wherein, capacitive diode assembly is included in the first diode and the second diode for being formed in same semiconductor chip and being connected in antiparallel in the semiconductor chip.The Transient Voltage Suppressor uses capacitive diode assembly as non-polar capacity cell, so as to improve the transient response speed of Transient Voltage Suppressor.
Description
Technical field
The present invention relates to microelectronics technology, more particularly, to Transient Voltage Suppressor.
Background technology
Transient Voltage Suppressor TVS (Transient Voltage Suppressor) develops on the basis of voltage-stabiliser tube
High-effect circuit brake.The profile of TVS diode is no different with common voltage-stabiliser tube, however, due to special structure and technique
Design, the transient response speed and surge absoption ability of TVS diode are far above common voltage-stabiliser tube.For example, the sound of TVS diode
It is only 10 between seasonable-12Second, and up to thousands of watts of surge power can be absorbed.Under the conditions of applied in reverse, when bearing one
During the big pulse of high-energy, the working impedance of TVS diode can quickly be down to extremely low conduction value, so as to allow high current to lead to
Cross, meanwhile, by voltage clamp in predeterminated level.Therefore, TVS diode can effectively protect accurate first device in electronic circuit
Damage of the part from various surge pulses.
The manufacturing process of traditional TVS diode is fairly simple, usually by special shaped doped on P+ substrates/N+ substrates
Directly form PN junction.The response speed of TVS diode and its electric capacity are closely related.Traditional TVS diode is mainly used in disappearing
Take the data terminal in electronic product, such as keyboard, side switch and power line.Because such terminal speed is slower, to the poles of TVS bis-
The transient response speed of pipe is less demanding, and electric capacity is typically in more than 20pF.However, video data line has high data transfer
Rate (its data transmission rate is up to 480M, and some video data transmission rates reach more than 1G).Therefore, for the guarantor of video line
Shield, the transient response speed of traditional TVS diode cannot meet requirement.In transmission of video, the electricity of TVS diode
Hold and require to be less than 1.0pF.
In Application No. CN201420858051.3 Chinese patent application, one kind is disclosed by three discrete device collection
Into the TVS device formed on a single die.As shown in figure 1, the TVS device includes the first diode D1, the second diode D2
With Zener diode ZD, wherein the first diode D1 and Zener diode ZD differential concatenations.First diode D1 and the pole of Zener two
The anode of pipe connects signal end I/O respectively and earth terminal GND, the second diode D2 anode and negative electrode connect signal end I/ respectively
O and earth terminal GND.When surge occurs, if positive voltage is born between signal end I/O and earth terminal, and positive voltage
Numerical value is higher than Zener diode ZD breakdown voltage, then produces along the forward direction of the first diode and the reverse flow of Zener diode
Dynamic electric current, so as to play a part of ESD protection.If negative voltage, only second are born between signal end I/O and earth terminal
Diode D2 forward conductions.
It is unidirectional device in the TVS device shown in Fig. 1, wherein, common commutation diode is as the additional of small capacitances value
Electric capacity, connected with Zener diode.The capacitance of the TVS device is by the capacitance depending on additional capacitor.The TVS device includes
The multiple discrete devices integrated in a chip, so as to significantly reduce packaging cost, but manufacture craft is relative complex.
On the premise of process complexity and cost is not considered, it is possible to achieve the low unidirectional ESD protection function of electric capacity.However, the TVS device
Include the current path of two opposite directions, so as to which bilateral device can not be directly used as.Further, since ghost effect and radiating are not
Good, the TVS device also is difficult to reach higher transient power.
Therefore, it is desirable to develop new TVS device, while transient response speed is improved, take into account it is unidirectional and it is two-way should
With requiring, process complexity and cost are reduced, and high protection voltage is provided.
The content of the invention
The technical problem to be solved in the present invention is to provide one kind can use capacitive diode assembly to improve transient response speed
The unidirectional or two-way TVS device of degree.
According to the present invention, there is provided a kind of Transient Voltage Suppressor, the Transient Voltage Suppressor have signal end and ground connection
End, including：The capacitive diode assembly and the first Zener diode being serially connected, wherein, capacitive diode assembly includes
Formed in same semiconductor chip and the first diode for being connected in antiparallel and the two or two pole in the semiconductor chip
Pipe.
Preferably, the Transient Voltage Suppressor also includes：Second Zener diode, with the capacitive diode assembly and
First Zener diode is connected in series.
Preferably, the two-way rectifier is as non-polar electric capacity.
Preferably, capacitive diode assembly has first end and the second end, the second end and first of capacitive diode assembly
The negative electrode connection of Zener diode, also, signal end of the first end of capacitive diode assembly as Transient Voltage Suppressor, the
Earth terminal of the anode of Zener diode as Transient Voltage Suppressor.
Preferably, capacitive diode assembly has first end and the second end, the second end and first of capacitive diode assembly
The anode connection of Zener diode, also, signal end of the negative electrode of the first Zener diode as Transient Voltage Suppressor, capacitive
Earth terminal of the first end of diode assembly as Transient Voltage Suppressor.
Preferably, capacitive diode assembly has first end and the second end, the first end of capacitive diode assembly and first
The negative electrode connection of Zener diode, the second end is connected with the anode of the second Zener diode, also, the sun of the first Zener diode
Signal end of the pole as Transient Voltage Suppressor, the earth terminal of the negative electrode of the second Zener diode as Transient Voltage Suppressor.
Preferably, capacitive diode assembly has first end and the second end, the second end and first of capacitive diode assembly
The negative electrode connection of Zener diode, the anode of the first Zener diode is connected with the negative electrode of the second Zener diode, also, capacitive
The first end of diode assembly is as one of the signal end of Transient Voltage Suppressor and earth terminal, the anode of the second Zener diode
As another in the signal end and earth terminal of Transient Voltage Suppressor.
Preferably, capacitive diode assembly has first end and the second end, the second end and first of capacitive diode assembly
The anode connection of Zener diode, the negative electrode of the first Zener diode is connected with the anode of the second Zener diode, also, capacitive
The first end of diode assembly is as one of the signal end of Transient Voltage Suppressor and earth terminal, the negative electrode of the second Zener diode
As another in the signal end and earth terminal of Transient Voltage Suppressor.
Preferably, the capacitive diode assembly includes：The Semiconductor substrate of first conduction type；Positioned at Semiconductor substrate
On the second conduction type epitaxial layer, the second conduction type is different from the first conduction type；The isolated area of first conduction type,
Extended to from the surface of epitaxial layer through epitaxial layer in Semiconductor substrate, so as to limit the first of the first diode in the epitaxial layer
Second active area of active area and the second diode, and the first active area and the second active area are spaced apart；First is conductive
First doped region of type, is extended in epitaxial layer in the first active area from epi-layer surface；The second of second conduction type is mixed
Miscellaneous area, extended in the second active area from epi-layer surface in epitaxial layer；And interconnection structure, isolated area and epitaxial layer are located at
The part of first active area is electrically connected to each other.
Preferably, the interconnection structure includes the first interconnecting line.
Preferably, the capacitive diode assembly also includes：Insulating barrier on epitaxial layer；And second interconnection draw
Line, electrically connected with the first doped region and with the second doped region, wherein, first interconnecting line and second interconnecting line point
Chuan Guo not the respective doped region of insulating barrier arrival.
Preferably, the interconnection structure also includes the 3rd doped region of the second conduction type, is extended to from epi-layer surface
In epitaxial layer, first interconnecting line contacts with isolated area and the 3rd doped region.
Preferably, isolated area includes the peripheral part around the first active area and the second active area, and active by first
The center section that area and the second active area are spaced apart, the 3rd doped region divide it across the first active area and the periphery of isolated area
Between interface.
Preferably, the 3rd doped region surrounds the first doped region.
Preferably, the PN junction of the first diode, Semiconductor substrate and epitaxial layer are formed between the first doped region and epitaxial layer
Between form the PN junction of the second diode.
Preferably, the first diode and the second diode are connected using Semiconductor substrate and the second interconnecting line reverse parallel connection
Connect.
Preferably, the first conduction type is one of N-type and p-type, and the second conduction type is another in N-type and p-type.
Transient Voltage Suppressor according to an embodiment of the invention is using capacitive diode assembly as non-polar electric capacity.
The capacitive diode assembly includes the first diode and the second diode of reverse parallel connection, in the two directions with almost identical
Forward characteristic.The ultra-low capacitance capacitive diode assembly can be achieved on the chip area of very little, drastically increase
The applicability of semiconductor devices integration packaging, device architecture is set to be applied to a variety of different packing forms.Due to Semiconductor substrate
Drawn directly as another electrode, can reduce by 1 bonding gold wire in encapsulation, cost of manufacture can be greatly reduced,
Be advantageous to industrialization.The present invention i.e. provide it is such a can batch making ultra-low capacitance biphase rectification construction module.In addition,
The preparation method of the product is mutually compatible with the bipolar process of standard.
Only can be on the voltage of former TVS device when the ultra-low capacitance capacitive diode assembly is connected with any TVS device
Increase 0.7V conduction voltage drop, hardly change the electrology characteristic of former TVS device.For example, by the pole of ultra-low capacitance capacitive two
Tube assembly and a forward voltage 0.8V, breakdown reverse voltage 20V, electric capacity are 20pF unidirectional TVS device Series Package one
In individual shell, a forward voltage 1.5V, breakdown reverse voltage 20.7V will be obtained, and electric capacity only has the ultra-low capacitance less than 1pF
TVS device.
The capacitive diode assembly just always bears transient power by diode.When surge occurs, positive two poles
Pipe will be with less than 10-12The speed moment of second opens, and passes through surge current while producing a minimum pressure drop, protects
Demonstrate,prove itself to be not damaged by, continue to keep the effect for reducing electric capacity.
Because capacitive diode assembly has ultralow capacitance, it is thus possible to improve the response speed of TVS device, pole
The big application for having widened all kinds of devices.For example, some traditional TVS protection devices and the pole of ultra-low capacitance capacitive two
After tube assembly combination, electric capacity is greatly reduced, and can also be applied in the data transmission network of high frequency.
In Transient Voltage Suppressor, if capacitive diode assembly and Zener diode are formed in different semiconductor cores
On piece, then the manufacturing process of the two can more neatly be separately optimized so that capacitive diode assembly provide low capacitance with
The transient response speed of TVS device is improved, Zener diode provides high-breakdown-voltage to obtain required protection voltage level.
Formed respectively after capacitive diode assembly and Zener diode, using both bonding line connections, and be encapsulated in a shell
It is interior.
Brief description of the drawings
By the description to the embodiment of the present invention referring to the drawings, above-mentioned and other purpose of the invention, feature and
Advantage will be apparent from, in the accompanying drawings：
Fig. 1 shows the circuit diagram of the Transient Voltage Suppressor according to prior art；
Fig. 2 shows the circuit diagram of Transient Voltage Suppressor according to a first embodiment of the present invention；
Fig. 3 shows the circuit diagram of Transient Voltage Suppressor according to a second embodiment of the present invention；
Fig. 4 shows a kind of structural representation of the capacitive diode assembly used in Transient Voltage Suppressor；
Fig. 5 shows the structural representation of another capacitive diode assembly used in Transient Voltage Suppressor；And
Fig. 6 a to 6g show the sectional view in the manufacture method of capacitive diode assembly shown in Fig. 5 each stage.
Embodiment
The present invention is more fully described hereinafter with reference to accompanying drawing.In various figures, identical element is using similar attached
Icon is remembered to represent.For the sake of clarity, the various pieces in accompanying drawing are not necessarily to scale.Furthermore, it is possible to it is not shown some
Known part.
It should be appreciated that when describing some structure, it is referred to as when by one layer, a region positioned at another layer, another region
When " above " or " top ", can refer to above another layer, another region, or its with another layer, another
Other layers or region are also included between region.Also, if the structure overturn, this layer, a region will be located at it is another
Layer, another region " following " or " lower section ".If in order to describe located immediately at another layer, another region above scenario,
The form of presentation of " A is directly on B " or " A is on B and abuts therewith " will be used herein.
In addition, the first conduction type and the second conduction type are referred to when describing the conduction type of semi-conducting material, wherein
First conduction type is one of p-type and N-type, and the second conduction type is another in p-type and N-type.
The present invention can be presented in a variety of manners, some of examples explained below.
Fig. 2 shows the circuit diagram of Transient Voltage Suppressor (i.e. TVS device) according to a first embodiment of the present invention.Should
TVS device is unidirectional TVS device, including the capacitive diode assembly and Zener diode ZD being serially connected.The pole of capacitive two
Signal end I/O of the first end of tube assembly as TVS device, the second end is connected with Zener diode ZD negative electrode.Zener two
Earth terminal GND of the pole pipe ZD anode as TVS device.Capacitive diode assembly include it is reversely with each other be connected in parallel the one or two
Pole pipe D1 and the second diode D2.
Different from the prior art shown in Fig. 1, the first diode D1 and the second diode D2 are connected in antiparallel, and are formed and held
Property diode assembly.In capacitive diode assembly, the first diode D1 anode and the second diode D2 negative electrode connect jointly
It is connected to the first end of capacitive diode assembly, the first diode D1 negative electrode and the second diode D2 anode are commonly connected to hold
Second end of property diode assembly.Capacitive diode assembly utilizes the low pressure drop of diode forward and the characteristic of low on-resistance,
So as to realize the electrical characteristics of ultra-low capacitance biphase rectification.
In the TVS device shown in Fig. 2, capacitive diode assembly is connected in series with Zener diode ZD.Due to capacitive two
Pole pipe component has almost identical forward characteristic in the two directions, and therefore, the capacitive diode assembly can be used as electrodeless
The electric capacity of property., can be by any one of the first end of capacitive diode assembly and the second end and the pole of Zener two in TVS device
Pipe ZD negative electrode is connected.As described below, the non-polar properties of capacitive diode assembly are favourable, not only it is compatible unidirectionally and
Two-way TVS device, and manufacturing process can be simplified.
In unidirectional TVS device, capacitive diode assembly only increases 0.7V conduction voltage drop, hardly changes former TVS
The electrology characteristic of device.For example, it is by capacitive diode assembly and a forward voltage 0.8V, breakdown reverse voltage 20V, electric capacity
During 20pF Zener diode series connection, a forward voltage 1.5V, breakdown reverse voltage 20.7V will be obtained, and electric capacity is only not
To 1pF ultra-low capacitance TVS device.
When surge occurs, if bearing positive voltage between signal end I/O and earth terminal GND, the first diode D1
Conducting, Zener diode ZD bear backward voltage.If the numerical value of positive voltage is higher than Zener diode ZD breakdown voltage, produce
The electric current of raw forward direction and the reverse flow of Zener diode along the first diode, so as to play a part of unidirectional ESD protection.
In the circuit diagram shown in Fig. 2, capacitive diode assembly is connected in series with Zener diode ZD.In reality
In product, capacitive diode assembly and Zener diode ZD can be integrated on same semiconductor chip, or shape respectively
Into on different semiconductor chips to form single device, as long as according to shown in Fig. 2 connection the two.
If capacitive diode assembly and Zener diode ZD are formed on different semiconductor chips, can be cleverer
The manufacturing process of the two is separately optimized livingly so that capacitive diode assembly provides low capacitance to improve the transient state of TVS device
Response speed, Zener diode provide high-breakdown-voltage to obtain required protection voltage level.The pole of capacitive two is being formed respectively
After tube assembly and Zener diode ZD, can use bonding line connection the two, and be encapsulated in a shell.
In the embodiment shown in Figure 2, the negative electrode of the second end of capacitive diode assembly and Zener diode connects.For
In the embodiment in generation, because capacitive diode assembly is nonpolarity, the second end of capacitive diode assembly can be with Zener diode
Anode connection.In the alternative embodiment, the signal end I/O of the negative electrode of Zener diode as Transient Voltage Suppressor,
Earth terminal GND of the first end of capacitive diode assembly as Transient Voltage Suppressor.
Fig. 4 shows a kind of structural representation of the capacitive diode assembly used in Transient Voltage Suppressor.The capacitive
Diode assembly includes the diode of two reverse parallel connections formed on a semiconductor substrate.
As shown in figure 4, N-type epitaxial layer 103 is formed in P++ types Semiconductor substrate 101.The thickness of epitaxial layer 103 is for example
More than 2 μm.P+ type isolated area 104 is extended in Semiconductor substrate 101 from the surface of epitaxial layer 103 through epitaxial layer 103, so as to
The first active area of the first diode and the second active area of the second diode are limited in epitaxial layer 103.Isolated area 104 is by
One active area and the second active area are spaced apart.Correspondingly, isolated area 104 is included around the first active area and the second active area
Peripheral part, and the center section that the first active area and the second active area are spaced apart.
P++ types doped region 110 is located at the first active area, is extended to from the surface of epitaxial layer 103 in epitaxial layer 103.For example, mix
The doping concentration in miscellaneous area 110 is more than 1.0 × 1018cm-3.N++ doped regions 111 are located at the second active area, from the table of epitaxial layer 103
Face is extended in epitaxial layer 103.For example, the doping concentration of doped region 111 is more than 8.0 × 1019cm-3。
Insulating barrier 120 is located at the top of epitaxial layer 103.First interconnecting line 107 and the second interconnecting line 108 are for example by same
Individual metal level is formed.First interconnecting line 107 reaches epitaxial layer 103 and the top surface of isolated area 104 through insulating barrier 120,
So as to which the two be electrically connected to each other.Second interconnecting line 108 reaches the top table of doped region 110 and 111 through insulating barrier 120
Face, so as to which the two be electrically connected to each other.Second interconnecting line 108 is additionally operable to the electrical connection between external circuit, such as conduct
Signal end I/O.
In the capacitive diode assembly of the embodiment, using interconnecting line 107 by epitaxial layer 103 and isolated area 104 that
This short circuit so that the current path between doped region 110, epitaxial layer 103, isolated area 104 and Semiconductor substrate 101 is (in such as figure
Shown in dotted arrow) on only exist a PN junction.Thus, the PN of the first diode is formed between doped region 110 and epitaxial layer 103
Knot, the PN junction of the second diode is formed between Semiconductor substrate 101 and epitaxial layer 103, so as to realize respectively the first diode and
The basic structure of second diode.
Metal layer on back 160 is formed at the back side of Semiconductor substrate 101, as earth terminal GND.First diode and second
Diode is connected in antiparallel using the interconnecting line 108 of Semiconductor substrate 101 and second.
The capacitive diode assembly includes the first diode and the second diode of reverse parallel connection, utilizes diode forward
The characteristic of low pressure drop and low on-resistance realizes the electrical characteristics of ultra-low capacitance biphase rectification.The capacitive diode assembly can conduct
Non-polar electric capacity is used for unidirectional or two-way TVS device.
Fig. 5 shows the structural representation of another capacitive diode assembly used in Transient Voltage Suppressor.According to
The capacitive diode assembly of second embodiment, in addition to N++ types doped region 112.
Doped region 112 is extended in epitaxial layer 103 from the surface of epitaxial layer 103.Preferably, doped region 112 has across first
Interface between the peripheral part of source region and isolated area 104, as shown in Figure 5.However, this is not required.Alternatively, doped region
112 can be located near interface, or separate certain distance with interface.First lead 107 and isolated area 104 and doped region
112 contacts, so as to which the two be electrically connected to each other.Doped region 111 and 112 can be formed simultaneously, and can be mixed with identical
Miscellaneous concentration and depth.For example, the doping concentration of doped region 111 and 112 is more than 8.0 × 1019cm-3。
In the capacitive diode assembly of the embodiment, using interconnecting line 107 by doped region 112 and isolated area 104 that
This short circuit so that the electric current road between doped region 110, epitaxial layer 103, doped region 112, isolated area 104 and Semiconductor substrate 101
Footpath only exists a PN junction on (as indicated by a dashed arrow in the figure).Thus, form first between doped region 110 and epitaxial layer 103
The PN junction of diode, the PN junction of the second diode is formed between Semiconductor substrate 101 and epitaxial layer 103, so as to realize the respectively
The basic structure of one diode and the second diode.
Metal layer on back 160 is formed at the back side of Semiconductor substrate 101, as earth terminal GND.First diode and second
Diode is connected in antiparallel using the interconnecting line 108 of Semiconductor substrate 101 and second.
In this embodiment, because doped region 112 relative to epitaxial layer 103 is highly doped regions, therefore can be reduced
The contact resistance of one lead 107.
Further, doped region 112 surrounds doped region 110, stops ring structure so as to provide voltage for the first diode,
Ensure the first diode and the second diode still ensured that when bearing sufficiently high reverse bias voltage its diode characteristic not by
To damage, so as to maintain ESD protection performance.
According to other aspects of the capacitive diode assembly of second embodiment and the capacitive diode according to first embodiment
Component is identical, will not be described in detail herein.
Fig. 6 a to 6g show the sectional view in the manufacture method of capacitive diode assembly shown in Fig. 5 each stage.Below
In description, the conduction type by description semi-conducting material is specially one of p-type and N-type.Partly led it is appreciated that if reversion is each
The conduction type of body material, it is also possible to obtain the semiconductor devices of identical function.
As shown in Figure 6 a, N-type epitaxial layer 103 and insulating barrier 120 are sequentially formed in P++ types Semiconductor substrate 101.
Semiconductor substrate 101 is, for example, monocrystalline substrate, and N-type epitaxy layer 103 is, for example, silicon epitaxy layer, and is respectively adopted
Suitable dopant is doping to desired conduction type., can be in semiconductor in order to form p-type or n type semiconductor layer or region
The dopant of respective type is mixed in layer and region.For example, P-type dopant includes boron, N type dopant includes phosphorus or arsenic.At this
In embodiment, Semiconductor substrate 101 is that doping concentration is 1019cm-3The heavy doping P++ substrates of magnitude, its resistivity are about
0.004~0.006 Ω cm.
Epitaxial layer 103 can use known depositing operation to be formed.For example, depositing operation can be selected from electron beam evaporation
(EBM), one kind in chemical vapor deposition (CVD), ald (ALD), sputtering.In this embodiment, epitaxial layer 103 is
N- epitaxial layers are lightly doped, its resistivity is not less than 5.5 Ω cm, and thickness is not less than 5.5 μm.
Insulating barrier 120 can use sputtering or thermal oxide to be formed.For example, insulating barrier 120 is the silica that thermal oxide is formed
Layer, in follow-up doping step, insulating barrier 120 is used as protective layer, and using as the interlayer insulating film of resulting devices.
Then, the isolated area 104 of P+ type is made in the epitaxial layer, as shown in Figure 6 b.The isolated area 104 limits two two poles
The active area of pipe, and the active area of two diodes is isolated from each other.In this embodiment, isolated area 104 is, for example, B30Breast
The doping concentration that glue source technique makes is 4.0 × 1019cm-3P++ isolated areas.Isolated area 104 is formed in epitaxial layer 103 simultaneously
Extend to Semiconductor substrate 101.The isolated area will be connected with Semiconductor substrate 101 draws from the back side.Isolated area concentration is by shadow
The conducting resistance of rectifying device is rung, those skilled in the art can control isolated area concentration, but too low isolation according to device requirement
Area's concentration restricts the current capacity of rectifying device by serious, therefore should control not less than 1019cm-3The order of magnitude.
Then, the doped region 110 of P++ types is made in the active area of the first diode, as fig. 6 c.In the embodiment
In, doped region 110 is that the concentration that latex source diffuses to form is 1.0 × 1018~9.9 × 1019cm-3Heavily doped region.This area
Technical staff can form the doped region 110 according to actual processing condition using ion implanting or other method of diffusion.It is described to mix
The miscellaneous concentration of area 110 should be not less than the doping concentration of the epitaxial layer 103.
Then, N++ doped regions 111, and the active area system in the first diode are made in the active area of the second diode
Make N++ doped regions 112, as shown in fig 6d.The doped region 112 is between the first active area and the peripheral part of isolated area
Interface.Preferably, doped region 112 is also about doped region 110, stops ring so as to form voltage.In this embodiment, doped region
112 be that the concentration that phosphoric diffusion technology makes is about 8.0 × 1019cm-3~2.0 × 1020cm-3N++ doped regions.
It will be appreciated by those skilled in the art that the position of each doped region, size and doping concentration can be rationally designed to control
The electric capacity of rectifying tube processed, obtain satisfactory ultra-low capacitance capacitive diode assembly.
The lead electrode hole on insulating oxide is then turned on, as shown in fig 6e.It should be noted that the lead electrode
Hole must retain a contact window that can expose doped region 112 and isolated area 104 simultaneously.
Then, interconnection structure is made, as shown in Figure 6 f.Interconnection structure is located in N-type epitaxy layer 103, including interconnecting line
107 and 108.In this embodiment, it is used as interconnecting line using metallic aluminium.Interconnecting line 107, which would span across isolated area and first, to be had
The doped region 112 of the N-type at interface and the coupled short circuit electrical connection of isolated area 104 between source region.Another interconnecting line 108 will
The doped region 110 for being produced on the first active area and the doped region 111 for being produced on the second active area electrically connect, and can be brought out making
For signal end I/O.
Then, by chip thinning and back face metalization, as shown in figure 6g.The back side is formed at the back side of Semiconductor substrate 101
Metal level 160, as earth terminal GND.
In this embodiment, it is used as metal layer on back 106 using gold.Those skilled in the art can select according to packing forms
Different metal or metal alloy is as metal layer on back, such as gold, silver, copper, titanium silver, titanium nickel gold.
It should be noted that P+ or P++ represents p-type heavy doping in the above-described example, N+ or N++ represent N-type heavy doping, N-
Represent that N-type is lightly doped.Here, heavy doping and to be lightly doped be relative concept, represents that the doping concentration of heavy doping is more than and is lightly doped
Doping concentration, and not restriction to specific doping concentration scope.
As can be seen that according to the device of the present invention, ultra-low capacitance capacitive diode group can be prepared with simple step
Part.Contacted by the way that P+ isolated areas 104 are extended to P++ Semiconductor substrates 101, using P++ Semiconductor substrates 101 as earth terminal
GND, without earth terminal is drawn from front.So not only contribute to reduce chip size, moreover it is possible to be applied to device architecture
A variety of different packing forms.In addition, P++ Semiconductor substrates 101 are drawn directly as ground connection GND electrodes, can in encapsulation
To reduce by 1 bonding gold wire, cost of manufacture can be greatly reduced, beneficial to industrialization.The ultralow electricity made according to the present invention
Hold capacitive diode assembly according to different use environments, can free definition signal end I/O and earth terminal GND.
If capacitive diode assembly is formed on a semiconductor chip, as single device, then this need to be only used
The Zener diode tandem compound for inventing the ultra-low capacitance capacitive diode assembly provided and a traditional handicraft making encapsulates, i.e.,
A ultra-low capacitance Zener diode is can obtain, the diode, which will be provided with the Zener diode that the traditional handicraft makes, to be possessed
Almost all electrology characteristic, while obtain ultralow capacitance.
In the above description, known structural element and step are not described in detail.But this area
It will be appreciated by the skilled person that can be by various technological means, to realize corresponding structural element and step.In addition, for shape
Into identical structural element, those skilled in the art can be devised by and process as described above not fully identical side
Method.In addition, although respectively describing each embodiment more than, but it is not intended that the measure in each embodiment can not have
It is used in combination sharply.
Embodiments of the invention are described above.But the purpose that these embodiments are merely to illustrate that, and
It is not intended to limit the scope of the present invention.The scope of the present invention is limited by appended claims and its equivalent.This hair is not departed from
Bright scope, those skilled in the art can make a variety of alternatives and modifications, and these alternatives and modifications should all fall the present invention's
Within the scope of.
Claims (16)
1. a kind of Transient Voltage Suppressor, the Transient Voltage Suppressor has signal end and earth terminal, including：
The capacitive diode assembly and the first Zener diode being serially connected,
The capacitive diode assembly includes：
The Semiconductor substrate of first conduction type；
The epitaxial layer of the second conduction type in Semiconductor substrate, the second conduction type are different from the first conduction type；
The isolated area of first conduction type, extended to from the surface of epitaxial layer through epitaxial layer in Semiconductor substrate, so as to outside
Prolong the second active area of the first active area and the second diode that the first diode is limited in layer, and by the first active area and
Two active areas are spaced apart；
First doped region of the first conduction type, is extended in epitaxial layer in the first active area from epi-layer surface；
Second doped region of the second conduction type, is extended in epitaxial layer in the second active area from epi-layer surface；And
Interconnection structure, the part that isolated area and epitaxial layer are located to the first active area are electrically connected to each other, wherein, the one or two pole
Pipe and second diode reverse are connected in parallel.
2. Transient Voltage Suppressor according to claim 1, in addition to：
Second Zener diode, it is connected in series with the capacitive diode assembly and first Zener diode.
3. Transient Voltage Suppressor according to claim 1, wherein, the capacitive diode assembly is as non-polar
Electric capacity.
4. Transient Voltage Suppressor according to claim 1, wherein, capacitive diode assembly has first end and second
End, the second end of capacitive diode assembly is connected with the negative electrode of the first Zener diode, also, the first of capacitive diode assembly
Hold signal end as Transient Voltage Suppressor, the earth terminal of the anode of the first Zener diode as Transient Voltage Suppressor.
5. Transient Voltage Suppressor according to claim 1, wherein, capacitive diode assembly has first end and second
End, the second end of capacitive diode assembly is connected with the anode of the first Zener diode, also, the negative electrode of the first Zener diode
As the signal end of Transient Voltage Suppressor, the earth terminal of the first end of capacitive diode assembly as Transient Voltage Suppressor.
6. Transient Voltage Suppressor according to claim 2, wherein, capacitive diode assembly has first end and second
End, the first end of capacitive diode assembly are connected with the negative electrode of the first Zener diode, the second end and the second Zener diode
Anode connects, also, signal end of the anode of the first Zener diode as Transient Voltage Suppressor, the second Zener diode
Earth terminal of the negative electrode as Transient Voltage Suppressor.
7. Transient Voltage Suppressor according to claim 2, wherein, capacitive diode assembly has first end and second
End, the second end of capacitive diode assembly is connected with the negative electrode of the first Zener diode, the anode of the first Zener diode and the
The negative electrode connection of two Zener diodes, also, signal end of the first end of capacitive diode assembly as Transient Voltage Suppressor
One of with earth terminal, the anode of the second Zener diode is as another in the signal end and earth terminal of Transient Voltage Suppressor
It is individual.
8. Transient Voltage Suppressor according to claim 2, wherein, capacitive diode assembly has first end and second
End, the second end of capacitive diode assembly is connected with the anode of the first Zener diode, the negative electrode of the first Zener diode and the
The anode connection of two Zener diodes, also, signal end of the first end of capacitive diode assembly as Transient Voltage Suppressor
One of with earth terminal, the negative electrode of the second Zener diode is as another in the signal end and earth terminal of Transient Voltage Suppressor
It is individual.
9. Transient Voltage Suppressor according to claim 1, wherein, the interconnection structure includes the first interconnecting line.
10. Transient Voltage Suppressor according to claim 9, in addition to：
Insulating barrier on epitaxial layer；And
Second interconnecting line, electrically connected with the first doped region and with the second doped region,
Wherein, first interconnecting line and second interconnecting line are each passed through insulating barrier and reach respective doped region.
11. Transient Voltage Suppressor according to claim 10, wherein, the interconnection structure also includes the second conduction type
The 3rd doped region, extended to from epi-layer surface in epitaxial layer, first interconnecting line and isolated area and the 3rd doped region
Contact.
12. Transient Voltage Suppressor according to claim 11, wherein, isolated area includes surrounding the first active area and second
The peripheral part of active area, and the center section that the first active area and the second active area are spaced apart, the 3rd doped region are horizontal
Interface between the first active area and the peripheral part of isolated area.
13. Transient Voltage Suppressor according to claim 11, wherein, the 3rd doped region surrounds the first doped region.
14. Transient Voltage Suppressor according to claim 1, wherein, form first between the first doped region and epitaxial layer
The PN junction of diode, the PN junction of the second diode is formed between Semiconductor substrate and epitaxial layer.
15. Transient Voltage Suppressor according to claim 10, wherein, the first diode and the second diode are used and partly led
Body substrate and the second interconnecting line are connected in antiparallel.
16. the Transient Voltage Suppressor according to any one of claim 1 to 15, wherein, the first conduction type be N-type and
One of p-type, the second conduction type are another in N-type and p-type.
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| CN105932023B (en) * | 2016-05-10 | 2019-01-29 | 北京燕东微电子有限公司 | Transient Voltage Suppressor |
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| CN110444537A (en) * | 2019-08-29 | 2019-11-12 | 中国振华集团永光电子有限公司（国营第八七三厂） | A kind of ceramic paster encapsulates the design method of two-way low junction capacity TVS diode |
| CN112003259A (en) * | 2020-08-24 | 2020-11-27 | 深圳市嘉兴南电科技有限公司 | Durable bidirectional voltage suppression device |
| CN113207205B (en) * | 2021-04-13 | 2022-04-08 | 上海交通大学 | Microwave protection circuit based on transient voltage suppressor |
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