CN201478303U - Anti-parallel double diode - Google Patents
Anti-parallel double diode Download PDFInfo
- Publication number
- CN201478303U CN201478303U CN2009201544981U CN200920154498U CN201478303U CN 201478303 U CN201478303 U CN 201478303U CN 2009201544981 U CN2009201544981 U CN 2009201544981U CN 200920154498 U CN200920154498 U CN 200920154498U CN 201478303 U CN201478303 U CN 201478303U
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- chip
- double diode
- parallel double
- face
- inverse parallel
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Abstract
The utility model discloses an anti-parallel double diode chip which is characterized in that the chip adopts an anti-parallel integrated chip, two PN node chips A and B which are oppositely arranged are arranged on a chip carrier, an isolating tape is arranged between the two PN node chips, the two ends thereof are covered with silicon dioxide protective layers, and lead-out parts at the two ends of a PN node are connected by a metal layer to form the anti-parallel chips A and B. Through the structure, the utility model has the following advantages that the anti-parallel double diode can be separately encapsulated into the shapes of DO-15 and DO-41 standard axial diodes and also can be superposed and sintered with a solid discharge tube chip or a TVS tube chip together and encapsulated into an anti-parallel double diode integrated product. The utility model has the maximal advantages that the anti-parallel double diode saves the space, reduces the floor area, is applicable to skillful electronic products and can be applied to a low-capacitance solid discharge tube with a capacitance value of less than 5 pf for high-frequency electronic communication equipment. The anti-parallel double diode chip has wide market prospect.
Description
Technical field
Utility model relates to a kind of inverse parallel double diode, is specifically related to a kind ofly promptly can be packaged into axial diode separately, also can be packaged into the integrated chip of inverse parallel double diode with solid discharging tube chip or TVS die stack sintering.
Background technology
The short circuit failure mode of discharge tube, is therefore used more reliable aspect the safeguard protection more and more than the open loop failure mode of gas discharge tube.But in data wire, ISDN, CATV, Modem and other high-frequency electronic communication equipments, present existing SA series, TPA series, P3XX series solid discharging tube capacitance big (usually more than the 20pf) and cause that the bigger decay of signal makes to use and be restricted.Therefore data wire, ISDN, CATV, Modem and other high-frequency electronic communication equipments press for low electric capacity solid discharging tube.And the capacitance of above-mentioned high-frequency electronic communication equipment is preferably the low electric capacity solid discharging tube less than 5pf.Circulation in the market be the above solid discharging tube of 20pf.
The utility model content
Main task of the present utility model is to provide a kind of inverse parallel double diode, is specifically related to a kind of axial diode that promptly can be packaged into separately and also can be packaged into the inverse parallel double diode integrated chip with solid discharging tube core or TVS die stack sintering.
In order to solve above technical problem; a kind of inverse parallel double diode chip of the present utility model; it is characterized in that: described chip is the inverse parallel integrated chip; structure is for being provided with PN junction chip A, the B of two reversed arrangement on chip carrier; the isolation strip is arranged in the middle of two chips; the two ends, isolation strip cover silicon dioxide layer of protection, and PN junction two ends extension is connected to form chip A, B inverse parallel by metal level.
Further, the two ends of described chip A, B are provided with phosphorous diffusion district and boron diffusion district respectively.
Further, the end face in the boron diffusion district of the end face in the phosphorous diffusion district of described chip A and chip B is same end face.
Further, the end face in the phosphorous diffusion district of the end face in the boron diffusion district of described chip A and chip B is same end face.
Further, carry out the break-through diffusion with boron in the described isolation strip.
The advantage of above structure is: with two PN junction reverse parallel connections; in electronic circuit, be usually used in two-way pressure limiting, and utilize less electric capacity of rectifier diode and solid discharging tube or two-way transient voltage inhibition organ pipe to connect and reduce the purpose of whole protecting circuit capacitance.Integrated chip of the present utility model is that chip is made two-sided diffusion region symmetry, establish the integrated chip of isolation strip between two chips, it can be packaged into DO-15 separately, the axial diode profile of DO-41 standard also can be packaged into the inverse parallel double diode integrated products with solid discharging tube core or TVS die stack sintering.Biggest advantage also is conserve space, reduces area occupied, adapts to present electronic product and pursues small and exquisite trend, can be applicable to the low electric capacity solid discharging tube of the capacitance of high-frequency electronic communication equipment less than 5pf.Has vast market prospect.
Description of drawings
Figure is a structural representation of the present utility model.
Embodiment
As shown in the figure, chip of the present utility model is the integrated chip of PN utmost point reverse parallel connection.Concrete structure is: the silicon single crystal that will contain low phosphorus is as chip carrier 2, two chip A, B are set on this carrier 2, the structure of described chip A, B is identical, be and on the both ends of the surface of carrier 2, establish phosphorous diffusion district and boron diffusion district respectively, just the end face in the phosphorous diffusion district 3 of chip A and the end face in chip B boron diffusion district 4 are same end face, and boron diffusion district 1 end face of chip A and chip B phosphorous diffusion district 5 end faces are same end face.The direct Colaesce gold metal layer 6 of extension at above-mentioned phosphorous diffusion district 3,5 end faces and boron diffusion district 4,1 end face; specifically be connected to: phosphorous diffusion district 3 is communicated with alloying metal floor 6 by extension with boron diffusion district 4; cross extension in 5 boron diffusion districts 1 and be communicated with alloying metal floor 6 in the phosphorous diffusion district; like this; make two chip A, B realize PN utmost point reverse parallel connection; reach and in electronic circuit, be used for two-way pressure limiting, and utilize less electric capacity of rectifier diode and solid discharging tube or two-way transient voltage to suppress organ pipe and connect and reduce the purpose of whole protecting circuit capacitance.
Center between above-mentioned two chip A, B is provided with the boron diffusion district as isolation strip 7, and 7 both ends and two chip extensions part in addition all are coated with silicon dioxide oxide layer 8 in the isolation strip.
Claims (5)
1. inverse parallel double diode chip; it is characterized in that: described chip is the inverse parallel integrated chip; structure is for being provided with PN junction chip A, the B of two reversed arrangement on chip carrier; the isolation strip is arranged in the middle of two chips; the two ends, isolation strip cover silicon dioxide layer of protection, and PN junction two ends extension is connected to form chip A, B inverse parallel by metal level.
2. a kind of inverse parallel double diode chip according to claim 1 is characterized in that: the two ends of described chip A, B are provided with phosphorous diffusion district and boron diffusion district respectively.
3. a kind of inverse parallel double diode chip according to claim 2 is characterized in that: the end face in the end face in the phosphorous diffusion district of described chip A and the boron diffusion district of chip B is same end face.
4. a kind of inverse parallel double diode chip according to claim 2 is characterized in that: the end face in the end face in the boron diffusion district of described chip A and the phosphorous diffusion district of chip B is same end face.
5. a kind of inverse parallel double diode chip according to claim 1 is characterized in that: carry out the break-through diffusion with boron in the described isolation strip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009201544981U CN201478303U (en) | 2009-05-15 | 2009-05-15 | Anti-parallel double diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009201544981U CN201478303U (en) | 2009-05-15 | 2009-05-15 | Anti-parallel double diode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201478303U true CN201478303U (en) | 2010-05-19 |
Family
ID=42414563
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009201544981U Expired - Lifetime CN201478303U (en) | 2009-05-15 | 2009-05-15 | Anti-parallel double diode |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201478303U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102082093A (en) * | 2010-12-10 | 2011-06-01 | 天津中环半导体股份有限公司 | Chip for two-way voltage regulator diode DB3 and manufacturing technique thereof |
| CN103137646A (en) * | 2013-03-15 | 2013-06-05 | 中国科学院微电子研究所 | Strobing device unit used for cross array integration way of double-pole type resistance change storage |
| CN105186478A (en) * | 2015-08-20 | 2015-12-23 | 北京燕东微电子有限公司 | Transient voltage suppressor |
| CN108604606A (en) * | 2016-01-08 | 2018-09-28 | 德克萨斯仪器股份有限公司 | The low di-cap of low dynamic electric resistor |
-
2009
- 2009-05-15 CN CN2009201544981U patent/CN201478303U/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102082093A (en) * | 2010-12-10 | 2011-06-01 | 天津中环半导体股份有限公司 | Chip for two-way voltage regulator diode DB3 and manufacturing technique thereof |
| CN102082093B (en) * | 2010-12-10 | 2014-03-05 | 天津中环半导体股份有限公司 | Manufacturing technique of chip for two-way voltage regulator diode DB3 |
| CN103137646A (en) * | 2013-03-15 | 2013-06-05 | 中国科学院微电子研究所 | Strobing device unit used for cross array integration way of double-pole type resistance change storage |
| US9508776B2 (en) | 2013-03-15 | 2016-11-29 | Insitute of Microelectronics, Chinese Academy of Sciences | Gating device cell for cross array of bipolar resistive memory cells |
| CN105186478A (en) * | 2015-08-20 | 2015-12-23 | 北京燕东微电子有限公司 | Transient voltage suppressor |
| CN105186478B (en) * | 2015-08-20 | 2018-03-30 | 北京燕东微电子有限公司 | Transient Voltage Suppressor |
| CN108604606A (en) * | 2016-01-08 | 2018-09-28 | 德克萨斯仪器股份有限公司 | The low di-cap of low dynamic electric resistor |
| CN108604606B (en) * | 2016-01-08 | 2022-02-15 | 德克萨斯仪器股份有限公司 | Low dynamic resistance low capacitance diode |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20100519 Effective date of abandoning: 20090515 |