CN105045985A - Design method for realizing impedance matching of wiring - Google Patents
Design method for realizing impedance matching of wiring Download PDFInfo
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- CN105045985A CN105045985A CN201510396478.5A CN201510396478A CN105045985A CN 105045985 A CN105045985 A CN 105045985A CN 201510396478 A CN201510396478 A CN 201510396478A CN 105045985 A CN105045985 A CN 105045985A
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- Prior art keywords
- impedance
- thickness
- cabling
- design
- live width
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- 238000013461 design Methods 0.000 title claims abstract description 16
- 238000000034 method Methods 0.000 title claims abstract description 11
- 238000004364 calculation method Methods 0.000 claims abstract description 5
- 230000002238 attenuated effect Effects 0.000 claims description 8
- 238000003475 lamination Methods 0.000 claims description 4
- 238000012827 research and development Methods 0.000 abstract 2
- 238000004088 simulation Methods 0.000 abstract 1
- 238000011160 research Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 206010068052 Mosaicism Diseases 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 210000003765 sex chromosome Anatomy 0.000 description 1
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- Structure Of Printed Boards (AREA)
Abstract
The invention provides a design method for realizing wiring impedance matching, and relates to the field of research and development design of a server mainboard. In the invention, when the PCB is designed, the appropriate line width after the routing is thinned is calculated in the dense area of the board card; adopting polar software to perform simulation analysis and calculation to obtain the pp thickness which is required to be referred by the thinned line width under the condition of unchanging impedance, and adding the thickness into the design; the signal integrity problem is satisfied while the research and development cost is saved.
Description
Technical field
The present invention relates to server master board R & D design field, be specifically related to a kind of thickness of the PCB of change Copper Foil inter-level dielectric to realize the method for designing of cabling impedance matching.
Background technology
Along with the arrival of cloud computing, the development of server emerges rapidly, and in the design of server, for meeting the different demands of client, from strength to strength, along with the increase of function, the spatial design demand of mainboard and cost are also in continuous lifting for server application function.
In motherboard design, especially run into cabling space inadequate when, usual designer can require that increasing thickness of slab solves cabling space problem.Meanwhile, increase thickness of slab and namely mean increase R&D costs.Therefore, when running into space and being inadequate, the direct method that research staff can expect is that cabling is attenuated, but the immediate problem brought is impedance discontinuity, because cabling is thinner, impedance is larger, and impedance discontinuity can make signal reflect, and produces ring.So the method that research staff adopts usually increases lamination, thus increase wiring aspect, and this method can bring cost to increase considerably simultaneously.Therefore how to optimize while saving design space, minimizing R&D costs, ensure signal quality, become the focus of designer.
Summary of the invention
In order to solve above technical matters, proposing a kind of method for designing realizing cabling impedance matching herein, solving the cabling difficult problem because space dense band on PCB comes, employing Layout cabling attenuates the discontinuous problem of brought signal line impedance.
The technical solution adopted in the present invention is:
Concrete steps are:
1) when PCB design, the applicable live width after board close quarters calculating cabling attenuates;
2) adopt the analytical calculation of polar software emulation to obtain when impedance is constant, the pp thickness size of reference needed for the live width attenuated, adds this thickness in design.
At the close quarters of board, calculate the suitable live width after being attenuated by cabling according to the size of dense space.Meanwhile, for avoiding the impedance discontinuity brought, the analytical calculation of polar software emulation is adopted to obtain when impedance is constant, the pp thickness size of reference needed for the live width attenuated.This thickness is added in design, thus, realize the impedance continuous print object of signal lead.This invention does not increase lamination, meets signal integrity while therefore saving R&D costs.
At the close quarters of board, cabling is attenuated, can obviously save space in plate;
For the cabling that will attenuate is to the PP(dielectric layer of reference layer) thickness reduces, the impedance of signal wire remained unchanged, reaches impedance continuous print object.
Meeting spatial cabling requirement on the basis not increasing lamination, meets signal and completes whole sex chromosome mosaicism while namely saving R&D costs.
The invention has the beneficial effects as follows:
At the close quarters of board, cabling being attenuated, meanwhile, for avoiding the impedance discontinuity brought, by the cabling that the attenuates PP(dielectric layer to reference layer) thickness reduces, the impedance of signal wire remained unchanged, reaches impedance continuous print object.Under the condition that board space is limited, when solution number of signals does not reduce, the signal lead impedance discontinuity problem brought.Intensive board question processing method before contrast, this invention meets problems of Signal Integrity while saving R&D costs.
Embodiment
More detailed elaboration is carried out to content of the present invention below:
By embodiment, the present invention is further described:
1) when PCB design, the applicable live width after board close quarters calculating cabling attenuates;
2) adopt the analytical calculation of polar software emulation to obtain when impedance is constant, the pp thickness size of reference needed for the live width attenuated, adds this thickness in design.Can realize.
Such as, the impedance under normal live width and dielectric thickness situation: normal routing line width is 7.85mil, and board close quarters live width becomes 5mil.Calculated can be obtained by polar software, normal reference layer PP thickness is 4.6mil, and live width is 7.85mil, and impedance is 50ohm;
Impedance after live width attenuates and dielectric thickness situation: after live width becomes 5mil, for reaching specific impedance 50ohm, calculating dielectric thickness and becoming 3.16mil.Therefore, by change dielectric thickness, can realize live width attenuate before and after impedance continuity.
Claims (3)
1. realize a method for designing for cabling impedance matching, it is characterized in that,
1) when PCB design, the applicable live width after board close quarters calculating cabling attenuates;
2) adopt the analytical calculation of polar software emulation to obtain when impedance is constant, the pp thickness size of reference needed for the live width attenuated, adds this thickness in design.
2. method according to claim 1, is characterized in that, for the cabling that will the attenuate PP thickness to reference layer reduces, the impedance of signal wire is remained unchanged, reaches impedance continuous print object.
3. method according to claim 1, is characterized in that, at the enterprising row wiring in the basis not increasing lamination.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510396478.5A CN105045985A (en) | 2015-07-08 | 2015-07-08 | Design method for realizing impedance matching of wiring |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510396478.5A CN105045985A (en) | 2015-07-08 | 2015-07-08 | Design method for realizing impedance matching of wiring |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105045985A true CN105045985A (en) | 2015-11-11 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510396478.5A Pending CN105045985A (en) | 2015-07-08 | 2015-07-08 | Design method for realizing impedance matching of wiring |
Country Status (1)
| Country | Link |
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| CN (1) | CN105045985A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106255352A (en) * | 2016-09-09 | 2016-12-21 | 郑州云海信息技术有限公司 | A kind of pcb board laying method, system and pcb board |
| CN106973489A (en) * | 2017-06-01 | 2017-07-21 | 西安科技大学 | A kind of matching connection member in radio frequency microwave circuit plate and attaching method thereof |
| CN107454736A (en) * | 2017-06-27 | 2017-12-08 | 上达电子（深圳）股份有限公司 | A kind of circuit board and its cabling impedance adjustment |
| CN108834315A (en) * | 2018-07-13 | 2018-11-16 | 郑州云海信息技术有限公司 | It is a kind of for testing the coupon generation method and system of high speed signal impedance |
| CN109548268A (en) * | 2018-11-01 | 2019-03-29 | 郑州云海信息技术有限公司 | A kind of PCB impedance adjustment, control system and a kind of PCB layout plate |
| CN113392613A (en) * | 2020-03-13 | 2021-09-14 | 浙江宇视科技有限公司 | Circuit board wiring method, system and device |
| CN114786349A (en) * | 2022-05-05 | 2022-07-22 | 博敏电子股份有限公司 | Method for manufacturing asymmetric impedance product |
Citations (3)
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| CN1829414A (en) * | 2005-03-03 | 2006-09-06 | 日本电气株式会社 | Transmission line and wiring forming method |
| US20090150848A1 (en) * | 2002-03-06 | 2009-06-11 | Amir Alon | Topologies and Methodologies for AMS Integrated Circuit Design |
| CN104582290A (en) * | 2015-01-30 | 2015-04-29 | 浪潮电子信息产业股份有限公司 | Method for realizing high-speed line impedance continuity |
-
2015
- 2015-07-08 CN CN201510396478.5A patent/CN105045985A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090150848A1 (en) * | 2002-03-06 | 2009-06-11 | Amir Alon | Topologies and Methodologies for AMS Integrated Circuit Design |
| CN1829414A (en) * | 2005-03-03 | 2006-09-06 | 日本电气株式会社 | Transmission line and wiring forming method |
| CN104582290A (en) * | 2015-01-30 | 2015-04-29 | 浪潮电子信息产业股份有限公司 | Method for realizing high-speed line impedance continuity |
Non-Patent Citations (1)
| Title |
|---|
| 何思军: "PCB特性阻抗控制精度探讨", 《2006中日电子电路秋季大会暨国际PCB技术/信息论坛》 * |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106255352A (en) * | 2016-09-09 | 2016-12-21 | 郑州云海信息技术有限公司 | A kind of pcb board laying method, system and pcb board |
| CN106255352B (en) * | 2016-09-09 | 2018-10-19 | 郑州云海信息技术有限公司 | A kind of pcb board laying method, system and pcb board |
| CN106973489A (en) * | 2017-06-01 | 2017-07-21 | 西安科技大学 | A kind of matching connection member in radio frequency microwave circuit plate and attaching method thereof |
| CN107454736A (en) * | 2017-06-27 | 2017-12-08 | 上达电子（深圳）股份有限公司 | A kind of circuit board and its cabling impedance adjustment |
| CN107454736B (en) * | 2017-06-27 | 2019-08-27 | 上达电子（深圳）股份有限公司 | A kind of circuit board and its cabling impedance adjustment |
| CN108834315A (en) * | 2018-07-13 | 2018-11-16 | 郑州云海信息技术有限公司 | It is a kind of for testing the coupon generation method and system of high speed signal impedance |
| CN108834315B (en) * | 2018-07-13 | 2021-05-25 | 郑州云海信息技术有限公司 | Method and system for generating coupon for testing high-speed signal impedance |
| CN109548268A (en) * | 2018-11-01 | 2019-03-29 | 郑州云海信息技术有限公司 | A kind of PCB impedance adjustment, control system and a kind of PCB layout plate |
| CN113392613A (en) * | 2020-03-13 | 2021-09-14 | 浙江宇视科技有限公司 | Circuit board wiring method, system and device |
| CN114786349A (en) * | 2022-05-05 | 2022-07-22 | 博敏电子股份有限公司 | Method for manufacturing asymmetric impedance product |
| CN114786349B (en) * | 2022-05-05 | 2024-03-12 | 博敏电子股份有限公司 | Manufacturing method of asymmetric impedance product |
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