CN106255352B - A kind of pcb board laying method, system and pcb board - Google Patents
A kind of pcb board laying method, system and pcb board Download PDFInfo
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- CN106255352B CN106255352B CN201610812283.9A CN201610812283A CN106255352B CN 106255352 B CN106255352 B CN 106255352B CN 201610812283 A CN201610812283 A CN 201610812283A CN 106255352 B CN106255352 B CN 106255352B
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- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000003475 lamination Methods 0.000 claims abstract description 208
- 238000004088 simulation Methods 0.000 claims abstract description 25
- 238000009434 installation Methods 0.000 claims description 11
- 239000011347 resin Substances 0.000 claims description 10
- 229920005989 resin Polymers 0.000 claims description 10
- 238000012937 correction Methods 0.000 claims description 6
- 239000011230 binding agent Substances 0.000 claims description 4
- 239000004744 fabric Substances 0.000 claims description 3
- 238000012512 characterization method Methods 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 241000784728 Lycaena virgaureae Species 0.000 description 1
- 238000012356 Product development Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
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- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
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Abstract
The present invention provides a kind of pcb board laying method, system and pcb boards, carry out analog simulation by simulator, determine each lamination impedance of analog simulation pcb board；According to the impedance of each lamination, the plank type and thickness of each lamination are determined；According to the thickness of each determining lamination, it includes the number of plank and the thickness of each plank to calculate each lamination；Include the number of plank and the thickness of each plank according to the plank type of each determining lamination and each calculated lamination, is laid with pcb board.Scheme provided by the invention can effectively improve the insulating properties of pcb board lamination.
Description
Technical field
The present invention relates to printed-board technology field, more particularly to a kind of pcb board laying method, system and pcb board.
Background technology
Printed circuit board (Printed circuit board, PCB) is provided with multiple laminations, each lamination is to insulate
Plate is base material, by disposing through-hole, realizes the interconnection between the electronic component being mounted thereon, wherein pcb board lamination
Insulating properties will directly affect the performance of pcb board.
Currently, in order to meet demand of the user to the insulating properties of pcb board lamination, match usually from each lamination of pcb board
It sets a type and thickness meets the plank of insulating properties demand.But due in pcb board manufacturing process, being received between lamination and lamination
To extruding, the binding resin in lamination is made to be lost in, to make the thickness of each lamination be less than the thickness of the lamination demand.Cause
This, existing this pcb board paving mode causes the insulating properties of pcb board lamination to reduce.
Invention content
An embodiment of the present invention provides a kind of pcb board laying method, system and pcb boards, and it is folded can to effectively improve pcb board
The insulating properties of layer.
A kind of pcb board laying method, including：
Analog simulation is carried out by simulator, determines each lamination impedance of analog simulation pcb board；
According to the impedance of each lamination, the plank type and thickness of each lamination are determined；
According to the thickness of each determining lamination, number and each plank that each lamination includes plank are calculated
Thickness；
According to the plank type of each determining lamination and each calculated lamination include plank number and
The thickness of each plank is laid with pcb board.
Preferably, the above method further comprises：At least two plank types are collected, and collect each plank type pair
The impedance of at least two plate thicknesss and each each corresponding plate thickness of plank type answered；
The plank type and thickness of each lamination of determination, including：
Each lamination executes operations described below as current lamination：
The selected target type and target thickness consistent with the impedance of current lamination.
Preferably, the thickness for calculating number of each lamination comprising plank and each plank, including：
Using each lamination as current lamination, operations described below is executed：
According to following calculating groups (1), each plank in the number and current lamination that current lamination includes plank is calculated
Thickness；
Wherein, D characterizes target thickness；D characterizes the thickness of each plank in current lamination；α characterizes correction constant；N tables
Levy the number that current lamination includes plank.
Preferably, the laying pcb board, including：
Each lamination executes operations described below as current lamination：
It is laid with the corresponding conductive layer of current lamination；
On the conductive layer, according to the plank type and plank number of the current lamination, it is sequentially laid with current lamination
Corresponding each plank.
A kind of pcb board paving system, including：
Simulator is used for analog simulation, determines each lamination impedance of analog simulation pcb board；
Installation apparatus, each lamination impedance for being simulated according to the simulator, determines each lamination
Plank type and thickness；According to the thickness of each determining lamination, number that each lamination includes plank and every is calculated
The thickness of one plank；Include of plank according to the plank type of each determining lamination and each calculated lamination
The thickness of several and each plank is laid with pcb board.
Preferably, the installation apparatus, including：Collection module and selecting module, wherein
The collection module, for collecting at least two plank types, and it is corresponding at least to collect each plank type
The impedance of two kinds of plate thicknesss and each each corresponding plate thickness of plank type；
The selecting module, for using each lamination as current lamination, executing the selected resistance with the current lamination
Resist the target type and target thickness that the consistent collection module is collected into.
Preferably, the installation apparatus, further comprises：
Computing module calculates current for using each lamination as current lamination, executing according to following calculating groups (1)
The thickness of each plank in number of the lamination comprising plank and current lamination；
Wherein, D characterizes the selected target thickness of selecting module；D characterizes the thickness of each plank in current lamination；α tables
Levy correction constant；N characterizes the number that current lamination includes plank.
Preferably, the installation apparatus, further comprises：
It is laid with module, for using each lamination as current lamination, executing and being laid with the corresponding conductive layer of current lamination；
On the conductive layer, according to the plank type and plank number of the current lamination, sequence is laid with current once corresponding each folded
Plank.
A kind of pcb board being laid with based on any of the above-described pcb board paving system, including：At least two laminations,
In,
Each lamination, including：One conductive layer and an insulating layer；
The insulating layer is made of at least two planks.
Preferably, by squeezing, the binder resin of the first plank in the insulating layer is attached to the conductive layer, described
The glass-fiber-fabric of first plank is attached in the PC resin of the second plank.
An embodiment of the present invention provides a kind of pcb board laying method, system and pcb boards, are simulated by simulator
Emulation, determines each lamination impedance of analog simulation pcb board；According to the impedance of each lamination, each lamination is determined
Plank type and thickness；According to the thickness of each determining lamination, number that each lamination includes plank and every is calculated
The thickness of one plank；Include of plank according to the plank type of each determining lamination and each calculated lamination
The thickness of several and each plank is laid with pcb board, due to the thickness of the number and each plank of plank in each lamination
It is calculated according to simulation result so that the number of plank is not limited to one in each lamination, then multiple planks
It can effectively ensure that the thickness of each lamination is consistent with next result is simulated, to effectively improve pcb board lamination
Insulating properties.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is the present invention
Some embodiments for those of ordinary skill in the art without creative efforts, can also basis
These attached drawings obtain other attached drawings.
Fig. 1 is a kind of flow chart of pcb board laying method provided by one embodiment of the present invention；
Fig. 2 is a kind of flow chart for pcb board laying method that another embodiment of the present invention provides；
Fig. 3 is a kind of structural schematic diagram of pcb board paving system provided by one embodiment of the present invention；
Fig. 4 is a kind of structural schematic diagram for pcb board paving system that another embodiment of the present invention provides；
Fig. 5 is a kind of structural schematic diagram of pcb board provided by one embodiment of the present invention.
Specific implementation mode
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments, based on the embodiments of the present invention, those of ordinary skill in the art
The every other embodiment obtained without making creative work, shall fall within the protection scope of the present invention.
As shown in Figure 1, an embodiment of the present invention provides a kind of pcb board laying method, this method may comprise steps of：
Step 101：Analog simulation is carried out by simulator, determines each lamination impedance of analog simulation pcb board；
Step 102：According to the impedance of each lamination, the plank type and thickness of each lamination are determined；
Step 103：According to the thickness of each determining lamination, number that each lamination includes plank and every is calculated
The thickness of one plank；
Step 104：Include plank according to the plank type of each determining lamination and each calculated lamination
The thickness of number and each plank is laid with pcb board.
In the embodiment shown in fig. 1, analog simulation is carried out by simulator, determines each of analog simulation pcb board
A lamination impedance；According to the impedance of each lamination, the plank type and thickness of each lamination are determined；According to determining each
The thickness of a lamination, it includes the number of plank and the thickness of each plank to calculate each lamination；According to determining each
The plank type of a lamination and each calculated lamination include the number of plank and the thickness of each plank, are laid with
Pcb board makes since the number of plank in each lamination and the thickness of each plank are calculated according to simulation result
The number for obtaining plank in each lamination is not limited to one, then multiple planks can effectively ensure the thickness of each lamination
Spend with simulate come result it is consistent, to effectively improve the insulating properties of pcb board lamination.
In an embodiment of the invention, in order to ensure that each lamination meet demand, the above method further comprise：It receives
Collect at least two plank types, and collects corresponding at least two plate thickness of each plank type and each plank class
The impedance of each corresponding plate thickness of type；The specific implementation mode of step 102, including：Each lamination is as current folded
Layer executes the selected target type and target thickness consistent with the impedance of current lamination.Such as：The plank type of collection,
Thickness and corresponding impedance are：Corresponding 70 Ω of impedance of plank type A, thickness 4.4mm；Plank type A, thickness 2.4mm are corresponded to
30 Ω of impedance；Corresponding 15 Ω of impedance of plank type A, thickness 2mm；Corresponding 80 Ω of impedance of plank type B, thickness 5.4mm；
Corresponding 50 Ω of impedance of plank type B, thickness 3.4mm；Corresponding 10 Ω of impedance of plank Type C, thickness 2mm；Plank Type C,
Corresponding 60 Ω of impedance of thickness 3.4mm；Corresponding 45 Ω of impedance of plank type A, thickness 1.9mm etc., such as：Current lamination needs
Impedance be 60 Ω, then the plank type of selected target plank be C, thickness 3.4mm.
In an embodiment of the invention, in order to ensure that the impedance of each lamination disclosure satisfy that the demand of pcb board, step
103 specific implementation mode, including：Using each lamination as current lamination, execute according to following calculating groups (1), calculating is worked as
The thickness of each plank in number of the preceding lamination comprising plank and current lamination；
Wherein, D characterizes target thickness；D characterizes the thickness of each plank in current lamination；α characterizes correction constant；N tables
Levy the number that current lamination includes plank.
Such as：The plank type that previous step is determined be C, target plate thickness be 3.4mm, correction constant 0.4mm, then
It is calculated d≤1.9, and only there are one thickness is that 1.9mm meets d in the thickness that above-mentioned steps are collected, then pass through d × N- α=D
N=2 is calculated.It is C by two types, thickness is that the plank of 1.9mm disclosure satisfy that the demand of the lamination impedance.
In an embodiment of the invention, the specific implementation mode of step 104, including：Each lamination is as current folded
Layer executes and is laid with the corresponding conductive layer of current lamination；On the conductive layer, according to the plank type and plate of the current lamination
Material number is sequentially laid with the corresponding each plank of current lamination.
As shown in Fig. 2, an embodiment of the present invention provides a kind of pcb board laying method, this method may comprise steps of：
Step 201：At least two plank types are collected, and it is thick to collect corresponding at least two plank of each plank type
The impedance of degree and each each corresponding plate thickness of plank type；
Step 202：Analog simulation is carried out by simulator, determines each lamination impedance of analog simulation pcb board；
In this step, be certain product development when, according to Simulation Evaluation, it is specified that it is impedance value that pcb board, which electrically estimates index,
Meet the ranges of 85ohm+/- 10%, Loss is no more than 0.48db/inch in 4Ghz frequency points.It is electrical by the defined pcb board
Index is estimated, can be that each lamination distributes corresponding impedance.
Step 203：Using each lamination as current lamination, the target class consistent with the impedance of current lamination is selected
Type and target thickness；
In order to meet the needs of step 202, in this step, the target type and target of each lamination simulated are thick
Degree, as shown in table 1 below.
Table 1
Find that the thickness of each lamination has different degrees of reduction, this is because pressing by being pre-pressed into pcb board
The binder resin of plank such as PC resin has a degree of loss during system, the scarce copper being filled between Cu foils and plank
Area.So, it is 0.52db/inch (it is required that 0.48db/inch), impedance value that manufactured pcb board obtains its Loss value by test
74.6ohm, less than the step 202 regulation lower limiting values of 85ohm+/- 10% 76.5ohm requirements.This is because each lamination obtains thickness
It is more slightly biased than Theoretical Design thickness thinner, in the prior art, often through fine tuning actual production line width, keep line width partially thin, but
This mode will increase conduction loss, actually electrically be worth exceeded hide some dangers for pcb board.
In embodiments of the present invention, meet 85ohm requirements to meet simulated impedance value, then continue following step.
Step 204：According to the thickness of each determining lamination, number that each lamination includes plank and every is calculated
The thickness of one plank；
Can be that each lamination determines at least two plank such as PP by the step, even if at least two plank bondings
Resin loss will not influence the thickness of its own.In order to realize the step, then according to following calculating groups (1), calculate current folded
The thickness of each plank in number of the layer comprising plank and current lamination；
Wherein, D characterizes target thickness；D characterizes the thickness of each plank in current lamination；α characterizes correction constant；N tables
Levy the number that current lamination includes plank.
By the above-mentioned type that can be calculated each lamination, plank number and thickness, as shown in table 2 below.
Table 2
It is that multiple planks are arranged in each lamination by above-mentioned table 2, by drawing a design, test is found, surveys Loss values
0.52db/inch meets user and 0.455db/inch, the impedance value 84.2ohm of actual measurement is required to meet the regulation 85ohm of user
+/- 10% requires, and close to central value.
By the verification that re-packs for the pcb board that case failure analysis and the embodiment of the present invention are laid with, plate construction is adopted in lamination
With 2 or multiple plank integrated modes, pcb board card Electrical Indexes can be preferably promoted, ensure that impedance and Loss indexs meet
Estimate design value requirement, can promotion signal long distance transmission SI mass and system operation stability.
Step 205：Include plank according to the plank type of each determining lamination and each calculated lamination
The thickness of number and each plank is laid with pcb board.
The specific implementation mode of the step：Each lamination is executed as current lamination：
It is laid with the corresponding conductive layer of current lamination；
On the conductive layer, according to the plank type and plank number of the current lamination, it is sequentially laid with current lamination
Corresponding each plank.
As shown in figure 3, a kind of pcb board paving system of offer of the embodiment of the present invention, the pcb board paving system, including：
Simulator 301 is used for analog simulation, determines each lamination impedance of analog simulation pcb board；
Installation apparatus 302, each lamination impedance for being simulated according to the simulator 301, determines each
The plank type and thickness of lamination；According to the thickness of each determining lamination, the number that each lamination includes plank is calculated
And the thickness of each plank；Include plate according to the plank type of each determining lamination and each calculated lamination
The thickness of the number of material and each plank is laid with pcb board.
As shown in figure 4, in an alternative embodiment of the invention, the installation apparatus, including：Collection module 401 and selection mould
Block 402, wherein
The collection module 401, for collecting at least two plank types, and it is corresponding extremely to collect each plank type
The impedance of few two kinds of plate thicknesss and each each corresponding plate thickness of plank type；
The selecting module 402, for using each lamination as current lamination, executing selected and the current lamination
The target type and target thickness that the consistent collection module 401 of impedance is collected into.
In still another embodiment of the process, the installation apparatus, further comprises：
It is laid with module (not shown), for using each lamination as current lamination, executing and being laid with current lamination pair
The conductive layer answered；On the conductive layer, according to the plank type and plank number of the current lamination, sequence is laid with current folded
Once corresponding each plank.
As shown in figure 5, the embodiment of the present invention is provided and a kind of is laid with based on any of the above-described pcb board paving system
Pcb board, including：At least two laminations 501, wherein
Each lamination 501, including：One conductive layer 5011 and an insulating layer 5012；
The insulating layer 5012 is made of at least two planks 50121.
In an alternative embodiment of the invention, by squeezing, the binder resin of the first plank in the insulating layer is attached to
The glass-fiber-fabric of the conductive layer, first plank is attached in the PC resin of the second plank.
According to said program, various embodiments of the present invention at least have the advantages that：
1. carrying out analog simulation by simulator, each lamination impedance of analog simulation pcb board is determined；According to each
The impedance of a lamination determines the plank type and thickness of each lamination；According to the thickness of each determining lamination, calculate every
One lamination includes the number of plank and the thickness of each plank；According to the plank type and meter of each determining lamination
Each lamination calculated includes the number of plank and the thickness of each plank, pcb board is laid with, due in each lamination
The thickness of the number of plank and each plank is calculated according to simulation result so that of plank in each lamination
Number is not limited to one, then multiple planks can effectively ensure the thickness of each lamination and simulate the result one come
It causes, to effectively improve the insulating properties of pcb board lamination.
2. the method provided through the embodiment of the present invention carries out the laying of pcb board, can cause to fold with existing paving mode
Layer thickness is compared less than requirement, is ensured that the thickness of each lamination in the pcb board after extruding still is able to meet demand, is avoided
Lamination punctures, and pcb board provided in an embodiment of the present invention can ensure high speed signal long distance transmission quality and the stability of operation.
It should be noted that herein, such as first and second etc relational terms are used merely to an entity
Or operation is distinguished with another entity or operation, is existed without necessarily requiring or implying between these entities or operation
Any actual relationship or order.Moreover, the terms "include", "comprise" or its any other variant be intended to it is non-
It is exclusive to include, so that the process, method, article or equipment including a series of elements includes not only those elements,
But also include other elements that are not explicitly listed, or further include solid by this process, method, article or equipment
Some elements.In the absence of more restrictions, the element limited by sentence " including one ", is not arranged
Except there is also other identical factors in the process, method, article or apparatus that includes the element.
One of ordinary skill in the art will appreciate that：Realize that all or part of step of above method embodiment can pass through
The relevant hardware of program instruction is completed, and program above-mentioned can be stored in computer-readable storage medium, the program
When being executed, step including the steps of the foregoing method embodiments is executed；And storage medium above-mentioned includes：ROM, RAM, magnetic disc or light
In the various media that can store program code such as disk.
Finally, it should be noted that：The foregoing is merely presently preferred embodiments of the present invention, is merely to illustrate the skill of the present invention
Art scheme, is not intended to limit the scope of the present invention.Any modification for being made all within the spirits and principles of the present invention,
Equivalent replacement, improvement etc., are included within the scope of protection of the present invention.
Claims (10)
1. a kind of pcb board laying method, which is characterized in that including：
Analog simulation is carried out by simulator, determines each lamination impedance of analog simulation pcb board；
According to the impedance of each lamination, the plank type and thickness of each lamination are determined；
According to the thickness of each determining lamination, it includes the number of plank and the thickness of each plank to calculate each lamination
Degree；
According to the plank type of each determining lamination and each calculated lamination include the number of plank and each
The thickness of plank is opened, pcb board is laid with.
2. according to the method described in claim 1, it is characterized in that,
Further comprise：At least two plank types are collected, and it is thick to collect corresponding at least two plank of each plank type
The impedance of degree and each each corresponding plate thickness of plank type；
The plank type and thickness of each lamination of determination, including：
Each lamination executes operations described below as current lamination：
The selected target type and target thickness consistent with the impedance of current lamination.
3. according to the method described in claim 2, it is characterized in that, it is described calculate each lamination include plank number and
The thickness of each plank, including：
Using each lamination as current lamination, operations described below is executed：
According to following calculating groups, the thickness of each plank in the number and current lamination that current lamination includes plank is calculated；
Wherein, D characterizes target thickness；D characterizes the thickness of each plank in current lamination；α characterizes correction constant；N characterizations are worked as
Preceding lamination includes the number of plank.
4. according to the method described in claim 3, it is characterized in that, the laying pcb board, including：
Each lamination executes operations described below as current lamination：
It is laid with the corresponding conductive layer of current lamination；
On the conductive layer, according to the plank type and plank number of the current lamination, sequentially it is laid with current lamination and corresponds to
Each plank.
5. a kind of pcb board paving system, which is characterized in that including：
Simulator is used for analog simulation, determines each lamination impedance of analog simulation pcb board；
Installation apparatus, each lamination impedance for being simulated according to the simulator, determines the plank of each lamination
Type and thickness；According to the thickness of each determining lamination, the number and each that each lamination includes plank are calculated
The thickness of plank；According to the plank type of each determining lamination and each calculated lamination include the number of plank with
And the thickness of each plank, it is laid with pcb board.
6. system according to claim 5, which is characterized in that the installation apparatus, including：Collection module and selection mould
Block, wherein
The collection module for collecting at least two plank types, and collects each plank type corresponding at least two
The impedance of plate thickness and each each corresponding plate thickness of plank type；
The selecting module, for using each lamination as current lamination, executing the selected impedance one with the current lamination
The target type and target thickness that the collection module caused is collected into.
7. system according to claim 6, which is characterized in that the installation apparatus further comprises：
Computing module, for using each lamination as current lamination, executing according to following calculating groups, calculating current lamination includes
The thickness of each plank in the number of plank and current lamination；
Wherein, D characterizes the selected target thickness of selecting module；D characterizes the thickness of each plank in current lamination；α characterizes school
Normal number；N characterizes the number that current lamination includes plank.
8. system according to claim 7, which is characterized in that the installation apparatus further comprises：
It is laid with module, for using each lamination as current lamination, executing and being laid with the corresponding conductive layer of current lamination；Described
On conductive layer, according to the plank type and plank number of the current lamination, it is sequentially laid with the corresponding each plank of current lamination.
9. a kind of pcb board being laid with based on any pcb board paving system of claim 5 to 8, which is characterized in that including：
At least two laminations, wherein
Each lamination, including：One conductive layer and an insulating layer；
The insulating layer is made of at least two planks.
10. pcb board according to claim 9, which is characterized in that
By squeezing, the binder resin of the first plank in the insulating layer is attached to the conductive layer, first plank
Glass-fiber-fabric is attached in the PC resin of the second plank.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105045985A (en) * | 2015-07-08 | 2015-11-11 | 浪潮电子信息产业股份有限公司 | Design method for realizing impedance matching of wiring |
| CN105653752A (en) * | 2014-12-05 | 2016-06-08 | 王丽香 | Digital signal impedance match circuit designing method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2005032154A (en) * | 2003-07-10 | 2005-02-03 | Sony Chem Corp | Printed circuit board manufacturing method, printed circuit board, and device, method, and program for characteristic impedance calculation |
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2016
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105653752A (en) * | 2014-12-05 | 2016-06-08 | 王丽香 | Digital signal impedance match circuit designing method |
| CN105045985A (en) * | 2015-07-08 | 2015-11-11 | 浪潮电子信息产业股份有限公司 | Design method for realizing impedance matching of wiring |
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