CN105022859A - Quantitative analysis method for heavy-ion single-particle multi-bit upset effect of device - Google Patents
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Abstract
本发明公开了器件的重离子单粒子多位翻转效应的定量分析方法,所述方法包括:选择重离子种类,依据相应的原则设定合适的注量率对开盖器件进行辐照,测试系统记录器件发生单粒子翻转的存储单元逻辑地址及数据,达到预计的单粒子翻转数或最大离子注量时停止辐照。建立器件逻辑地址到物理地址的映射关系,依据物理位图,统计单粒子翻转数、单粒子单位翻转和多位翻转事件数。结合离子注量,计算单粒子单位翻转和多位翻转事件概率、多位翻转均值、多位翻转截面等参数。本发明能够为器件抗单粒子翻转加固设计提供技术支撑和信息,并验证评价加固技术的有效性。
The invention discloses a quantitative analysis method for the heavy ion single particle multi-position flipping effect of a device. The method includes: selecting the type of heavy ion, setting a suitable fluence rate according to the corresponding principle to irradiate the device with the cover opened, and testing the system Record the logic address and data of the storage unit where the single event flip occurs in the device, and stop the irradiation when the expected number of single event flips or the maximum ion fluence is reached. Establish the mapping relationship from the logical address of the device to the physical address, and count the number of single-event flips, single-event unit flips, and multi-bit flip events based on the physical bitmap. Combined with the ion fluence, calculate the event probability of single event unit flipping and multibit flipping, the average value of multibit flipping, the cross section of multibit flipping and other parameters. The invention can provide technical support and information for the anti-single event flipping reinforcement design of the device, and verify and evaluate the effectiveness of the reinforcement technology.
Description
技术领域 technical field
本发明涉及一种一种器件的重离子单粒子多位翻转效应的定量分析方法,属于空间单粒子效应地面模拟试验技术及加固技术研究领域。 The invention relates to a quantitative analysis method for the heavy ion single particle multi-position flip effect of a device, and belongs to the research field of space single particle effect ground simulation test technology and reinforcement technology.
背景技术 Background technique
随着卫星电子系统对大规模集成电路性能要求的不断提高,采用超深亚微米、纳米级集成电路已成为不可避免的发展趋势。器件特征工艺尺寸的减小带来的首要问题是临界电荷的降低,临界电荷是器件发生单粒子翻转所需的最小电荷量,随工艺尺寸约成平方反比关系,如90nm工艺器件,在最坏情况下器件的临界电荷已经小于2fC。这意味着高能粒子进入器件后,触发器件状态翻转需要的电离能量沉积减小了,即单粒子翻转的敏感性增加。此外,特征尺寸的减小对电荷的收集过程也产生了深远影响,单个重离子入射引起的多个单粒子翻转敏感结点之间的电荷共享以及阱电势的崩塌引起相邻存储单元寄生双级晶体管导通而产生的双级放大效应使单粒子多位翻转问题变得日益严重。ITRS国际半导体技术发展蓝图预测至2016年,25nm工艺下集成电路的单粒子软错误率将全部来自于多位翻转。物理上相邻存储单元翻转所引起的多位翻转,由于引起器件单粒子软错误的急剧增加,会导致一些经典的版图加固方法如DICE双互锁存储单元在多结点电荷收集机制面前失去应有的加固效果,并使得传统的单粒子效应模拟试验方法、理论模型在纳米工艺下受到挑战。 With the continuous improvement of the performance requirements of large-scale integrated circuits in satellite electronic systems, the use of ultra-deep submicron and nanoscale integrated circuits has become an inevitable development trend. The primary problem brought about by the reduction of the device feature process size is the reduction of the critical charge. The critical charge is the minimum charge required for the device to undergo a single-event flip. It is inversely proportional to the square of the process size. In this case, the critical charge of the device is already less than 2fC. This means that after high-energy particles enter the device, the ionization energy deposition required to trigger the device state reversal is reduced, that is, the sensitivity of single event reversal is increased. In addition, the reduction of feature size also has a profound impact on the charge collection process, the charge sharing between multiple single-event turnover-sensitive junctions caused by single heavy ion incidence and the collapse of the well potential cause the parasitic double stage of adjacent memory cells. The double-stage amplification effect caused by the conduction of the transistor makes the problem of single event multiple bit flipping more and more serious. The ITRS international semiconductor technology development blueprint predicts that by 2016, the single event soft error rate of integrated circuits under the 25nm process will all come from multi-bit flips. The multi-bit flipping caused by the flipping of physically adjacent memory cells will cause some classic layout reinforcement methods such as DICE double-interlocked memory cells to lose their application in the face of multi-node charge collection mechanisms due to the sharp increase in device single-event soft errors. Some reinforcement effects, and make the traditional single-event effect simulation test methods, theoretical models challenged under the nanotechnology.
单粒子多位翻转(MCU)是指单个粒子入射引起物理上多个相邻存储单元发 生单粒子翻转的一种拓扑错误。深入研究器件单粒子多位翻转,需要准确获取器件单粒子多位翻转的多样性和拓扑图形,统计不同尺寸单粒子多位翻转的事件数并进行定量表征,这对于衡量器件单粒子多位翻转敏感性,指导器件抗单粒子加固设计,验证加固设计的有效性具有十分重要的意义。目前单粒子多位翻转研究普遍存在多位翻转难以判别统计、拓扑图形难以获取、影响程度难以定量的问题。国内开展器件单粒子多位翻转研究还处于起步阶段,未深入开展单粒子多位翻转试验方法的研究工作,申请号201010624396.9名称为一种脉冲激光单粒子翻转截面的实验方法的专利,给出了一种利用脉冲激光获取单粒子翻转截面的方法,申请号200710177960.5名称为获取单粒子现象截面与重离子线性能量转移关系的方法的专利,给出了一种获取单粒子翻转截面、闭锁截面、栅穿截面和烧毁截面与重离子LET值关系的方法,两个专利中均未涉及单粒子多位翻转试验数据获取和处理方法的描述。国际上报道的单粒子多位翻转研究工作多集中在对试验结果的分析和讨论,很少涉及单粒子多位翻转试验方法的描述。通常开展器件单粒子效应试验时,测试系统测量获取的是基于逻辑地址的单粒子翻转试验数据,因此不能客观反映发生单粒子翻转的存储单元是否在物理上真实相邻,是否可以判定为真正的单粒子多位翻转。另一方面即使获取了器件的物理位图,建立了单粒子翻转逻辑地址到物理地址的映射,但效应试验中却不控制离子注量率的选择,选择常规的单粒子效应试验方法中规定的注量率范围102-105/cm2.s之间的任一注量率,容易引入由不同粒子入射在相邻物理位置造成的“伪”多位翻转,造成单粒子多位翻转统计误差过大。同时对单粒子多位翻转的表征缺乏清晰的认识,导致多位翻转的定义和计算不能准确有效地反映器件对单粒子多位翻转的敏感性。因此建立一种完整的单粒子多位翻 转试验数据获取和处理方法成为开展器件单粒子翻转模拟试验技术研究、评价器件抗单粒子翻转能力、提高器件抗单粒子翻转加固性能急需解决的关键问题。 Single Event Multiple Bit Upset (MCU) refers to a topological error in which a single particle incident causes single event upover in multiple adjacent storage units physically. In-depth research on single event multiple bit flipping of devices requires accurate acquisition of the diversity and topology of single event multiple bit flipping of devices, counting the number of single event multiple bit flipping events of different sizes and performing quantitative characterization, which is very important for measuring single event multiple bit flipping of devices It is of great significance to guide the device anti-single event hardening design and verify the effectiveness of the hardening design. At present, there are many problems in the research of multi-bit inversion of single particle that it is difficult to distinguish and count multi-bit inversion, it is difficult to obtain topological graphs, and it is difficult to quantify the degree of influence. The domestic research on single-event multi-position flipping of devices is still in its infancy, and the research work on the single-particle multi-position flipping test method has not been carried out in depth. The patent application number 201010624396.9 is named as an experimental method for pulsed laser single-event flipping cross-section, which gives A method for obtaining single-particle flip cross-sections by using pulsed lasers. Application No. 200710177960.5 is a patent titled a method for obtaining the relationship between single-particle phenomenon cross-sections and heavy ion linear energy transfer. A method for obtaining single-particle flip cross-sections, blocking cross-sections, The method for the relationship between the cross-section and burn-out cross-section and the LET value of heavy ions, neither of the two patents involves the description of the acquisition and processing method of single-particle multi-position flip test data. Most of the research work on single-event multi-position inversion reported internationally focuses on the analysis and discussion of test results, and rarely involves the description of single-event multi-position inversion test methods. Usually, when carrying out the device single event effect test, the test system measures and obtains the single event flip test data based on the logical address, so it cannot objectively reflect whether the memory cells where the single event flip occurs are physically adjacent and whether they can be judged as real Single Event Multiple Bit Flip. On the other hand, even if the physical bitmap of the device is obtained, and the mapping from the logical address to the physical address of the single event flip is established, the selection of the ion fluence rate is not controlled in the effect test, and the conventional single event effect test method is selected. Any fluence rate within the fluence rate range of 10 2 -10 5 /cm 2 .s is easy to introduce "false" multi-bit flips caused by different particles incident at adjacent physical positions, resulting in single-particle multi-bit flip statistics The error is too large. At the same time, there is a lack of clear understanding of the characterization of single-event multi-bit flipping, resulting in the definition and calculation of multi-bit flipping not being able to accurately and effectively reflect the sensitivity of devices to single-event multi-bit flipping. Therefore, establishing a complete single-event multi-bit flip test data acquisition and processing method has become a key issue that needs to be solved urgently to carry out device single-event flip simulation test technology research, evaluate device anti-single event flipping ability, and improve device anti-single event flipping performance.
发明内容 Contents of the invention
本发明的目的是提供一种在地面实验室条件下对被测器件进行单粒子多位翻转试效应的定量分析方法,使今后地面单粒子效应多位翻转的研究工作更加方便、实用。 The purpose of the present invention is to provide a quantitative analysis method for the single-event multi-position flip test effect on the tested device under ground laboratory conditions, so as to make the research work of the ground single-event effect multi-position flip more convenient and practical in the future.
本发明是通过以下技术方案来实现的: The present invention is achieved through the following technical solutions:
一种器件的重离子单粒子多位翻转效应的定量分析方法,其特殊之处在于,包括以下步骤: A quantitative analysis method for the heavy ion single event multi-position flipping effect of a device, which is special in that it includes the following steps:
1】数据获取 1] Data acquisition
1.1】束流参数设定 1.1] Beam parameter setting
选择重离子种类,根据重离子LET值选择合适的注量率进行辐照; Select the type of heavy ions, and select the appropriate fluence rate for irradiation according to the LET value of the heavy ions;
1.2】测试 1.2] Test
记录器件发生单粒子翻转的存储单元逻辑地址及数据,达到预计的单粒子翻转数或最大离子注量时停止辐照; Record the logical address and data of the storage unit where the single event flip occurs in the device, and stop the irradiation when the expected number of single event flips or the maximum ion fluence are reached;
2】数据处理 2] Data processing
2.1】建立器件逻辑地址到物理地址的映射关系,形成物理位图; 2.1] Establish a mapping relationship from device logical address to physical address to form a physical bitmap;
2.2】依据物理位图,统计每个回读周期以及全部回读周期的单粒子翻转数和单粒子事件数,单粒子事件数包括单位翻转事件数和多位翻转事件数,并记录每种多位翻转事件所对应的多位翻转拓扑图形; 2.2] According to the physical bitmap, count the number of single-event flips and single-event events in each readback cycle and all readback cycles. The number of single-event events includes the number of single-bit flip events and the number of multi-bit flip events. The multi-bit flip topological graph corresponding to the bit flip event;
2.3】基于步骤2.2】的数据统计信息,结合重离子注量,对单粒子多位翻 转进行表征,实现对器件单粒子多位翻转效应的定量分析。 2.3] Based on the data statistical information in step 2.2], combined with the heavy ion fluence, characterize the single event multi-position flip, and realize the quantitative analysis of the single-event multi-position flip effect of the device.
如需要,在步骤1.2】与步骤2.1】之间还包括: If necessary, between step 1.2] and step 2.1] also include:
1.3】调整重离子入射角度、器件填充图形或工作电压后再进行1.2】测试 1.3] Adjust the incident angle of heavy ions, device filling patterns or operating voltage before performing 1.2] test
的步骤。 A step of.
如需要,在步骤1.3】与步骤2.1】之间还包括: If necessary, between step 1.3] and step 2.1] also include:
1.4】选择新的重离子种类,改变重离子LET值,根据重离子LET值选择合适的注量率进行辐照后再进行1.2】测试的步骤。 1.4] Select a new type of heavy ion, change the heavy ion LET value, select the appropriate fluence rate according to the heavy ion LET value for irradiation, and then proceed to 1.2] test steps.
如需要,在步骤1.4】与步骤2.1】之间还包括: If necessary, between step 1.4] and step 2.1] also include:
1.5】调整重离子入射角度、器件填充图形或工作电压后再进行1.2】测试的步骤。 1.5] After adjusting the incident angle of heavy ions, device filling pattern or operating voltage, proceed to the steps of 1.2] test.
在步骤1.1】束流参数设定时,对单粒子效应敏感的器件,辐照时离子注量率应尽量低,从而将“伪”MCU(两个或多个离子入射在相邻位置引起的MCU)的发生概率控制到很低。但过低注量率将导致单粒子翻转数累积过慢、辐照时间过长、加速器束流不稳定、注量统计误差增大等问题,因此实际效应试验中离子注量率选定原则是保证一个回读周期内发生单粒子翻转的数目相比于器件存储容量尽量少,具体为: In step 1.1] when setting the beam current parameters, for devices sensitive to single event effects, the ion fluence rate should be as low as possible during irradiation, so that the “pseudo” MCU (two or more ions incident on adjacent positions caused by MCU) is controlled to a very low probability of occurrence. However, if the fluence rate is too low, the accumulation of single particle turnover number will be too slow, the irradiation time will be too long, the accelerator beam current will be unstable, and the error of fluence statistics will increase. Therefore, the principle of ion fluence rate selection in the actual effect test is Ensure that the number of single event flips that occur within a readback cycle is as small as possible compared to the storage capacity of the device, specifically:
对于集成度小于1Mbit的存储器件,保证辐照中每个回读周期测试的翻转数小于芯片总容量的0.01%;对于集成度大于1Mbit的存储器件,保证辐照中每个回读周期测试的翻转数不大于100个,这样发生一次“伪”多位翻转的最劣概率小于1×10-3。 For storage devices with an integration degree of less than 1Mbit, ensure that the number of flips tested in each readback cycle during irradiation is less than 0.01% of the total chip capacity; The number of flips is not more than 100, so that the worst probability of a "false" multi-bit flip is less than 1×10 -3 .
一个回读周期内累计ESGL个翻转时发生一次“伪”多位翻转的概率λ可表示 为: The probability λ of a "false" multi-bit flip when E SGL flips are accumulated in a readback cycle can be expressed as:
其中,ESGL是辐照过程中一个回读周期记录的单粒子翻转数,N表示存储器件集成度即存储容量,AdjCell表示在1个存储单元翻转周围可能被记作MCU的存储单元数目,通常物理上完全相邻的存储单元发生翻转才被记做多位翻转,因此计算时AdjCell取8。 Among them, E SGL is the number of single event turnover recorded in a readback cycle during the irradiation process, N indicates the integration degree of the storage device, that is, the storage capacity, AdjCell indicates the number of storage units that may be recorded as MCU around a storage unit turnover, usually Physically completely adjacent memory cells are recorded as multi-bit flips only when flips occur, so AdjCell takes 8 during calculation.
从数据统计置信度考虑,步骤1.2】中所述的预计的单粒子翻转数应累积到超过100个但翻转数目不应超过器件存储容量的1%,最大离子注量不超过1E7cm-2。 Considering the statistical confidence of the data, the estimated number of single event flips mentioned in step 1.2] should accumulate to more than 100 but the flip number should not exceed 1% of the storage capacity of the device, and the maximum ion fluence should not exceed 1E7cm -2 .
上述步骤2.1】器件逻辑地址到物理地址的映射关系的建立基于设计厂商提供的器件信息或采取反向设计的方法或采用重离子微束、激光微束定位识别的方法。 The establishment of the mapping relationship between the logical address of the device and the physical address in the above step 2.1] is based on the device information provided by the design manufacturer or adopts the method of reverse design or the method of positioning and identification of heavy ion microbeam and laser microbeam.
上述步骤2.2】中单粒子事件数的统计方法为“一个离子引起的所有单粒子翻转都看作一个事件,无论是单位翻转还是多位翻转,事件仅记作一次”。 The statistical method for the number of single event events in the above step 2.2] is "all single event flips caused by an ion are regarded as one event, no matter it is a single flip or a multi-bit flip, the event is only recorded once".
上述步骤2.3】中对单粒子多位翻转进行表征并定量,表征参数包括U型即单粒子翻转截面、E型即单粒子事件截面、单粒子多位翻转事件截面、单粒子单位翻转事件截面、多位翻转均值Mean、多位翻转概率、具有i位翻转的单粒子事件的概率,具体表征方法如下: The above step 2.3] characterizes and quantifies the single-event multi-position inversion, and the characterization parameters include U-shape, which is the single-event inversion cross-section, E-shape, which is the single-event event cross-section, single-event multi-bit inversion event cross-section, single-event unit inversion event cross-section, The mean value of multi-bit flipping, the probability of multi-bit flipping, and the probability of a single event event with i-bit flipping, the specific characterization methods are as follows:
U型即单粒子翻转截面σU-SEU,表示成: The U-shape is the single-event flip cross section σ U-SEU , expressed as:
E型即单粒子事件截面σE-SEU,表示成: Type E is the single event event cross section σ E-SEU , expressed as:
其中Event i-bit是具有i位翻转的单粒子事件数,Φ是入射离子的总注量; Where Event i-bit is the number of single event events with i-bit flip, Φ is the total fluence of incident ions;
单粒子多位翻转事件截面σMCU,表示为: The event cross-section σ MCU of single-event multi-bit flipping is expressed as:
单粒子单位翻转事件截面 Single event unit flipping event cross section
多位翻转均值Mean: Multi-bit flip mean Mean:
多位翻转概率,表示为: Multi-bit flip probability, expressed as:
式中分母为所有单粒子事件的总和,分子为具有2位翻转以及更多位翻转的多位翻转事件的总和; where the denominator is the sum of all single-event events, and the numerator is the sum of multi-bit flip events with 2-bit flips and more;
具有i位翻转的单粒子事件Eventi-bit的概率则表示为 The probability of a single event event Event i-bit with i-bit flip is expressed as
步骤2.3】之后,还包括绘制单粒子表征参数中的一种或多种与重离子LET值、离子入射角度、填充图形、工作电压中的一种或几种之间的关系曲线。 After step 2.3], it also includes drawing a relationship curve between one or more of the single particle characterization parameters and one or more of the heavy ion LET value, ion incident angle, filling pattern, and operating voltage.
本发明与现有技术相比,优点是: Compared with the prior art, the present invention has the advantages of:
1、本发明的重离子单粒子多位翻转效应的定量分析方法通过对注量率的控制来降低““伪”多为翻转的发生几率,通过建立器件逻辑地址到物理地址的映射关系以能客观反映发生单粒子翻转的存储单元是否在物理上真实相邻,从而可以判定是否为真正的单粒子多位翻转来消除“伪”多位翻转,实现对被测器件抗单粒子翻转能力的评价检测。 1. The quantitative analysis method of heavy ion single particle multi-bit flipping effect of the present invention reduces the occurrence probability of "false" mostly flipping by controlling the fluence rate, and establishes the mapping relationship from the logical address of the device to the physical address to be able to Objectively reflect whether the storage unit where the single event flip occurs is physically adjacent, so that it can be judged whether it is a real single event multi-bit flip to eliminate "pseudo" multi-bit flip, and realize the evaluation of the anti-single event flip of the device under test detection.
2、本发明能够为建立科学合理的小尺寸器件重离子单粒子效应模拟试验方法提供依据。 2. The present invention can provide a basis for establishing a scientific and reasonable simulation test method for the heavy ion single event effect of small-scale devices.
3、本发明能够为器件抗单粒子翻转加固设计提供技术手段和信息,并验证评价加固技术的有效性。 3. The present invention can provide technical means and information for device anti-single event flipping reinforcement design, and verify and evaluate the effectiveness of the reinforcement technology.
4、本发明同样适用于质子和中子单粒子多位翻转的试验数据获取和处理。 4. The present invention is also applicable to the acquisition and processing of test data for multi-position flipping of proton and neutron single particles.
附图说明 Description of drawings
图1是本发明器件的重离子单粒子多位翻转效应的定量分析方法; Fig. 1 is the quantitative analysis method of the heavy ion single particle multi-position flip effect of the device of the present invention;
图2是本发明实施例中器件的译码图; Fig. 2 is the decoding figure of the device in the embodiment of the present invention;
图3是Cl离子辐照时某一回读周期单粒子翻转数据物理位图显示; Figure 3 is a physical bitmap display of single event flip data in a certain readback period when Cl ions are irradiated;
图4是Cl离子全部回读周期单粒子翻转数据物理位图显示; Figure 4 is the physical bitmap display of single event flip data in all readback cycles of Cl ions;
图5是单粒子单位翻转和多位翻转事件概率、多位翻转均值与LET值的关系曲线。 Fig. 5 is the relationship curve of single event unit flip and multi-bit flip event probability, multi-bit flip average and LET value.
图6表示了Cl离子辐照时全部回读周期内具有不同拓扑图形的单粒子多位翻转的事件数。 Figure 6 shows the number of single-event multiple-bit flip events with different topological patterns in all readback cycles when Cl ions are irradiated.
具体实施 specific implementation
下面以某静态存储器H328X电路为例,结合附图对本发明的具体实施方式做详细阐述,H328X是一款同步单端口SRAM电路,存储容量32K×8位共256Kbit, 以下示例仅用于说明本发明,但不用来限制本发明的范围。 Taking a certain static memory H328X circuit as an example, the specific implementation of the present invention will be described in detail in conjunction with the accompanying drawings. H328X is a synchronous single-port SRAM circuit with a storage capacity of 32K×8 bits and a total of 256Kbit. The following example is only used to illustrate the present invention , but not to limit the scope of the present invention.
图1是本发明实施例的器件的重离子单粒子多位翻转效应的定量分析方法的流程图,结合图1,对本方法进行详细描述。 FIG. 1 is a flow chart of a quantitative analysis method for the heavy ion single particle multi-position flipping effect of a device according to an embodiment of the present invention. The method is described in detail with reference to FIG. 1 .
(1)试验前对样品进行开盖处理,进行功能参数测试,测试合格后将样品插在PCB辐照板上,通过样品支架固定在试验位置并进行准直定位。连接测试系统、供电电路和PCB辐照板,对试验样品进行加电测试,确保样品和测试系统正常运行。 (1) Before the test, the sample is opened and the functional parameters are tested. After the test is passed, the sample is inserted on the PCB irradiation board, fixed at the test position by the sample holder, and aligned and positioned. Connect the test system, power supply circuit and PCB irradiation board, and conduct power-on test on the test sample to ensure the normal operation of the sample and test system.
(2)选取Br离子开始重离子辐照试验,测试系统高速回读,系统完成一次循环检测的时间约为4ms,记录每个回读周期发生单粒子翻转的存储单元的逻辑地址和数据。效应试验中离子注量率选定的原则是保证辐照中每个回读周期测试的翻转数小于芯片总容量的0.01%即不超过25个,这样发生“伪”多位翻转的最劣概率小于1×2)-3。由于该器件对单粒子效应敏感,当辐照时间达到1分钟时即停止辐照,记录离子总注量。然后更换离子种类,依次选取Cl离子、F离子、I离子获取不同LET值的重离子,重复上述步骤。 (2) Select Br ions to start the heavy ion irradiation test. The test system reads back at high speed. It takes about 4ms for the system to complete a cycle of detection, and records the logical address and data of the storage unit where the single event flip occurs in each readback cycle. The principle for selecting the ion fluence rate in the effect test is to ensure that the number of flips tested in each readback cycle during irradiation is less than 0.01% of the total chip capacity, that is, no more than 25, so that the worst probability of "false" multi-bit flips occurs less than 1×2) -3 . Since the device is sensitive to single event effects, the irradiation was stopped when the irradiation time reached 1 minute, and the total ion flux was recorded. Then change the ion types, select Cl ions, F ions, and I ions in sequence to obtain heavy ions with different LET values, and repeat the above steps.
(3)建立逻辑地址到物理地址的映射关系。H328X SRAM电路存储器物理位置按照一定地址顺序排列,见图2。存储器共八个IP单元由地址线A[14-12]控制,一个IP单元有上下两块(A[7]),列地址是A[3-0],A3为0选择U,为1时选择UX,行地址是A[11-8],A[6-4],其中A[11-8]为16个行组中选1,A[6-4]为小循环,在一个行组内进行8选1。版图布局中采用了位交错技术,每8个字的相同位布放在一起。 (3) Establish a mapping relationship from a logical address to a physical address. The physical locations of the H328X SRAM circuit memory are arranged in a certain order of addresses, as shown in Figure 2. A total of eight IP units in the memory are controlled by the address line A[14-12]. One IP unit has two blocks (A[7]), the column address is A[3-0], A3 is 0 and U is selected, and when it is 1 Select UX, the row address is A[11-8], A[6-4], where A[11-8] is 1 out of 16 row groups, A[6-4] is a small loop, within a row group Choose 1 from 8. Bit interleaving technology is adopted in the layout of the layout, and the same bits of every 8 words are placed together.
对于H328X,给出任意的15位逻辑地址都可以根据器件地址信息找到一个字的8个SRAM单元在对应组的物理位置。例:逻辑地址7F58的二进制表示如: For H328X, given any 15-bit logical address, the physical location of 8 SRAM cells in a word can be found in the corresponding group according to the device address information. Example: The binary representation of logical address 7F58 is as follows:
A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 A 14 A 13 A 12 A 11 A 10 A 9 A 8 A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0
1 1 1 1 1 1 1 0 1 0 1 8 0 0 0 1 1 1 1 1 1 1 0 1 0 1 8 0 0 0
依照下列步骤,可以找到这个逻辑地址对应的8个位单元的物理位置。 According to the following steps, the physical location of the 8 bit units corresponding to this logical address can be found.
(a)由A14 A13 A12=(111)2=7知道8个存储单元位于D7 IP单元。 (a) From A 14 A 13 A 12 =(111) 2 =7, it is known that 8 storage units are located in D7 IP unit.
(b)由A7=(0)2=0知道8个存储单元位于D7 IP单元的下半部分,即WL<0>-WL<127>区间内。 (b) From A 7 =(0) 2 =0, it is known that the 8 storage units are located in the lower half of the D7 IP unit, that is, in the interval WL<0>-WL<127>.
(c)由A11 A10 A9 A8=(1111)2=15知道8个存储单元位于15行组,即WL<120>-WL<127>区间内。 (c) According to A 11 A 10 A 9 A 8 =(1111) 2 =15, it is known that 8 storage units are located in the 15-row group, that is, in the interval WL<120>-WL<127>.
(d)由A6 A5 A4=(101)2=5知道8个存储单元位于15行组的5行,即125行。 (d) From A 6 A 5 A 4 =(101) 2 =5, it is known that the 8 storage units are located in the 5th row of the 15-row group, that is, the 125th row.
(e)由A3=(0)2=0知道位于U列组的8个存储单元数据选中 (e) by A 3 =(0) 2 =0, it is known that the data of 8 storage units located in the U column group are selected
(f)由A2 A1 A0=(000)0=0属于W0字,即8个U列组中位相同bi(i=0,1,……7)的相邻8个SRAM单元指向0列。 (f) A 2 A 1 A 0 =(000) 0 =0 belongs to W 0 word, that is, 8 adjacent SRAM cells with the same bit bi (i=0,1,...7) in 8 U column groups Points to column 0.
如逻辑地址7F58的数据位b1发生单粒子翻转,则物理地址指向U1列组的0列。 If the data bit b 1 of the logical address 7F58 has a single-event flip, the physical address points to column 0 of the U1 column group.
编制逻辑地址映射物理地址的位图映射软件,界面如图3所示,界面右半部分可以选择任意回读时间,给出发生翻转的存储单元的逻辑地址和物理地址以及相应的翻转位;左半部分为芯片阵列的概貌图,用来映射发生翻转的存储单元的物理位置。软件不仅能给出每个回读周期单粒子翻转物理位图,进行多位翻转的准确判断和统计,也能给出累积到一定注量下器件总的单粒子翻转成像图,从而验证束流光斑的均匀性以及位图映射的准确性,见图4。 Compile the bitmap mapping software that maps logical addresses to physical addresses. The interface is shown in Figure 3. The right half of the interface can choose any readback time, and the logical address and physical address of the memory unit that has been flipped and the corresponding flipped bits are given; the left The half part is an overview map of the chip array, which is used to map the physical location of the flipped memory cells. The software can not only give the physical bitmap of single event flips in each readback cycle, and perform accurate judgment and statistics on multi-bit flips, but also give the total single particle flip imaging image of the device accumulated to a certain fluence, so as to verify the beam flow. The uniformity of spots and the accuracy of bitmap mapping are shown in Figure 4.
(4)基于位图软件,统计每个回读周期的单粒子翻转数和单粒子事件数,单粒子事件数包括单位翻转事件数和多位翻转事件数,同时记录每种多位翻转事 件所对应的多位翻转的拓扑图形。然后对全部回读周期的每种单粒子事件数分别进行累加,统计具有i位翻转的单粒子事件数即Eventi-bit。表1中仅列举给出了Cl离子辐照1分钟时,每个回读时间以及总的单粒子翻转数,单粒子事件数,以及不同翻转位数的单粒子事件数。表2中给出了具有不同拓扑图形的单粒子多位翻转的事件数。 (4) Based on the bitmap software, count the number of single-event flips and the number of single-event events in each readback cycle. The number of single-event events includes the number of single-bit flip events and the number of multi-bit flip events, and record each multi-bit flip event at the same time The corresponding multi-bit flip topological graph. Then, the number of single event events of each type in all readback cycles is accumulated separately, and the number of single event events with i-bit flip is counted, that is, Eventi-bit. Table 1 only lists the number of single-event turnovers, the number of single-event events, and the number of single-event events at each readback time and the total number of single-event events when Cl ions are irradiated for 1 minute. Table 2 gives the event counts of single-event multiple-bit flips with different topological patterns.
表1 Cl离子辐照时全部回读周期内单粒子翻转数、单粒子多位翻转事件数统计表 Table 1 Statistical table of the number of single-event turnovers and the number of single-event multiple-bit turnover events in all readback periods when Cl ions are irradiated
(5)基于数据统计信息,结合加速器方提供的重离子注量,依据(1-2)-(1-8)所给出的多位翻转不同参数的定义,计算不同翻转位数单粒子事件的概率、多位翻转均值、多位翻转截面等参数,计算结果见表2,绘制单粒子单位翻转和多位翻转事件概率、多位翻转均值与LET值的关系曲线,见图5。 (5) Based on the statistical information of the data, combined with the heavy ion fluence provided by the accelerator, and according to the definition of different parameters of the multi-bit flip given in (1-2)-(1-8), calculate the single-event events with different flip bits The calculation results are shown in Table 2, and the probability of single event unit flipping and multi-bit flipping event probability, the average value of multi-bit flipping and the LET value are plotted, as shown in Figure 5.
表2 不同重离子LET时单位翻转和多位翻转概率、均值、截面的计算结果 Table 2 Calculation results of single-bit flip and multi-bit flip probability, mean value, and cross-section for different heavy ions in LET
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CN110531244B (en) * | 2019-08-01 | 2021-10-01 | 西北核技术研究院 | A test method for the evolution process of single-event soft errors in digital circuits |
CN110531244A (en) * | 2019-08-01 | 2019-12-03 | 西北核技术研究院 | A kind of digital circuit single-particle soft error evolutionary process test method |
CN110910946A (en) * | 2019-11-30 | 2020-03-24 | 中国科学院新疆理化技术研究所 | An on-orbit single-event flip-screening system based on 3D stacked-package SRAM devices |
CN110910946B (en) * | 2019-11-30 | 2023-11-24 | 中国科学院新疆理化技术研究所 | On-orbit single event upset screening system based on three-dimensional stack encapsulation SRAM device |
CN111274749A (en) * | 2020-01-19 | 2020-06-12 | 西北核技术研究院 | A single-particle multi-unit flip information extraction method based on probability statistics |
CN111274749B (en) * | 2020-01-19 | 2023-03-21 | 西北核技术研究院 | Single-particle multi-unit upset information extraction method based on probability statistics |
CN111650452A (en) * | 2020-05-07 | 2020-09-11 | 西北核技术研究院 | A method for estimating the low-energy proton single-event turnover rate of the device space on-orbit |
CN114065692A (en) * | 2021-11-09 | 2022-02-18 | 中国科学院近代物理研究所 | Memory bitmap analysis method and system based on single event effect |
CN114065692B (en) * | 2021-11-09 | 2024-11-26 | 中国科学院近代物理研究所 | A memory bitmap analysis method and system based on single particle effect |
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