CN104994621A - Three-filter amplification-type logic protection emitter coupling type gate driving system - Google Patents
Three-filter amplification-type logic protection emitter coupling type gate driving system Download PDFInfo
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- CN104994621A CN104994621A CN201510323906.1A CN201510323906A CN104994621A CN 104994621 A CN104994621 A CN 104994621A CN 201510323906 A CN201510323906 A CN 201510323906A CN 104994621 A CN104994621 A CN 104994621A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
- H05B47/10—Controlling the light source
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection
Abstract
The invention discloses a three-filter amplification-type logic protection emitter coupling type gate driving system. The system is mainly formed by a driving chip M, a driving circuit connected to the driving chip M, a switch power amplification circuit connected to the driving chip M and a bootstrap circuit connected to the switch power amplification circuit. The system is characterized in that a three-filter amplification circuit and a logic protection emitter coupling type amplification circuit are connected in series between the switch power amplification circuit and the driving chip M. By using the system of the invention, a clutter in the circuit can be well filtered so that product accuracy and a suitable scope are greatly increased; an overall structure is simple; manufacturing and usage are convenient; starting time is only one fourth of starting time of a traditional gate driving circuit and the starting time is very short.
Description
Technical field
The present invention relates to a kind of LED drive circuit, specifically refer to three filter and amplification type virtual protection emitter-base bandgap grading manifold type raster data model systems.
Background technology
At present, because LED has, energy consumption is low, the feature such as long service life and safety and environmental protection, and it has become one of main product of people's life lighting.Because LED is different from traditional incandescent lamp, therefore its needs are driven by special drive circuit.But, the widely used gate driver circuit of current people due to the irrationality of its project organization, defects such as result in current gate driver circuit and have that energy consumption is higher, current noise comparatively large and start-up time is longer.
Summary of the invention
The object of the invention is to the defect that energy consumption is higher, current noise is comparatively large and start-up time is longer overcoming the existence of current gate driver circuit; a kind of reasonable in design is provided; can effectively reduce energy consumption and current noise, obviously shorten the three filter and amplification type virtual protection emitter-base bandgap grading manifold type raster data model systems of start-up time.
Object of the present invention is achieved through the following technical solutions:
Three filter and amplification type virtual protection emitter-base bandgap grading manifold type raster data model systems; primarily of driving chip M; the drive circuit be connected with driving chip M, the switch power amplifying circuit be connected with driving chip M, and the boostrap circuit be connected with this switch power amplifying circuit forms.Meanwhile, between switch power amplifying circuit and driving chip M, be also serially connected with three filter amplification circuit and virtual protection emitter-base bandgap grading manifold type amplifying circuit, described switch power amplifying circuit is by power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R6 between the output of power amplifier P1 and negative input and electric capacity C3, be serially connected in the resistance R7 between the output of power amplifier P2 and electrode input end and electric capacity C4, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R8, base stage is connected with the output of power amplifier P2 after resistance R9, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R12, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C5 of ground connection, the electric capacity C6 be in parallel with resistance R9, one end is connected with the base stage of triode Q3, the resistance R10 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R11 of the external-4V voltage of the other end, the electric capacity C7 be in parallel with resistance R11, N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P, and positive pole is connected with the INP pin of driving chip M, negative pole after being connected with the emitter of triode Q2 again the polar capacitor C8 of ground connection form, the output of described power amplifier P3 is then connected with the VCC pin of driving chip M.
Described boostrap circuit is then by field effect transistor MOS, one end is connected with the source electrode of field effect transistor MOS, the resistance R5 of other end ground connection, the polar capacitor C1 that negative pole is connected with the grid of field effect transistor MOS, positive pole is connected with the drain electrode of field effect transistor MOS after resistance R1, the resistance R2 be in parallel with polar capacitor C1, the polar capacitor C2 that positive pole is connected with the positive pole of polar capacitor C1, negative pole is connected with the source electrode of field effect transistor MOS, and one end is connected with the positive pole of polar capacitor C2, the resistance R4 of other end ground connection forms; The drain electrode of described field effect transistor MOS is connected with the electrode input end of power amplifier P1, and this drain electrode also simultaneously external+12V voltage, the source electrode of field effect transistor MOS is then connected with the electrode input end of power amplifier P2 with the negative input of power amplifier P1 respectively, the negative input then ground connection of power amplifier P2.
Described three filter amplification circuit are by triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, triode VT106, triode VT107, operational amplifier P101, operational amplifier P102, operational amplifier P103, operational amplifier P104, one end is as input, the resistance R101 that the other end is connected with the base stage of triode VT107, the electric capacity C101 in parallel with resistance R101, one end is connected with the base stage of triode VT107, the resistance R103 that the other end is connected with the emitter of triode VT107 after resistance R105, one end is connected with the base stage of triode VT107, the resistance R102 that the other end is connected with the collector electrode of triode VT107 after resistance R104, positive pole is connected with the emitter of triode VT107, the electric capacity C104 that negative pole is connected with the tie point of resistance R105 with resistance R103, be serially connected in the resistance R114 between the base stage of triode VT101 and emitter, one end ground connection, the resistance R113 that the other end is connected with the base stage of triode VT102, P pole is connected with the base stage of triode VT103, the diode D101 that N pole is connected with the collector electrode of triode VT107 after electric capacity C103, P pole is connected with the N pole of diode D101 after diode D102, the diode D103 that N pole is connected with the base stage of triode VT106, one end is connected with the base stage of triode VT106, the resistance R111 that the other end is connected with the output of operational amplifier P104, one end ground connection, the resistance R112 that the other end is connected with the emitter of triode VT104, minus earth, the electric capacity C105 that positive pole is connected with the positive pole of electric capacity C104 after resistance R106, one end is connected with the positive pole of electric capacity C105, the resistance R108 that the other end is connected with the negative input end of operational amplifier P101, one end is connected with the positive pole of electric capacity C105, the resistance R107 that the other end is connected with the output of operational amplifier P101, be serially connected in the electric capacity C106 between the negative input end of operational amplifier P101 and output, minus earth, the electric capacity C108 that positive pole is connected with the positive input terminal of operational amplifier P102, negative pole is connected with the output of operational amplifier P101 after resistance R109, the electric capacity C107 that positive pole is connected with the negative input end of operational amplifier P102, one end is connected with the negative pole of electric capacity C107, the resistance R110 that the other end is connected with the positive pole of electric capacity C108, negative pole is connected with the base stage of triode VT107, the electric capacity C102 that positive pole is connected with the emitter of triode VT104 after resistance R115, minus earth, the electric capacity C109 that positive pole is connected with the tie point of resistance R104 with resistance R102 after resistance R116, one end is connected with the positive pole of electric capacity C109, the resistance R118 that the other end is connected with the negative input end of operational amplifier P103, one end is connected with the positive pole of electric capacity C109, the resistance R117 that the other end is connected with the positive input terminal of operational amplifier P103, be serially connected in the electric capacity C110 between the negative input end of operational amplifier P103 and output, minus earth, the electric capacity C111 that positive pole is connected with the negative pole of electric capacity C104 after resistance R119, one end is connected with the positive pole of electric capacity C111, the resistance R121 that the other end is connected with the negative input end of operational amplifier P104, one end is connected with the positive pole of electric capacity C111, the resistance R120 that the other end is connected with the output of operational amplifier P104, and the electric capacity C112 be serially connected between the negative input end of operational amplifier P104 and output forms, wherein, the negative pole of electric capacity C104 is also connected with the collector electrode of triode VT105 with the collector electrode of triode VT106 simultaneously, the emitter of triode VT101, the collector electrode of triode VT103 is all connected with the output of operational amplifier P103 with the collector electrode of triode VT104, the positive input terminal ground connection of operational amplifier P103, the base stage of triode VT101 is connected with the emitter of triode VT102, the collector electrode of triode VT101 is connected with the base stage of triode VT102, the collector electrode of triode VT102 is connected with the base stage of triode VT103, the emitter of triode VT103 is connected with the base stage of triode VT104, the emitter of triode VT104 is connected with the emitter of triode VT105, the base stage of triode VT105 is connected with the emitter of triode VT106, the positive input terminal ground connection of operational amplifier P101, the positive pole of electric capacity C107 is also connected with the output of operational amplifier P102 and the N pole of diode D101 simultaneously, the positive input terminal ground connection of operational amplifier P104, the emitter of described triode VT104 is connected as output and with the TD pin of driving chip M.
Described virtual protection emitter-base bandgap grading manifold type amplifying circuit is primarily of triode Q5, triode Q6, power amplifier P4, power amplifier P5, be serially connected in the resistance R15 between the negative input of power amplifier P4 and output, be serially connected in the polar capacitor C15 between the electrode input end of power amplifier P5 and output, be serially connected in the resistance R14 between the electrode input end of power amplifier P4 and the collector electrode of triode Q5, be serially connected in the resistance R16 between the collector electrode of triode Q5 and the base stage of triode Q6, the electric capacity C14 be in parallel with resistance R16, negative pole is connected with the electrode input end of power amplifier P4, the polar capacitor C13 that positive pole is connected with the emitter of triode Q5 after resistance R17, be serially connected in the resistance R18 between the base stage of triode Q6 and the positive pole of polar capacitor C13, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C16 that voltage stabilizing didoe D3 is connected with the output of power amplifier P4 after resistance R19, P pole is connected with the output of power amplifier P5, the diode D4 that N pole is connected with the tie point of resistance R19 with voltage stabilizing didoe D3 after resistance R20 through resistance R21, and P pole is connected with the negative pole of electric capacity C16, the voltage stabilizing didoe D5 that N pole is connected with the tie point of resistance R21 with diode D4 forms, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C13, and its emitter is connected with the emitter of triode Q6, and its collector electrode is connected with the negative input of power amplifier P4, the collector electrode of triode Q6 is connected with the negative input of power amplifier P5, and the electrode input end of power amplifier P5 is connected with the output of power amplifier P4, the positive pole of described polar capacitor C13 is connected with the output of power amplifier P2, and resistance R21 is then connected with the input of resistance R101 with the tie point of resistance R20.
Described drive circuit is by transformer T, be serially connected with the diode D2 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C9 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R13 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C10 and electric capacity C11 the transistor Q4 of ground connection and emitter also ground connection form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C11 with electric capacity C10, and its non-same polarity is then connected with the emitter of transistor Q4; Meanwhile, the emitter of transistor Q4 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
For guaranteeing result of use of the present invention, described driving chip M is LTC4440A integrated chip.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) overall structure of the present invention is very simple, and it makes and very easy to use.
(2) be only 1/4 of conventional gate drive circuit start-up time start-up time of the present invention, its start-up time is extremely short.
(3) the present invention adopts boostrap circuit and switch power amplifying circuit to provide control signal for driving chip, therefore has very high input impedance, can guarantee the stable performance of whole circuit.
(4) be provided with three filter amplification circuit in the present invention, can be good at filtering the clutter in circuit, substantially increase accuracy and the scope of application of product.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present invention.
Fig. 2 is the structural representation of virtual protection emitter-base bandgap grading manifold type amplifying circuit of the present invention.
Fig. 3 is the circuit diagram of three filter amplification circuit of the present invention.
Description of reference numerals:
10, three filter amplification circuit; 20, virtual protection emitter-base bandgap grading manifold type amplifying circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1; the present invention is primarily of driving chip M; the drive circuit be connected with driving chip M; the switch power amplifying circuit be connected with driving chip M; the boostrap circuit be connected with switch power amplifying circuit, and three filter amplification circuit be serially connected between switch power amplifying circuit and driving chip M and virtual protection emitter-base bandgap grading manifold type amplifying circuit 20 form.For guaranteeing result of use of the present invention, the high-frequency N-channel MOS FET grid drive chip that this driving chip M preferentially adopts Linear Techn Inc. to produce, namely LTC4440A integrated chip realizes.The feature of this driving chip M is can with the input voltage work up to 80V, and can up to can continuous operation during 100V transient state.
Described switch power amplifying circuit is primarily of power amplifier P1, power amplifier P2, power amplifier P3, triode Q1, triode Q2, triode Q3, polar capacitor C8, be serially connected in the one-level RC filter circuit between the output of power amplifier P1 and negative input, be serially connected in the secondary RC filter circuit between the output of power amplifier P2 and electrode input end, and resistance R3, resistance R8, resistance R9, resistance R10, resistance R11, resistance R12, electric capacity C5, electric capacity C6, electric capacity C7 and diode D1 form.
Wherein, described one-level RC filtered electrical routing resistance R6 and electric capacity C3 is formed in parallel, namely between resistance R6 and the electric capacity C3 negative input that is all serially connected in power amplifier P1 and output; Described secondary RC filter circuit is then formed in parallel by resistance R7 and electric capacity C4, namely between resistance R7 and the electric capacity C4 electrode input end that is all serially connected in power amplifier P2 and output.Meanwhile, the negative input of this power amplifier P1 is also connected with the electrode input end of power amplifier P2.
The base stage of triode Q1 is connected with the output of power amplifier P1, and its collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, and its emitter is then connected with the base stage of triode Q2; The collector electrode of triode Q2 is connected with the negative input of power amplifier P3 after resistance R8, meanwhile, and the collector electrode also external+10V voltage of this triode Q2.
The base stage of triode Q3 is connected with the output of power amplifier P2 after resistance R9, and its collector electrode is then connected with the base stage of triode Q2 after resistance R12.Electric capacity C6 is then in parallel with resistance R9, and for guaranteeing effect, this electric capacity C6 preferentially adopts electrochemical capacitor to realize.During connection, the negative pole of electric capacity C6 is connected with the base stage of triode Q3, and its positive pole is then connected with the output of power amplifier P2.The positive pole of electric capacity C5 is connected with the negative input of power amplifier P3, and its negative pole is then connected with the emitter of triode Q2.Meanwhile, the negative pole of this electric capacity C5 and the equal ground connection of emitter of triode Q2.
The positive pole of polar capacitor C8 is connected with the INP pin of driving chip M, and negative pole is connected with the emitter of triode Q2 with the negative pole of electric capacity C5 respectively.
One end of resistance R10 is connected with the base stage of triode Q3, the voltage of the external-4V of its other end; And one end of resistance R11 is connected with the emitter of triode Q3, the voltage of its other end then external equally-4V.Electric capacity C7 is then in parallel with resistance R11.Equally, described electric capacity C5 and electric capacity C7 also all adopts electrochemical capacitor to realize.
The N pole of described diode D1 is connected with the collector electrode of triode Q1, and its P pole is at the voltage of external-4V.
For guaranteeing the normal operation of power amplifier P1 and power amplifier P2, this electric capacity C3 and electric capacity C4 all preferentially adopts patch capacitor to realize.
Described boostrap circuit is made up of field effect transistor MOS, polar capacitor C1, polar capacitor C2, resistance R1, resistance R2, resistance R4 and resistance R5.During connection, one end of resistance R5 is connected with the source electrode of field effect transistor MOS, its other end ground connection; The negative pole of polar capacitor C1 is connected with the grid of field effect transistor MOS, and its positive pole is connected with the drain electrode of field effect transistor MOS after resistance R1, and resistance R2 is then in parallel with polar capacitor C1.
The positive pole of described polar capacitor C2 is connected with the positive pole of polar capacitor C1, and its negative pole is connected with the source electrode of field effect transistor MOS.And one end of resistance R4 is connected with the positive pole of polar capacitor C2, its other end ground connection.
The drain electrode needs of described field effect transistor MOS are connected with the electrode input end of power amplifier P1, its source electrode then needs to be connected with the electrode input end of power amplifier P2 with the negative input of power amplifier P1 respectively, the negative input then ground connection of power amplifier P2.
For guaranteeing the normal work of field effect transistor MOS and switch power amplifying circuit, therefore the drain electrode of this field effect transistor MOS needs the voltage of external+12V.
Described drive circuit is then made up of transformer T, diode D2, electric capacity C9, resistance R13, electric capacity C10, electric capacity C11 and transistor Q4.During connection, the P pole of diode D2 is connected with the VCC pin of driving chip M, and its N pole is then connected with the BOOST pin of driving chip M.The positive pole of electric capacity C9 is connected with the BOOST pin of driving chip M, and its negative pole is then connected with the TG pin of driving chip M.
Resistance R13 is divider resistance, and it is serially connected with between the TG pin of driving chip M and TS pin.The base stage of transistor Q4 is then connected with the TG pin of driving chip M, and its collector electrode is ground connection after electric capacity C10 and electric capacity C11 in turn, its grounded emitter.Meanwhile, the collector electrode of this transistor Q4 also needs the direct voltage of external+6V, to guarantee that transistor Q4 has enough bias voltages to drive himself conducting.
For guaranteeing result of use, described electric capacity C9, electric capacity C10 and electric capacity C11 all adopt patch capacitor to realize.Described transformer T exports to outside field effect transistor after being used for that+the 6V of outside direct voltage is carried out transformation process.
The Same Name of Ends of the primary coil of this transformer T is connected with the tie point of electric capacity C11 with electric capacity C10, ground connection after its non-same polarity is then connected with the emitter of transistor Q4.Meanwhile, the emitter of transistor Q4 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
The Same Name of Ends of the secondary coil of transformer T, tap Y1, tap Y2 together with the non-same polarity of secondary coil as output of the present invention.According to the situation of reality, user can only select any one or several port of these four outputs to use.
The structure of described virtual protection emitter-base bandgap grading manifold type amplifying circuit as shown in Figure 2, it is primarily of triode Q5, triode Q6, power amplifier P4, power amplifier P5, be serially connected in the resistance R15 between the negative input of power amplifier P4 and output, be serially connected in the polar capacitor C15 between the electrode input end of power amplifier P5 and output, be serially connected in the resistance R14 between the electrode input end of power amplifier P4 and the collector electrode of triode Q5, be serially connected in the resistance R16 between the collector electrode of triode Q5 and the base stage of triode Q6, the electric capacity C14 be in parallel with resistance R16, negative pole is connected with the electrode input end of power amplifier P4, the polar capacitor C13 that positive pole is connected with the emitter of triode Q5 after resistance R17, be serially connected in the resistance R18 between the base stage of triode Q6 and the positive pole of polar capacitor C13, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C16 that voltage stabilizing didoe D3 is connected with the output of power amplifier P4 after resistance R19, P pole is connected with the output of power amplifier P5, the diode D4 that N pole is connected with the tie point of resistance R19 with voltage stabilizing didoe D3 after resistance R20 through resistance R21, and P pole is connected with the negative pole of electric capacity C16, the voltage stabilizing didoe D5 that N pole is connected with the tie point of resistance R21 with diode D4 forms.
Meanwhile, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C13, and its emitter is connected with the emitter of triode Q6, and its collector electrode is connected with the negative input of power amplifier P4.
The collector electrode of triode Q6 is connected with the negative input of power amplifier P5, and the electrode input end of power amplifier P5 is connected with the output of power amplifier P4; The positive pole of described polar capacitor C13 is connected with the output of power amplifier P2, and resistance R21 is then connected with the input of resistance R101 with the tie point of resistance R20.
As shown in Figure 3, described three filter amplification circuit 10 are by triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, triode VT106, triode VT107, operational amplifier P101, operational amplifier P102, operational amplifier P103, operational amplifier P104, resistance R101, resistance R102, resistance R103, resistance R104, resistance R105, resistance R106, resistance R107, resistance R108, resistance R109, resistance R110, resistance R111, resistance R112, resistance R113, resistance R114, resistance R115, resistance R116, resistance R117, resistance R118, resistance R119, resistance R120, resistance R121, electric capacity C101, electric capacity C102, electric capacity C103, electric capacity C104, electric capacity C105, electric capacity C106, electric capacity C107, electric capacity C108, electric capacity C109, electric capacity C110, electric capacity C111, electric capacity C112, diode D101, diode D102, diode D103 forms.
During connection, one end of resistance R101 is as input, the other end is connected with the base stage of triode VT107, electric capacity C101 is in parallel with resistance R101, one end of resistance R103 is connected with the base stage of triode VT107, the other end is connected with the emitter of triode VT107 after resistance R105, one end of resistance R102 is connected with the base stage of triode VT107, the other end is connected with the collector electrode of triode VT107 after resistance R104, the positive pole of electric capacity C104 is connected with the emitter of triode VT107, negative pole is connected with the tie point of resistance R105 with resistance R103, between the base stage that resistance R114 is serially connected in triode VT101 and emitter, one end ground connection of resistance R113, the other end is connected with the base stage of triode VT102, the P pole of diode D101 is connected with the base stage of triode VT103, N pole is connected with the collector electrode of triode VT107 after electric capacity C103, the P pole of diode D103 is connected with the N pole of diode D101 after diode D102, N pole is connected with the base stage of triode VT106, one end of resistance R111 is connected with the base stage of triode VT106, the other end is connected with the output of operational amplifier P104, one end ground connection of resistance R112, the other end is connected with the emitter of triode VT104, the minus earth of electric capacity C105, positive pole is connected with the positive pole of electric capacity C104 after resistance R106, one end of resistance R108 is connected with the positive pole of electric capacity C105, the other end is connected with the negative input end of operational amplifier P101, one end of resistance R107 is connected with the positive pole of electric capacity C105, the other end is connected with the output of operational amplifier P101, between the negative input end being serially connected in operational amplifier P101 of electric capacity C106 and output, the minus earth of electric capacity C108, positive pole is connected with the positive input terminal of operational amplifier P102, the negative pole of electric capacity C107 is connected with the output of operational amplifier P101 after resistance R109, positive pole is connected with the negative input end of operational amplifier P102, one end of resistance R110 is connected with the negative pole of electric capacity C107, the other end is connected with the positive pole of electric capacity C108, the negative pole of electric capacity C102 is connected with the base stage of triode VT107, positive pole is connected with the emitter of triode VT104 after resistance R115, the minus earth of electric capacity C109, positive pole is connected with the tie point of resistance R104 with resistance R102 after resistance R116, one end of resistance R118 is connected with the positive pole of electric capacity C109, the other end is connected with the negative input end of operational amplifier P103, one end of resistance R117 is connected with the positive pole of electric capacity C109, the other end is connected with the positive input terminal of operational amplifier P103, between the negative input end that electric capacity C110 is serially connected in operational amplifier P103 and output, the minus earth of electric capacity C111, positive pole is connected with the negative pole of electric capacity C104 after resistance R119, one end of resistance R121 is connected with the positive pole of electric capacity C111, the other end is connected with the negative input end of operational amplifier P104, one end of resistance R120 is connected with the positive pole of electric capacity C111, the other end is connected with the output of operational amplifier P104, between the negative input end that electric capacity C112 is serially connected in operational amplifier P104 and output, wherein, the negative pole of electric capacity C104 is also connected with the collector electrode of triode VT105 with the collector electrode of triode VT106 simultaneously, the emitter of triode VT101, the collector electrode of triode VT103 is all connected with the output of operational amplifier P103 with the collector electrode of triode VT104, the positive input terminal ground connection of operational amplifier P103, the base stage of triode VT101 is connected with the emitter of triode VT102, the collector electrode of triode VT101 is connected with the base stage of triode VT102, the collector electrode of triode VT102 is connected with the base stage of triode VT103, the emitter of triode VT103 is connected with the base stage of triode VT104, the emitter of triode VT104 is connected with the emitter of triode VT105, the base stage of triode VT105 is connected with the emitter of triode VT106, the positive input terminal ground connection of operational amplifier P101, the positive pole of electric capacity C107 is also connected with the output of operational amplifier P102 and the N pole of diode D101 simultaneously, the positive input terminal ground connection of operational amplifier P104, the emitter of described triode VT104 is connected as output and with the TD pin of driving chip M.
As mentioned above, just the present invention can well be realized.
Claims (3)
1. three filter and amplification type virtual protection emitter-base bandgap grading manifold type raster data model systems, primarily of driving chip M, the drive circuit be connected with driving chip M, the switch power amplifying circuit be connected with driving chip M, and the boostrap circuit to be connected with this switch power amplifying circuit forms, it is characterized in that, between switch power amplifying circuit and driving chip M, be also serially connected with three filter amplification circuit (10) and virtual protection emitter-base bandgap grading manifold type amplifying circuit (20);
Described switch power amplifying circuit is by power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R6 between the output of power amplifier P1 and negative input and electric capacity C3, be serially connected in the resistance R7 between the output of power amplifier P2 and electrode input end and electric capacity C4, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R8, base stage is connected with the output of power amplifier P2 after resistance R9, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R12, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C5 of ground connection, the electric capacity C6 be in parallel with resistance R9, one end is connected with the base stage of triode Q3, the resistance R10 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R11 of the external-4V voltage of the other end, the electric capacity C7 be in parallel with resistance R11, N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P, and positive pole is connected with the INP pin of driving chip M, negative pole after being connected with the emitter of triode Q2 again the polar capacitor C8 of ground connection form, the output of described power amplifier P3 is then connected with the VCC pin of driving chip M,
Described boostrap circuit is then by field effect transistor MOS, one end is connected with the source electrode of field effect transistor MOS, the resistance R5 of other end ground connection, the polar capacitor C1 that negative pole is connected with the grid of field effect transistor MOS, positive pole is connected with the drain electrode of field effect transistor MOS after resistance R1, the resistance R2 be in parallel with polar capacitor C1, the polar capacitor C2 that positive pole is connected with the positive pole of polar capacitor C1, negative pole is connected with the source electrode of field effect transistor MOS, and one end is connected with the positive pole of polar capacitor C2, the resistance R4 of other end ground connection forms; The drain electrode of described field effect transistor MOS is connected with the electrode input end of power amplifier P1, and this drain electrode also simultaneously external+12V voltage, the source electrode of field effect transistor MOS is then connected with the electrode input end of power amplifier P2 with the negative input of power amplifier P1 respectively, the negative input then ground connection of power amplifier P2;
Described three filter amplification circuit (10) are by triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, triode VT106, triode VT107, operational amplifier P101, operational amplifier P102, operational amplifier P103, operational amplifier P104, one end is as input, the resistance R101 that the other end is connected with the base stage of triode VT107, the electric capacity C101 in parallel with resistance R101, one end is connected with the base stage of triode VT107, the resistance R103 that the other end is connected with the emitter of triode VT107 after resistance R105, one end is connected with the base stage of triode VT107, the resistance R102 that the other end is connected with the collector electrode of triode VT107 after resistance R104, positive pole is connected with the emitter of triode VT107, the electric capacity C104 that negative pole is connected with the tie point of resistance R105 with resistance R103, be serially connected in the resistance R114 between the base stage of triode VT101 and emitter, one end ground connection, the resistance R113 that the other end is connected with the base stage of triode VT102, P pole is connected with the base stage of triode VT103, the diode D101 that N pole is connected with the collector electrode of triode VT107 after electric capacity C103, P pole is connected with the N pole of diode D101 after diode D102, the diode D103 that N pole is connected with the base stage of triode VT106, one end is connected with the base stage of triode VT106, the resistance R111 that the other end is connected with the output of operational amplifier P104, one end ground connection, the resistance R112 that the other end is connected with the emitter of triode VT104, minus earth, the electric capacity C105 that positive pole is connected with the positive pole of electric capacity C104 after resistance R106, one end is connected with the positive pole of electric capacity C105, the resistance R108 that the other end is connected with the negative input end of operational amplifier P101, one end is connected with the positive pole of electric capacity C105, the resistance R107 that the other end is connected with the output of operational amplifier P101, be serially connected in the electric capacity C106 between the negative input end of operational amplifier P101 and output, minus earth, the electric capacity C108 that positive pole is connected with the positive input terminal of operational amplifier P102, negative pole is connected with the output of operational amplifier P101 after resistance R109, the electric capacity C107 that positive pole is connected with the negative input end of operational amplifier P102, one end is connected with the negative pole of electric capacity C107, the resistance R110 that the other end is connected with the positive pole of electric capacity C108, negative pole is connected with the base stage of triode VT107, the electric capacity C102 that positive pole is connected with the emitter of triode VT104 after resistance R115, minus earth, the electric capacity C109 that positive pole is connected with the tie point of resistance R104 with resistance R102 after resistance R116, one end is connected with the positive pole of electric capacity C109, the resistance R118 that the other end is connected with the negative input end of operational amplifier P103, one end is connected with the positive pole of electric capacity C109, the resistance R117 that the other end is connected with the positive input terminal of operational amplifier P103, be serially connected in the electric capacity C110 between the negative input end of operational amplifier P103 and output, minus earth, the electric capacity C111 that positive pole is connected with the negative pole of electric capacity C104 after resistance R119, one end is connected with the positive pole of electric capacity C111, the resistance R121 that the other end is connected with the negative input end of operational amplifier P104, one end is connected with the positive pole of electric capacity C111, the resistance R120 that the other end is connected with the output of operational amplifier P104, and the electric capacity C112 be serially connected between the negative input end of operational amplifier P104 and output forms, wherein, the negative pole of electric capacity C104 is also connected with the collector electrode of triode VT105 with the collector electrode of triode VT106 simultaneously, the emitter of triode VT101, the collector electrode of triode VT103 is all connected with the output of operational amplifier P103 with the collector electrode of triode VT104, the positive input terminal ground connection of operational amplifier P103, the base stage of triode VT101 is connected with the emitter of triode VT102, the collector electrode of triode VT101 is connected with the base stage of triode VT102, the collector electrode of triode VT102 is connected with the base stage of triode VT103, the emitter of triode VT103 is connected with the base stage of triode VT104, the emitter of triode VT104 is connected with the emitter of triode VT105, the base stage of triode VT105 is connected with the emitter of triode VT106, the positive input terminal ground connection of operational amplifier P101, the positive pole of electric capacity C107 is also connected with the output of operational amplifier P102 and the N pole of diode D101 simultaneously, the positive input terminal ground connection of operational amplifier P104, the emitter of described triode VT104 is connected as output and with the TD pin of driving chip M,
Described virtual protection emitter-base bandgap grading manifold type amplifying circuit (20) is primarily of triode Q5, triode Q6, power amplifier P4, power amplifier P5, be serially connected in the resistance R15 between the negative input of power amplifier P4 and output, be serially connected in the polar capacitor C15 between the electrode input end of power amplifier P5 and output, be serially connected in the resistance R14 between the electrode input end of power amplifier P4 and the collector electrode of triode Q5, be serially connected in the resistance R16 between the collector electrode of triode Q5 and the base stage of triode Q6, the electric capacity C14 be in parallel with resistance R16, negative pole is connected with the electrode input end of power amplifier P4, the polar capacitor C13 that positive pole is connected with the emitter of triode Q5 after resistance R17, be serially connected in the resistance R18 between the base stage of triode Q6 and the positive pole of polar capacitor C13, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C16 that voltage stabilizing didoe D3 is connected with the output of power amplifier P4 after resistance R19, P pole is connected with the output of power amplifier P5, the diode D4 that N pole is connected with the tie point of resistance R19 with voltage stabilizing didoe D3 after resistance R20 through resistance R21, and P pole is connected with the negative pole of electric capacity C16, the voltage stabilizing didoe D5 that N pole is connected with the tie point of resistance R21 with diode D4 forms, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C13, and its emitter is connected with the emitter of triode Q6, and its collector electrode is connected with the negative input of power amplifier P4, the collector electrode of triode Q6 is connected with the negative input of power amplifier P5, and the electrode input end of power amplifier P5 is connected with the output of power amplifier P4, the positive pole of described polar capacitor C13 is connected with the output of power amplifier P2, and resistance R21 is then connected with the input of resistance R101 with the tie point of resistance R20.
2. three filter and amplification type virtual protection emitter-base bandgap grading manifold type raster data model systems according to claim 1, it is characterized in that, described drive circuit is by transformer T, be serially connected with the diode D2 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C9 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R13 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C10 and electric capacity C11 the transistor Q4 of ground connection and emitter also ground connection form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C11 with electric capacity C10, and its non-same polarity is then connected with the emitter of transistor Q4; Meanwhile, the emitter of transistor Q4 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
3. three filter and amplification type virtual protection emitter-base bandgap grading manifold type raster data model systems according to claim 2, it is characterized in that, described driving chip M is LTC4440A integrated chip.
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| US20090290397A1 (en) * | 2008-05-21 | 2009-11-26 | Guichao Hua | Primary Sampling Current Controlled Synchronous Rectifying Drive Circuit |
| CN103431846A (en) * | 2013-09-18 | 2013-12-11 | 天津工业大学 | Intelligent sleep monitoring system |
| CN104485804A (en) * | 2014-11-28 | 2015-04-01 | 成都措普科技有限公司 | Novel logic protection emitter coupling type gate driving system |
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| US20090290397A1 (en) * | 2008-05-21 | 2009-11-26 | Guichao Hua | Primary Sampling Current Controlled Synchronous Rectifying Drive Circuit |
| CN103431846A (en) * | 2013-09-18 | 2013-12-11 | 天津工业大学 | Intelligent sleep monitoring system |
| CN104485804A (en) * | 2014-11-28 | 2015-04-01 | 成都措普科技有限公司 | Novel logic protection emitter coupling type gate driving system |
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