CN104936345A - Logic protection amplification type self-locking optical excitation grid combined protection driving system - Google Patents
Logic protection amplification type self-locking optical excitation grid combined protection driving system Download PDFInfo
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Abstract
The invention discloses a logic protection amplification type self-locking optical excitation grid combined protection driving system. The logic protection amplification type self-locking optical excitation grid combined protection driving system mainly consists of a driving chip M, a driving circuit, a self-locking optical excitation circuit and a combined protection circuit which is connected with the driving circuit, wherein a logic protection amplification circuit is connected between the output end of a NOR gate IC3 and the INP pin of the driving chip M in series. The power supply of a circuit can be automatically disconnected when the running current or voltage of the circuit exceeds a preset value, the circuit is prevented from being shocked and damaged by the current or voltage, the service life of the circuit is better prolonged, related functions of the driving chip M can be automatically excited according to external light conditions further, the addition of extra starting devices is not needed, and thus the power consumption of the driving system is relatively low.
Description
Technical field
The present invention relates to a kind of LED drive circuit, specifically refer to virtual protection amplifying type self-locking optical excitation gate combination protection type drive system.
Background technology
At present, because LED has, energy consumption is low, the feature such as long service life and safety and environmental protection, and it has become one of main product of people's life lighting.Because LED is different from traditional incandescent lamp, therefore its needs are driven by special drive circuit.But, the widely used gate driver circuit of current people due to the irrationality of its project organization, defects such as result in current gate driver circuit and have that energy consumption is higher, current noise comparatively large and start-up time is longer.
Summary of the invention
The object of the invention is to the defect that energy consumption is higher, current noise is comparatively large and start-up time is longer overcoming the existence of current gate driver circuit; a kind of reasonable in design is provided; can effectively reduce energy consumption and current noise, obviously shorten the virtual protection amplifying type self-locking optical excitation gate combination protection type drive system of start-up time.
Object of the present invention is achieved through the following technical solutions:
Virtual protection amplifying type self-locking optical excitation gate combination protection type drive system, primarily of driving chip M, the drive circuit be connected with this driving chip M, and the self-locking optical excitation circuit be connected with this driving chip M forms; Described self-locking optical excitation circuit is by NOR gate IC1, NOR gate IC2, NOR gate IC3, one end is connected with the VCC pin of driving chip M, the photocell CDS of other end ground connection after potentiometer R2, the resistance R1 that one end is connected with the VCC pin of driving chip M, the negative input of other end AND OR NOT gate IC2 is connected, and the electric capacity C1 be serially connected between the electrode input end of NOR gate IC3 and output forms; The electrode input end of described NOR gate IC1 is connected with the tie point of potentiometer R2 with photocell CDS, and the output of its negative input AND OR NOT gate IC2 is connected, and the electrode input end of its output then AND OR NOT gate IC2 is connected; The negative input of the output AND OR NOT gate IC3 of described NOR gate IC2 is connected.Meanwhile, between the output and the INP pin of driving chip M of NOR gate IC3, be serially connected with virtual protection amplifying circuit, drive circuit is also provided with composite type protective circuit, this virtual protection amplifying circuit is primarily of power amplifier P1, power amplifier P2, NAND gate IC4, NAND gate IC5, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C5 that positive pole is connected with the negative input of NAND gate IC5 after resistance R7, one end is connected with the negative input of NAND gate IC4, the resistance R4 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R5 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC4, the resistance R6 that the other end is connected with the negative input of power amplifier P2, be serially connected in the polar capacitor C6 between the electrode input end of power amplifier P2 and output, positive pole is connected with the output of NAND gate IC5, negative pole is in turn through electric capacity C7 that voltage stabilizing didoe D2 is connected with the output of power amplifier P1 after resistance R8, P pole is connected with the output of power amplifier P2, N pole is in turn through diode D3 that resistance R10 is connected with the tie point of resistance R8 with voltage stabilizing didoe D2 after resistance R9, and N pole is connected with the negative pole of electric capacity C7, the voltage stabilizing didoe D4 that P pole is connected with the tie point of resistance R10 with diode D3 forms, the electrode input end of described NAND gate IC4 is connected with the negative input of power amplifier P1, the electrode input end of the output NAND gate IC5 of power amplifier P2 is connected, and its electrode input end is then connected with the output of power amplifier P1, the output of the positive pole AND OR NOT gate IC3 of described polar capacitor C5 is connected, and resistance R10 is then connected with the INP pin of driving chip M with the tie point of resistance R9.
Described composite type protective circuit is by incoming line, voltage stabilizing integrated chip Q101, operational amplifier P101, operational amplifier P102, triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, triode VT106, minus earth, the electric capacity C101 that positive pole is connected with incoming line, minus earth, the electric capacity C102 that positive pole is connected with the OUT pin of voltage stabilizing integrated chip Q101, one end is connected with the positive pole of electric capacity C102, the resistance R101 that the other end is connected with the negative input end of operational amplifier P101, N pole is connected with the positive pole of electric capacity C102, the diode D101 that negative pole is connected with the collector electrode of triode VT101, the relay K 101 in parallel with diode D101, one end is connected with the P pole of diode D101, the resistance R103 of other end ground connection after resistance R102, one end is connected with the base stage of triode VT101, the resistance R104 that the other end is connected with the output of operational amplifier P101, minus earth, the electric capacity C103 that positive pole is connected with the positive input terminal of operational amplifier P101, one end ground connection, the slide rheostat RP101 that the other end is connected with the positive pole of electric capacity C103, minus earth, the electric capacity C104 that positive pole is connected with the positive pole of electric capacity C102 after resistance R109, P pole is connected with the positive input terminal of operational amplifier P102, the voltage stabilizing didoe D102 that N pole is connected with the positive pole of electric capacity C104, one end is connected with the positive pole of electric capacity C102, the resistance R108 that the other end is connected with the negative input end of operational amplifier P102, one end ground connection, the resistance R107 that the other end is connected with the negative input end of operational amplifier P102, one end is connected with the output of operational amplifier P102, the resistance R106 that the other end is connected with the base stage of triode VT102, one end is connected with the N pole of diode D101, the resistance R105 that the other end is connected with the base stage of triode VT103, one end is connected with the emitter of triode VT104, the resistance R110 that the other end is connected with the collector electrode of triode VT105, and one end is connected with the base stage of triode VT104, the other end is connected with the emitter of triode VT106, the slide rheostat RP102 that sliding end is connected with the base stage of triode VT105 forms, wherein, the GND pin ground connection of voltage stabilizing integrated chip Q101, its IN pin is connected with the positive pole of electric capacity C101, the negative input end of operational amplifier P102 is connected with the collector electrode of triode VT102, the emitter of triode VT102 is connected with the emitter of the base stage of triode VT103 with the base stage of triode VT106 and triode VT101 simultaneously, the N pole of diode D101 is also connected with the collector electrode of triode VT103 with the collector electrode of triode VT104, the base stage of triode VT104 is connected with the emitter of triode VT105 with the emitter of triode VT103 simultaneously, the emitter of triode VT104 is connected with the collector electrode of triode VT106, the grounded emitter of triode VT106, the normally-closed contact switch S 101 of described relay K 101 is arranged on incoming line.
Described drive circuit is by transformer T, be serially connected with the diode D1 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C2 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R3 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C3 and electric capacity C4 ground connection and the transistor Q1 of grounded emitter form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1; Meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
For guaranteeing result of use, described driving chip M is LTC4440A integrated chip.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) the present invention can excite the correlation function of driving chip M automatically according to outside illumination condition, and without the need to increasing extra starting drive, therefore its power consumption is lower.
(2) be only 1/4 of conventional gate drive circuit start-up time start-up time of the present invention, therefore its start-up time is extremely short.
(3) the present invention effectively can avoid external electromagnetic interference, can reduce current noise significantly.
(4) the present invention is provided with composite type protective circuit, can power by automatic shutoff circuit, avoid circuit by curtage impact failure, better extend the useful life of circuit when the running current of circuit or voltage exceed preset value.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present invention.
Fig. 2 is virtual protection amplification circuit structure schematic diagram of the present invention.
Fig. 3 is the circuit diagram of composite type amplifying circuit of the present invention.
Description of reference numerals:
10, composite type amplifying circuit; 20, virtual protection amplifying circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1; the present invention is primarily of driving chip M; the drive circuit be connected with this driving chip M; the self-locking optical excitation circuit be connected with driving chip M; be serially connected in the virtual protection amplifying circuit 20 between driving chip M and self-locking optical excitation circuit, and the composite type protective circuit 10 that drive circuit is arranged forms.
This self-locking optical excitation circuit is made up of photocell CDS, NOR gate IC1, NOR gate IC2, NOR gate IC3, resistance R1, potentiometer R2 and electric capacity C1.Wherein, photocell CDS is used for producing electric energy under illumination condition, and its one end is connected with the VCC pin of driving chip M, and its other end is ground connection after potentiometer R2 then.
Meanwhile, one end of resistance R1 is also connected with the VCC pin of driving chip M, and the negative input of its other end then AND OR NOT gate IC2 is connected.Electric capacity C1 is serially connected between the electrode input end of NOR gate IC3 and output, and for guaranteeing that NOR gate IC3 can normally run, the positive pole of this electric capacity C1 needs the electrode input end of AND OR NOT gate IC3 to be connected, and the output of its negative pole then AND OR NOT gate IC3 connects.
The electrode input end of described NOR gate IC1 is connected with the tie point of potentiometer R2 with photocell CDS, the output of its negative input AND OR NOT gate IC2 is connected, the electrode input end of its output then AND OR NOT gate IC2 is connected, and namely forms one between this NOR gate IC1 and NOR gate IC2 and intersects gate circuit.The negative input of the output AND OR NOT gate IC3 of described NOR gate IC2 is connected.
Described drive circuit is then made up of transformer T, diode D1, electric capacity C2, resistance R3, electric capacity C3, electric capacity C4 and transistor Q1.During connection, the P pole of diode D1 is connected with the VCC pin of driving chip M, and its N pole is then connected with the BOOST pin of driving chip M.The positive pole of electric capacity C2 is connected with the BOOST pin of driving chip M, and its negative pole is then connected with the TG pin of driving chip M.
Resistance R3 is divider resistance, and it is serially connected with between the TG pin of driving chip M and TS pin.The base stage of transistor Q1 is then connected with the TG pin of driving chip M, and its collector electrode is ground connection after electric capacity C3 and electric capacity C4 in turn, its grounded emitter.Meanwhile, the collector electrode of this transistor Q1 also needs the direct voltage of external+6V, to guarantee that transistor Q1 has enough bias voltages to drive himself conducting.
Described transformer T exports to outside field effect transistor after being used for that+the 6V of outside direct voltage is carried out transformation process.The Same Name of Ends of the primary coil of this transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1.Meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
The Same Name of Ends of the secondary coil of transformer T, tap Y1, tap Y2 together with the non-same polarity of secondary coil as output of the present invention.According to the situation of reality, user can only select any one or several port of these four outputs to use.
The structure of described virtual protection amplifying circuit as shown in Figure 2, it is primarily of power amplifier P1, power amplifier P2, NAND gate IC4, NAND gate IC5, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C5 that positive pole is connected with the negative input of NAND gate IC5 after resistance R7, one end is connected with the negative input of NAND gate IC4, the resistance R4 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R5 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC4, the resistance R6 that the other end is connected with the negative input of power amplifier P2, be serially connected in the polar capacitor C6 between the electrode input end of power amplifier P2 and output, positive pole is connected with the output of NAND gate IC5, negative pole is in turn through electric capacity C7 that voltage stabilizing didoe D2 is connected with the output of power amplifier P1 after resistance R8, P pole is connected with the output of power amplifier P2, N pole is in turn through diode D3 that resistance R10 is connected with the tie point of resistance R8 with voltage stabilizing didoe D2 after resistance R9, and N pole is connected with the negative pole of electric capacity C7, the voltage stabilizing didoe D4 that P pole is connected with the tie point of resistance R10 with diode D3 forms.
Meanwhile, the electrode input end of described NAND gate IC4 is connected with the negative input of power amplifier P1; The electrode input end of the output NAND gate IC5 of power amplifier P2 is connected, and its electrode input end is then connected with the output of power amplifier P1.
During connection, the output of the positive pole AND OR NOT gate IC3 of described polar capacitor C5 is connected, and resistance R10 is then connected with the INP pin of driving chip M with the tie point of resistance R9.
As shown in Figure 3, described composite type protective circuit 10 is by incoming line, voltage stabilizing integrated chip Q101, operational amplifier P101, operational amplifier P102, triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, triode VT106, resistance R101, resistance R102, resistance R103, resistance R104, resistance R105, resistance R106, resistance R107, resistance R108, resistance R109, resistance R110, electric capacity C101, electric capacity C102, electric capacity C103, electric capacity C104, diode D101, voltage stabilizing didoe D102, slide rheostat RP101, slide rheostat RP102 forms, during connection, the minus earth of electric capacity C101, positive pole is connected with incoming line, the minus earth of electric capacity C102, positive pole is connected with the OUT pin of voltage stabilizing integrated chip Q101, one end of resistance R101 is connected with the positive pole of electric capacity C102, the other end is connected with the negative input end of operational amplifier P101, the N pole of diode D101 is connected with the positive pole of electric capacity C102, negative pole is connected with the collector electrode of triode VT101, relay K 101 is in parallel with diode D101, one end of resistance R103 is connected with the P pole of diode D101, the other end is ground connection after resistance R102, one end of resistance R104 is connected with the base stage of triode VT101, the other end is connected with the output of operational amplifier P101, the minus earth of electric capacity C103, positive pole is connected with the positive input terminal of operational amplifier P101, one end ground connection of slide rheostat RP101, the other end is connected with the positive pole of electric capacity C103, the minus earth of electric capacity C104, positive pole is connected with the positive pole of electric capacity C102 after resistance R109, the P pole of voltage stabilizing didoe D102 is connected with the positive input terminal of operational amplifier P102, N pole is connected with the positive pole of electric capacity C104, one end of resistance R108 is connected with the positive pole of electric capacity C102, the other end is connected with the negative input end of operational amplifier P102, one end ground connection of resistance R107, the other end is connected with the negative input end of operational amplifier P102, one end of resistance R106 is connected with the output of operational amplifier P102, the other end is connected with the base stage of triode VT102, one end of resistance R105 is connected with the N pole of diode D101, the other end is connected with the base stage of triode VT103, one end of resistance R110 is connected with the emitter of triode VT104, the other end is connected with the collector electrode of triode VT105, one end of slide rheostat RP102 is connected with the base stage of triode VT104, the other end is connected with the emitter of triode VT106, sliding end is connected with the base stage of triode VT105, wherein, the GND pin ground connection of voltage stabilizing integrated chip Q101, its IN pin is connected with the positive pole of electric capacity C101, the negative input end of operational amplifier P102 is connected with the collector electrode of triode VT102, the emitter of triode VT102 is connected with the emitter of the base stage of triode VT103 with the base stage of triode VT106 and triode VT101 simultaneously, the N pole of diode D101 is also connected with the collector electrode of triode VT103 with the collector electrode of triode VT104, the base stage of triode VT104 is connected with the emitter of triode VT105 with the emitter of triode VT103 simultaneously, the emitter of triode VT104 is connected with the collector electrode of triode VT106, the grounded emitter of triode VT106, the normally-closed contact switch S 101 of described relay K 101 is arranged on incoming line.When the voltage of circuit or electric current exceed preset value, relay K 101 electric, thus normally-closed contact switch S 101 is disconnected, makes whole down circuitry.The output of incoming line is connected with the P pole of diode D1, and input voltage is 12V.
For guaranteeing result of use, the high-frequency N-channel MOS FET grid drive chip that this driving chip M preferentially adopts Linear Techn Inc. to produce, namely LTC4440A integrated chip realizes.The feature of this driving chip M is can with the input voltage work up to 80V, and can up to can continuous operation during 100V transient state.
As mentioned above, just the present invention can well be realized.
Claims (3)
1. virtual protection amplifying type self-locking optical excitation gate combination protection type drive system, primarily of driving chip M, the drive circuit be connected with this driving chip M, and the self-locking optical excitation circuit be connected with this driving chip M forms, described self-locking optical excitation circuit is by NOR gate IC1, NOR gate IC2, NOR gate IC3, one end is connected with the VCC pin of driving chip M, the photocell CDS of other end ground connection after potentiometer R2, the resistance R1 that one end is connected with the VCC pin of driving chip M, the negative input of other end AND OR NOT gate IC2 is connected, and the electric capacity C1 be serially connected between the electrode input end of NOR gate IC3 and output forms, the electrode input end of described NOR gate IC1 is connected with the tie point of potentiometer R2 with photocell CDS, and the output of its negative input AND OR NOT gate IC2 is connected, and the electrode input end of its output then AND OR NOT gate IC2 is connected, the negative input of the output AND OR NOT gate IC3 of described NOR gate IC2 is connected, it is characterized in that, between the output and the INP pin of driving chip M of NOR gate IC3, be serially connected with virtual protection amplifying circuit (20), drive circuit be also provided with composite type protective circuit (10), this virtual protection amplifying circuit (20) is primarily of power amplifier P1, power amplifier P2, NAND gate IC4, NAND gate IC5, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C5 that positive pole is connected with the negative input of NAND gate IC5 after resistance R7, one end is connected with the negative input of NAND gate IC4, the resistance R4 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R5 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC4, the resistance R6 that the other end is connected with the negative input of power amplifier P2, be serially connected in the polar capacitor C6 between the electrode input end of power amplifier P2 and output, positive pole is connected with the output of NAND gate IC5, negative pole is in turn through electric capacity C7 that voltage stabilizing didoe D2 is connected with the output of power amplifier P1 after resistance R8, P pole is connected with the output of power amplifier P2, N pole is in turn through diode D3 that resistance R10 is connected with the tie point of resistance R8 with voltage stabilizing didoe D2 after resistance R9, and N pole is connected with the negative pole of electric capacity C7, the voltage stabilizing didoe D4 that P pole is connected with the tie point of resistance R10 with diode D3 forms, the electrode input end of described NAND gate IC4 is connected with the negative input of power amplifier P1, the electrode input end of the output NAND gate IC5 of power amplifier P2 is connected, and its electrode input end is then connected with the output of power amplifier P1, the output of the positive pole AND OR NOT gate IC3 of described polar capacitor C5 is connected, and resistance R10 is then connected with the INP pin of driving chip M with the tie point of resistance R9,
Described composite type protective circuit (10) is by incoming line, voltage stabilizing integrated chip Q101, operational amplifier P101, operational amplifier P102, triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, triode VT106, minus earth, the electric capacity C101 that positive pole is connected with incoming line, minus earth, the electric capacity C102 that positive pole is connected with the OUT pin of voltage stabilizing integrated chip Q101, one end is connected with the positive pole of electric capacity C102, the resistance R101 that the other end is connected with the negative input end of operational amplifier P101, N pole is connected with the positive pole of electric capacity C102, the diode D101 that negative pole is connected with the collector electrode of triode VT101, the relay K 101 in parallel with diode D101, one end is connected with the P pole of diode D101, the resistance R103 of other end ground connection after resistance R102, one end is connected with the base stage of triode VT101, the resistance R104 that the other end is connected with the output of operational amplifier P101, minus earth, the electric capacity C103 that positive pole is connected with the positive input terminal of operational amplifier P101, one end ground connection, the slide rheostat RP101 that the other end is connected with the positive pole of electric capacity C103, minus earth, the electric capacity C104 that positive pole is connected with the positive pole of electric capacity C102 after resistance R109, P pole is connected with the positive input terminal of operational amplifier P102, the voltage stabilizing didoe D102 that N pole is connected with the positive pole of electric capacity C104, one end is connected with the positive pole of electric capacity C102, the resistance R108 that the other end is connected with the negative input end of operational amplifier P102, one end ground connection, the resistance R107 that the other end is connected with the negative input end of operational amplifier P102, one end is connected with the output of operational amplifier P102, the resistance R106 that the other end is connected with the base stage of triode VT102, one end is connected with the N pole of diode D101, the resistance R105 that the other end is connected with the base stage of triode VT103, one end is connected with the emitter of triode VT104, the resistance R110 that the other end is connected with the collector electrode of triode VT105, and one end is connected with the base stage of triode VT104, the other end is connected with the emitter of triode VT106, the slide rheostat RP102 that sliding end is connected with the base stage of triode VT105 forms, wherein, the GND pin ground connection of voltage stabilizing integrated chip Q101, its IN pin is connected with the positive pole of electric capacity C101, the negative input end of operational amplifier P102 is connected with the collector electrode of triode VT102, the emitter of triode VT102 is connected with the emitter of the base stage of triode VT103 with the base stage of triode VT106 and triode VT101 simultaneously, the N pole of diode D101 is also connected with the collector electrode of triode VT103 with the collector electrode of triode VT104, the base stage of triode VT104 is connected with the emitter of triode VT105 with the emitter of triode VT103 simultaneously, the emitter of triode VT104 is connected with the collector electrode of triode VT106, the grounded emitter of triode VT106, the normally-closed contact switch S 101 of described relay K 101 is arranged on incoming line.
2. virtual protection amplifying type self-locking optical excitation gate combination protection type drive system according to claim 1, it is characterized in that, described drive circuit is by transformer T, be serially connected with the diode D1 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C2 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R3 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C3 and electric capacity C4 ground connection and the transistor Q1 of grounded emitter form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1; Meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
3. virtual protection amplifying type self-locking optical excitation gate combination protection type drive system according to claim 1 and 2, it is characterized in that, described driving chip M is LTC4440A integrated chip.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510316108.6A CN104936345A (en) | 2014-11-27 | 2015-06-10 | Logic protection amplification type self-locking optical excitation grid combined protection driving system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410699596.9A CN104470103A (en) | 2014-11-27 | 2014-11-27 | Logic protection amplification type self-locking optical excitation grid drive system |
| CN2014106995969 | 2014-11-27 | ||
| CN201510316108.6A CN104936345A (en) | 2014-11-27 | 2015-06-10 | Logic protection amplification type self-locking optical excitation grid combined protection driving system |
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