CN104936348A - Boosting dual-filter type gate driving system for blue light-emitting diode (LED) lamp - Google Patents
Boosting dual-filter type gate driving system for blue light-emitting diode (LED) lamp Download PDFInfo
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- CN104936348A CN104936348A CN201510319097.7A CN201510319097A CN104936348A CN 104936348 A CN104936348 A CN 104936348A CN 201510319097 A CN201510319097 A CN 201510319097A CN 104936348 A CN104936348 A CN 104936348A
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Abstract
The invention discloses a boosting dual-filter type gate driving system for a blue light-emitting diode (LED) lamp. The gate driving system mainly comprises a transformer T, a driving chip M, a switching current source, a diode D1, a capacitor C3, a resistor R7, a transistor Q4 and the like. By the gate driving system, noise wave can be filtered better, meanwhile, circuit voltage can also be increased, the precision and the stability of circuit judgment and running are enhanced, the gate driving system has the functions of short circuit protection, overvoltage protection and open circuit protection and is low in power consumption, and the starting time of the gate driving system is only one fourth of the traditional gate driving circuit.
Description
Technical field
The present invention relates to a kind of LED drive circuit, specifically refer to the two filtering type blue LED lamp raster data model system of boosting.
Background technology
At present, because LED has, energy consumption is low, the feature such as long service life and safety and environmental protection, and it has become one of main product of people's life lighting.Because LED is different from traditional incandescent lamp, therefore its needs are driven by special drive circuit.But, the widely used gate driver circuit of current people due to the irrationality of its project organization, defects such as result in current gate driver circuit and have that energy consumption is higher, current noise comparatively large and start-up time is longer.
Summary of the invention
The object of the invention is to the defect that energy consumption is higher, current noise is comparatively large and start-up time is longer overcoming the existence of current gate driver circuit, a kind of reasonable in design is provided, can effectively reduce energy consumption and current noise, the two filtering type blue LED lamp raster data model system of the boosting obviously shortening start-up time.
Object of the present invention is achieved through the following technical solutions:
The two filtering type blue LED lamp raster data model system of boosting, primarily of transformer T, driving chip M, be serially connected with the switched current source between the VCC pin of driving chip M and INP pin, be serially connected with the diode D1 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C3 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R7 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode is ground connection after electric capacity C4 and electric capacity C5 in turn, and the transistor Q4 of grounded emitter forms, the Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C5 with electric capacity C4, ground connection after its non-same polarity is then connected with the emitter of transistor Q4, meanwhile, the emitter of transistor Q4 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.Meanwhile, the present invention is also also serially connected with the beam excitation formula logic amplifying circuit and two filter circuit that boosts that are arranged in series between the TD pin of driving chip M and the emitter of transistor Q4.
The two filter circuit of described boosting is by operational amplifier P101, operational amplifier P102, operational amplifier P103, triode VT101, triode VT102, triode VT103, P pole is as input, the diode D101 that N pole is connected with triode VT101, positive pole is connected with the N pole of diode D101, the electric capacity C101 that negative pole is connected with the base stage of triode VT101 after resistance R102, positive pole is connected with the base stage of triode VT101, the electric capacity C102 that negative pole is connected with the collector electrode of triode VT102, one end is connected with the N pole of diode D101, the inductance L 101 that the other end is connected with the negative pole of electric capacity C102, one end is connected with the collector electrode of triode VT101, the resistance R101 that the other end is connected with the base stage of triode VT102, minus earth, the electric capacity C103 that positive pole is connected with the negative pole of electric capacity C101 after resistance R104, P pole is connected with the collector electrode of triode VT103, the diode D102 that N pole is connected with the base stage of triode VT101, N pole is connected with the base stage of triode VT103, the voltage stabilizing didoe D103 that P pole is connected with the positive pole of electric capacity C103 after resistance R103, negative pole is connected with the output of operational amplifier P101, the electric capacity C108 that positive pole is connected with the positive pole of electric capacity C103 after resistance R105, be serially connected in the resistance R106 between the base stage of triode VT103 and emitter, negative pole is connected with the negative pole of electric capacity C108 after resistance R107, the electric capacity C106 that positive pole is connected with the output of operational amplifier P102, minus earth, the electric capacity C107 that positive pole is connected with the negative pole of electric capacity C106 after resistance R108, one end is connected with the emitter of triode VT103, the resistance R109 that the other end is connected with the positive pole of electric capacity C106, minus earth, the electric capacity C104 that positive pole is connected with the negative pole of electric capacity C102 after resistance R110, positive pole is connected with the negative input end of operational amplifier P103, the electric capacity C105 that negative pole is connected with the output of operational amplifier P103, one end is connected with the positive pole of electric capacity C104, the resistance R112 that the other end is connected with the negative pole of electric capacity C105, one end is connected with the positive pole of electric capacity C104, the resistance R111 that the other end is connected with the positive pole of electric capacity C105, and one end is connected with the negative pole of electric capacity C105, the other end forms with the resistance R113 that the negative pole of electric capacity C102 is connected with the positive pole of electric capacity C106 simultaneously, wherein, the P pole of voltage stabilizing didoe D103 is also connected with the negative pole of electric capacity C108 with the emitter of triode VT102 simultaneously, the positive pole of electric capacity C108 is connected with the negative input end of operational amplifier P101, the positive input terminal ground connection of operational amplifier P101, the positive pole of electric capacity C107 is connected with the positive input terminal of operational amplifier P102, the positive pole of electric capacity C106 is also connected with the negative input end of operational amplifier P102, the positive input terminal ground connection of operational amplifier P103, the negative pole of electric capacity C102 is as output and be connected with the emitter of transistor Q4.
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the in-phase end of power amplifier P, the polar capacitor C6 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C6, the resistance R8 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R8, the polar capacitor C8 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R9 that the other end is connected with the in-phase end of power amplifier P, be serially connected in the resistance R10 between the end of oppisite phase of power amplifier P and output, one end is connected with the output of NAND gate IC1, the resistance R11 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C7 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C8, the resistance R12 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the end of oppisite phase of power amplifier P, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P, the in-phase end of power amplifier P is then connected with the TD pin of driving chip M, and the output of NAND gate IC3 is then connected with the P pole of diode D101.
Described switched current source is by transistor Q1, transistor Q2, transistor Q3, DC power supply S, be serially connected in the resistance R1 between the collector electrode of transistor Q1 and the collector electrode of transistor Q2, be serially connected in the RC filter circuit between the emitter of transistor Q1 and the negative pole of DC power supply S, be serially connected in the resistance R2 between the base stage of transistor Q1 and the negative pole of DC power supply S, the resistance R5 in parallel with DC power supply S-phase, be serially connected in the resistance R6 between the emitter of transistor Q3 and the negative pole of DC power supply S, be serially connected in the resistance R4 between the collector electrode of transistor Q3 and the collector electrode of transistor Q2, and positive pole is connected with the collector electrode of transistor Q2, the polar capacitor C2 that negative pole is connected with the negative pole of DC power supply S forms, the base stage of described transistor Q2 is also connected with the collector electrode of transistor Q1, and the base stage of transistor Q3 is then connected with the positive pole of DC power supply S with the emitter of transistor Q2 respectively, the VCC pin of described driving chip M is connected with the positive pole of polar capacitor C2, and the INP pin of driving chip M is then connected with the negative pole of polar capacitor C2.
For guaranteeing result of use, described driving chip M is LTC4440A integrated chip.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) the present invention not only has the function of short-circuit protection, overvoltage protection and open-circuit-protection, and its power consumption is lower, is only 1/4 of conventional gate drive circuit start-up time its start-up time.
(2) the present invention is provided with the switched current source carried, and therefore effectively can avoid external electromagnetic interference, meanwhile, can reduce current noise significantly.
(3) the present invention is provided with the two filter circuit of boosting, can be good at filtering clutter, can also promote circuit voltage simultaneously, improve accuracy and the stability of circuit judges and operation.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present invention.
Fig. 2 is the circuit diagram of the two filter circuit of boosting of the present invention.
Description of reference numerals:
10, the two filter circuit of boosting.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, the present invention is by transistor Q4, transformer T, driving chip M, switched current source, diode D1, electric capacity C3, resistance R7, electric capacity C4, electric capacity C5, and boost two filter circuit 10, and beam excitation formula logic amplifying circuit composition.During connection, switched current source needs to be serially connected with between the VCC pin of driving chip M and INP pin, and diode D1 is serially connected with between the VCC pin of driving chip M and BOOST pin, electric capacity C3 is serially connected with between the BOOST pin of driving chip M and TG pin, and resistance R7 is then serially connected with between the TG pin of driving chip M and TS pin.
The base stage of described transistor Q4 is connected with the TG pin of driving chip M, and its collector electrode is ground connection after electric capacity C4 and electric capacity C5 in turn, its grounded emitter.Meanwhile, the collector electrode of this transistor Q4 also needs the driving voltage of external+6V, to guarantee that transistor Q4 can normally run.
As shown in Figure 2, the two filter circuit 10 of described boosting is by operational amplifier P101, operational amplifier P102, operational amplifier P103, triode VT101, triode VT102, triode VT103, resistance R101, resistance R102, resistance R103, resistance R104, resistance R105, resistance R106, resistance R107, resistance R108, resistance R109, resistance R110, resistance R111, resistance R112, resistance R113, inductance L 101, electric capacity C101, electric capacity C102, electric capacity C103, electric capacity C104, electric capacity C105, electric capacity C106, electric capacity C107, electric capacity C108, diode D101, diode D102, voltage stabilizing didoe D103 forms.
During connection, the P pole of diode D101 is as input, N pole is connected with triode VT101, the positive pole of electric capacity C101 is connected with the N pole of diode D101, negative pole is connected with the base stage of triode VT101 after resistance R102, the positive pole of electric capacity C102 is connected with the base stage of triode VT101, negative pole is connected with the collector electrode of triode VT102, one end of inductance L 101 is connected with the N pole of diode D101, the other end is connected with the negative pole of electric capacity C102, one end of resistance R101 is connected with the collector electrode of triode VT101, the other end is connected with the base stage of triode VT102, the minus earth of electric capacity C103, positive pole is connected with the negative pole of electric capacity C101 after resistance R104, the P pole of diode D102 is connected with the collector electrode of triode VT103, N pole is connected with the base stage of triode VT101, the N pole of voltage stabilizing didoe D103 is connected with the base stage of triode VT103, P pole is connected with the positive pole of electric capacity C103 after resistance R103, the negative pole of electric capacity C108 is connected with the output of operational amplifier P101, positive pole is connected with the positive pole of electric capacity C103 after resistance R105, between the base stage that resistance R106 is serially connected in triode VT103 and emitter, the negative pole of electric capacity C106 is connected with the negative pole of electric capacity C108 after resistance R107, positive pole is connected with the output of operational amplifier P102, the minus earth of electric capacity C107, positive pole is connected with the negative pole of electric capacity C106 after resistance R108, one end of resistance R109 is connected with the emitter of triode VT103, the other end is connected with the positive pole of electric capacity C106, the minus earth of electric capacity C104, positive pole is connected with the negative pole of electric capacity C102 after resistance R110, the positive pole of electric capacity C105 is connected with the negative input end of operational amplifier P103, negative pole is connected with the output of operational amplifier P103, one end of resistance R112 is connected with the positive pole of electric capacity C104, the other end is connected with the negative pole of electric capacity C105, one end of resistance R111 is connected with the positive pole of electric capacity C104, the other end is connected with the positive pole of electric capacity C105, one end of resistance R113 is connected with the negative pole of electric capacity C105, the other end is connected with the positive pole of electric capacity C106 with the negative pole of electric capacity C102 simultaneously, wherein, the P pole of voltage stabilizing didoe D103 is also connected with the negative pole of electric capacity C108 with the emitter of triode VT102 simultaneously, the positive pole of electric capacity C108 is connected with the negative input end of operational amplifier P101, the positive input terminal ground connection of operational amplifier P101, the positive pole of electric capacity C107 is connected with the positive input terminal of operational amplifier P102, the positive pole of electric capacity C106 is also connected with the negative input end of operational amplifier P102, the positive input terminal ground connection of operational amplifier P103, the negative pole of electric capacity C102 is as output and be connected with the emitter of transistor Q4.
Wherein, described beam excitation formula logic amplifying circuit is primarily of power amplifier P, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the in-phase end of power amplifier P, the polar capacitor C6 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C6, the resistance R8 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R8, the polar capacitor C8 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R9 that the other end is connected with the in-phase end of power amplifier P, be serially connected in the resistance R10 between the end of oppisite phase of power amplifier P and output, one end is connected with the output of NAND gate IC1, the resistance R11 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C7 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C8, the resistance R12 that the other end is connected with the negative input of NAND gate IC2 forms.
Meanwhile, the electrode input end of this NAND gate IC1 is connected with the end of oppisite phase of power amplifier P, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P; The in-phase end of power amplifier P is then connected with the TD pin of driving chip M, and the output of NAND gate IC3 is then connected with the P pole of diode D101.
The Same Name of Ends of the primary coil of transformer T is connected with the tie point of electric capacity C5 with electric capacity C4, ground connection after its non-same polarity is then connected with the emitter of transistor Q4.Meanwhile, the emitter of transistor Q4 is also connected with the TS pin of driving chip M.
The secondary coil of transformer T is provided with tap Y1 and tap Y2, and namely by this tap Y1 and tap Y2, the present invention is formed with 4 outputs, the i.e. Same Name of Ends of secondary coil on the secondary coil of transformer T, the non-same polarity of Y1 tap, Y2 tap and secondary coil.
Switched current source is used for providing working power to driving chip M, it is by transistor Q1, transistor Q2, transistor Q3, DC power supply S, be serially connected in the resistance R1 between the collector electrode of transistor Q1 and the collector electrode of transistor Q2, be serially connected in the RC filter circuit between the emitter of transistor Q1 and the negative pole of DC power supply S, be serially connected in the resistance R2 between the base stage of transistor Q1 and the negative pole of DC power supply S, the resistance R5 in parallel with DC power supply S-phase, be serially connected in the resistance R6 between the emitter of transistor Q3 and the negative pole of DC power supply S, be serially connected in the resistance R4 between the collector electrode of transistor Q3 and the collector electrode of transistor Q2, and positive pole is connected with the collector electrode of transistor Q2, the polar capacitor C2 that negative pole is connected with the negative pole of DC power supply S forms.
Meanwhile, the base stage of this transistor Q2 is also connected with the collector electrode of transistor Q1, and the base stage of transistor Q3 is then connected with the positive pole of DC power supply S with the emitter of transistor Q2 respectively; The VCC pin of described driving chip M is connected with the positive pole of polar capacitor C2, and the INP pin of driving chip M is then connected with the negative pole of polar capacitor C2.
Described RC filter circuit is then formed in parallel by resistance R3 and electric capacity C1, and namely after resistance R3 and electric capacity C1 parallel connection, an one common port is connected with the emitter of transistor Q1, its another common port is then connected with the negative pole of DC power supply S.
For guaranteeing result of use, the high-frequency N-channel MOS FET grid drive chip that this driving chip M preferentially adopts Linear Techn Inc. to produce, i.e. LTC4440A integrated chip.This driving chip can with the input voltage work up to 80V, up to can continuous operation during 100V transient state.
As mentioned above, just the present invention can well be realized.
Claims (3)
1. the two filtering type blue LED lamp raster data model system of boosting, primarily of transformer T, driving chip M, be serially connected with the switched current source between the VCC pin of driving chip M and INP pin, be serially connected with the diode D1 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C3 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R7 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode is ground connection after electric capacity C4 and electric capacity C5 in turn, and the transistor Q4 of grounded emitter forms, the Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C5 with electric capacity C4, ground connection after its non-same polarity is then connected with the emitter of transistor Q4, simultaneously, the emitter of transistor Q4 is also connected with the TS pin of driving chip M, the secondary coil of described transformer T is provided with tap Y1 and tap Y2, it is characterized in that, between the TD pin and the emitter of transistor Q4 of driving chip M, be also serially connected with the beam excitation formula logic amplifying circuit and two filter circuit (10) that boosts that are arranged in series, the two filter circuit (10) of described boosting is by operational amplifier P101, operational amplifier P102, operational amplifier P103, triode VT101, triode VT102, triode VT103, P pole is as input, the diode D101 that N pole is connected with triode VT101, positive pole is connected with the N pole of diode D101, the electric capacity C101 that negative pole is connected with the base stage of triode VT101 after resistance R102, positive pole is connected with the base stage of triode VT101, the electric capacity C102 that negative pole is connected with the collector electrode of triode VT102, one end is connected with the N pole of diode D101, the inductance L 101 that the other end is connected with the negative pole of electric capacity C102, one end is connected with the collector electrode of triode VT101, the resistance R101 that the other end is connected with the base stage of triode VT102, minus earth, the electric capacity C103 that positive pole is connected with the negative pole of electric capacity C101 after resistance R104, P pole is connected with the collector electrode of triode VT103, the diode D102 that N pole is connected with the base stage of triode VT101, N pole is connected with the base stage of triode VT103, the voltage stabilizing didoe D103 that P pole is connected with the positive pole of electric capacity C103 after resistance R103, negative pole is connected with the output of operational amplifier P101, the electric capacity C108 that positive pole is connected with the positive pole of electric capacity C103 after resistance R105, be serially connected in the resistance R106 between the base stage of triode VT103 and emitter, negative pole is connected with the negative pole of electric capacity C108 after resistance R107, the electric capacity C106 that positive pole is connected with the output of operational amplifier P102, minus earth, the electric capacity C107 that positive pole is connected with the negative pole of electric capacity C106 after resistance R108, one end is connected with the emitter of triode VT103, the resistance R109 that the other end is connected with the positive pole of electric capacity C106, minus earth, the electric capacity C104 that positive pole is connected with the negative pole of electric capacity C102 after resistance R110, positive pole is connected with the negative input end of operational amplifier P103, the electric capacity C105 that negative pole is connected with the output of operational amplifier P103, one end is connected with the positive pole of electric capacity C104, the resistance R112 that the other end is connected with the negative pole of electric capacity C105, one end is connected with the positive pole of electric capacity C104, the resistance R111 that the other end is connected with the positive pole of electric capacity C105, and one end is connected with the negative pole of electric capacity C105, the other end forms with the resistance R113 that the negative pole of electric capacity C102 is connected with the positive pole of electric capacity C106 simultaneously, wherein, the P pole of voltage stabilizing didoe D103 is also connected with the negative pole of electric capacity C108 with the emitter of triode VT102 simultaneously, the positive pole of electric capacity C108 is connected with the negative input end of operational amplifier P101, the positive input terminal ground connection of operational amplifier P101, the positive pole of electric capacity C107 is connected with the positive input terminal of operational amplifier P102, the positive pole of electric capacity C106 is also connected with the negative input end of operational amplifier P102, the positive input terminal ground connection of operational amplifier P103, the negative pole of electric capacity C102 is as output and be connected with the emitter of transistor Q4,
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the in-phase end of power amplifier P, the polar capacitor C6 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C6, the resistance R8 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R8, the polar capacitor C8 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R9 that the other end is connected with the in-phase end of power amplifier P, be serially connected in the resistance R10 between the end of oppisite phase of power amplifier P and output, one end is connected with the output of NAND gate IC1, the resistance R11 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C7 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C8, the resistance R12 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the end of oppisite phase of power amplifier P, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P, the in-phase end of power amplifier P is then connected with the TD pin of driving chip M, and the output of NAND gate IC3 is then connected with the P pole of diode D101.
2. the two filtering type blue LED lamp raster data model system of boosting according to claim 1, it is characterized in that, described switched current source is by transistor Q1, transistor Q2, transistor Q3, DC power supply S, be serially connected in the resistance R1 between the collector electrode of transistor Q1 and the collector electrode of transistor Q2, be serially connected in the RC filter circuit between the emitter of transistor Q1 and the negative pole of DC power supply S, be serially connected in the resistance R2 between the base stage of transistor Q1 and the negative pole of DC power supply S, the resistance R5 in parallel with DC power supply S-phase, be serially connected in the resistance R6 between the emitter of transistor Q3 and the negative pole of DC power supply S, be serially connected in the resistance R4 between the collector electrode of transistor Q3 and the collector electrode of transistor Q2, and positive pole is connected with the collector electrode of transistor Q2, the polar capacitor C2 that negative pole is connected with the negative pole of DC power supply S forms, the base stage of described transistor Q2 is also connected with the collector electrode of transistor Q1, and the base stage of transistor Q3 is then connected with the positive pole of DC power supply S with the emitter of transistor Q2 respectively, the VCC pin of described driving chip M is connected with the positive pole of polar capacitor C2, and the INP pin of driving chip M is then connected with the negative pole of polar capacitor C2.
3. the two filtering type blue LED lamp raster data model system of boosting according to claim 1 and 2, it is characterized in that, described driving chip M is LTC4440A integrated chip.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510319097.7A CN104936348A (en) | 2014-11-25 | 2015-06-11 | Boosting dual-filter type gate driving system for blue light-emitting diode (LED) lamp |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410687484.1A CN104411049A (en) | 2014-11-25 | 2014-11-25 | Novel gate drive system for blue LED lamps |
| CN2014106874841 | 2014-11-25 | ||
| CN201510319097.7A CN104936348A (en) | 2014-11-25 | 2015-06-11 | Boosting dual-filter type gate driving system for blue light-emitting diode (LED) lamp |
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| CN104936348A true CN104936348A (en) | 2015-09-23 |
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| CN201410687484.1A Pending CN104411049A (en) | 2014-11-25 | 2014-11-25 | Novel gate drive system for blue LED lamps |
| CN201510319097.7A Pending CN104936348A (en) | 2014-11-25 | 2015-06-11 | Boosting dual-filter type gate driving system for blue light-emitting diode (LED) lamp |
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| CN201410687484.1A Pending CN104411049A (en) | 2014-11-25 | 2014-11-25 | Novel gate drive system for blue LED lamps |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106849629A (en) * | 2017-02-28 | 2017-06-13 | 深圳市华星光电技术有限公司 | A kind of protection circuit and LED drive circuit |
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2014
- 2014-11-25 CN CN201410687484.1A patent/CN104411049A/en active Pending
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106849629A (en) * | 2017-02-28 | 2017-06-13 | 深圳市华星光电技术有限公司 | A kind of protection circuit and LED drive circuit |
| US10278257B2 (en) | 2017-02-28 | 2019-04-30 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Protection circuit and LED driving circuit |
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| CN104411049A (en) | 2015-03-11 |
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