CN204316789U - A kind of self-locking optical excitation raster data model system based on power amplification - Google Patents
A kind of self-locking optical excitation raster data model system based on power amplification Download PDFInfo
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- CN204316789U CN204316789U CN201420707734.9U CN201420707734U CN204316789U CN 204316789 U CN204316789 U CN 204316789U CN 201420707734 U CN201420707734 U CN 201420707734U CN 204316789 U CN204316789 U CN 204316789U
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Abstract
The utility model discloses a kind of self-locking optical excitation raster data model system based on power amplification, primarily of driving chip M, and the drive circuit to be connected with this driving chip M forms, it is characterized in that, native system is also provided with the switch power amplifying circuit be connected with driving chip M, and the first self-locking optical excitation circuit be connected with switch power amplifying circuit and the second self-locking optical excitation circuit; Described switch power amplifying circuit is by power amplifier P1, and power amplifier P2, power amplifier P3, be serially connected in the composition such as resistance R6 and electric capacity C3 between the output of power amplifier P1 and negative input.The utility model can excite the correlation function of driving chip M automatically according to outside illumination condition, without the need to increasing extra starting drive, therefore its power consumption is lower.
Description
Technical field
The utility model relates to a kind of LED drive circuit, specifically refers to a kind of self-locking optical excitation raster data model system based on power amplification.
Background technology
At present, because LED has, energy consumption is low, the feature such as long service life and safety and environmental protection, and it has become one of main product of people's life lighting.Because LED is different from traditional incandescent lamp, therefore its needs are driven by special drive circuit.But, the widely used gate driver circuit of current people due to the irrationality of its project organization, defects such as result in current gate driver circuit and have that energy consumption is higher, current noise comparatively large and start-up time is longer.
Utility model content
The purpose of this utility model is the defect that energy consumption is higher, current noise is comparatively large and start-up time is longer overcoming the existence of current gate driver circuit, a kind of reasonable in design is provided, can effectively reduce energy consumption and current noise, obviously shorten a kind of self-locking optical excitation raster data model system based on power amplification of start-up time.
The purpose of this utility model is achieved through the following technical solutions: a kind of self-locking optical excitation raster data model system based on power amplification, primarily of driving chip M, and the drive circuit to be connected with this driving chip M forms, simultaneously, native system is also provided with the switch power amplifying circuit be connected with driving chip M, and the first self-locking optical excitation circuit be connected with switch power amplifying circuit and the second self-locking optical excitation circuit.
Described switch power amplifying circuit is by power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R6 between the output of power amplifier P1 and negative input and electric capacity C3, be serially connected in the resistance R7 between the output of power amplifier P2 and electrode input end and electric capacity C4, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R5, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R8, base stage is connected with the output of power amplifier P2 after resistance R9, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R12, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C5 of ground connection, the electric capacity C6 be in parallel with resistance R9, one end is connected with the base stage of triode Q3, the resistance R10 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R11 of the external-4V voltage of the other end, the electric capacity C7 be in parallel with resistance R11, N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P, and positive pole is connected with the INP pin of driving chip M, negative pole after being connected with the emitter of triode Q2 again the polar capacitor C8 of ground connection form, the negative input of described power amplifier P1 is connected with the electrode input end of power amplifier P2, and the output of power amplifier P3 is then connected with the VCC pin of driving chip M.
The first described self-locking optical excitation circuit is by NOR gate IC1, NOR gate IC2, NOR gate IC3, the first input end of one end AND OR NOT gate IC1 is connected, the other end photocell CDS1 that second input of AND OR NOT gate IC2 is connected after resistance R2, the first input end of one end AND OR NOT gate IC1 is connected, the potentiometer R1 of other end ground connection, and the electric capacity C1 be serially connected between the output of NOR gate IC3 and first input end forms; The output of the second input AND OR NOT gate IC2 of described NOR gate IC1 is connected, and the first input end of its output then AND OR NOT gate IC2 is connected; Second input of the output of described NOR gate IC2 then AND OR NOT gate IC3 is connected, and the output of NOR gate IC3 is then connected with the electrode input end of power amplifier P1.
The second described self-locking optical excitation circuit is by NOR gate IC4, NOR gate IC5, NOR gate IC6, the first input end of one end AND OR NOT gate IC4 is connected, the other end photocell CDS2 that second input of AND OR NOT gate IC5 is connected after resistance R4, the first input end of one end AND OR NOT gate IC4 is connected, the potentiometer R3 of other end ground connection, and the electric capacity C2 be serially connected between the output of NOR gate IC6 and first input end forms; The output of the second input AND OR NOT gate IC5 of described NOR gate IC4 is connected, and the first input end of its output then AND OR NOT gate IC5 is connected; Second input of the output of described NOR gate IC5 then AND OR NOT gate IC6 is connected, and the output of NOR gate IC6 is then connected with the negative input of power amplifier P2.
Further, described drive circuit is by transformer T, be serially connected with the diode D2 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C9 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R13 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C10 and electric capacity C11 ground connection and the transistor Q4 of grounded emitter form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C11 with electric capacity C10, ground connection after its non-same polarity is then connected with the emitter of transistor Q4; Meanwhile, the emitter of transistor Q4 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
For guaranteeing result of use of the present utility model, described driving chip M preferentially adopts LTC4440A integrated chip to realize.
The utility model comparatively prior art is compared, and has the following advantages and beneficial effect:
(1) the utility model can excite the correlation function of driving chip M automatically according to outside illumination condition, and without the need to increasing extra starting drive, therefore its power consumption is lower.
(2) be only 1/4 of conventional gate drive circuit start-up time start-up time of the present utility model, therefore its start-up time is extremely short.
(3) the utility model effectively can avoid external electromagnetic interference, can reduce current noise significantly.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present utility model.
Embodiment
Below in conjunction with embodiment, the utility model is described in further detail, but execution mode of the present utility model is not limited thereto.
Embodiment
As shown in Figure 1, the utility model is primarily of driving chip M, the drive circuit be connected with this driving chip M, the switch power amplifying circuit be connected with driving chip M, and the first self-locking optical excitation circuit be connected with switch power amplifying circuit and the second self-locking optical excitation circuit form.For guaranteeing result of use of the present utility model, the high-frequency N-channel MOS FET grid drive chip that this driving chip M preferentially adopts Linear Techn Inc. to produce, namely LTC4440A integrated chip realizes.The feature of this driving chip M is can with the input voltage work up to 80V, and can up to can continuous operation during 100V transient state.
Described switch power amplifying circuit is primarily of power amplifier P1, power amplifier P2, power amplifier P3, triode Q1, triode Q2, triode Q3, polar capacitor C8, be serially connected in the one-level RC filter circuit between the output of power amplifier P1 and negative input, be serially connected in the secondary RC filter circuit between the output of power amplifier P2 and electrode input end, and resistance R5, resistance R8, resistance R9, resistance R10, resistance R11, resistance R12, electric capacity C5, electric capacity C6, electric capacity C7 and diode D1 form.
Wherein, described one-level RC filtered electrical routing resistance R6 and electric capacity C3 is formed in parallel, namely between resistance R6 and the electric capacity C3 negative input that is all serially connected in power amplifier P1 and output; Described secondary RC filter circuit is then formed in parallel by resistance R7 and electric capacity C4, namely between resistance R7 and the electric capacity C4 electrode input end that is all serially connected in power amplifier P2 and output.Meanwhile, the negative input of this power amplifier P1 is also connected with the electrode input end of power amplifier P2.
The base stage of triode Q1 is connected with the output of power amplifier P1, and its collector electrode is connected with the electrode input end of power amplifier P3 after resistance R5, and its emitter is then connected with the base stage of triode Q2; The collector electrode of triode Q2 is connected with the negative input of power amplifier P3 after resistance R8, meanwhile, and the collector electrode also external+10V voltage of this triode Q2.
The base stage of triode Q3 is connected with the output of power amplifier P2 after resistance R9, and its collector electrode is then connected with the base stage of triode Q2 after resistance R12.Electric capacity C6 is then in parallel with resistance R9, and for guaranteeing effect, this electric capacity C6 preferentially adopts electrochemical capacitor to realize.During connection, the negative pole of electric capacity C6 is connected with the base stage of triode Q3, and its positive pole is then connected with the output of power amplifier P2.The positive pole of electric capacity C5 is connected with the negative input of power amplifier P3, and its negative pole is then connected with the emitter of triode Q2.Meanwhile, the negative pole of this electric capacity C5 and the equal ground connection of emitter of triode Q2.
The positive pole of polar capacitor C8 is connected with the INP pin of driving chip M, and negative pole is connected with the emitter of triode Q2 with the negative pole of electric capacity C5 respectively.
One end of resistance R10 is connected with the base stage of triode Q3, the voltage of the external-4V of its other end; And one end of resistance R11 is connected with the emitter of triode Q3, the voltage of its other end then external equally-4V.Electric capacity C7 is then in parallel with resistance R11.Equally, described electric capacity C5 and electric capacity C7 also all adopts electrochemical capacitor to realize.
The N pole of described diode D1 is connected with the collector electrode of triode Q1, and its P pole is at the voltage of external-4V.
For guaranteeing the normal operation of power amplifier P1 and power amplifier P2, this electric capacity C3 and electric capacity C4 all preferentially adopts patch capacitor to realize.
The first described self-locking optical excitation circuit is connected with the electrode input end of power amplifier P1, it is by NOR gate IC1, NOR gate IC2, NOR gate IC3, the first input end of one end AND OR NOT gate IC1 is connected, the other end photocell CDS1 that second input of AND OR NOT gate IC2 is connected after resistance R2, the first input end of one end AND OR NOT gate IC1 is connected, the potentiometer R1 of other end ground connection, and the electric capacity C1 be serially connected between the output of NOR gate IC3 and first input end forms.Wherein, this photocell CDS1 is used under illumination condition, producing electric energy, for switch power amplifying circuit provides power supply.
The output of the second input AND OR NOT gate IC2 of described NOR gate IC1 is connected, and the first input end of its output then AND OR NOT gate IC2 is connected; Second input of the output of described NOR gate IC2 then AND OR NOT gate IC3 is connected, and the output of NOR gate IC3 is then connected with the electrode input end of power amplifier P1.
The second described self-locking optical excitation circuit is connected with the negative input of power amplifier P2, it is by NOR gate IC4, NOR gate IC5, NOR gate IC6, the first input end of one end AND OR NOT gate IC4 is connected, the other end photocell CDS2 that second input of AND OR NOT gate IC5 is connected after resistance R4, the first input end of one end AND OR NOT gate IC4 is connected, the potentiometer R3 of other end ground connection, and the electric capacity C2 be serially connected between the output of NOR gate IC6 and first input end forms.
The output of the second input AND OR NOT gate IC5 of described NOR gate IC4 is connected, and the first input end of its output then AND OR NOT gate IC5 is connected; Second input of the output of described NOR gate IC5 then AND OR NOT gate IC6 is connected, and the output of NOR gate IC6 is then connected with the negative input of power amplifier P2.
Described drive circuit is then made up of transformer T, diode D2, electric capacity C9, resistance R13, electric capacity C10, electric capacity C11 and transistor Q4.During connection, the P pole of diode D2 is connected with the VCC pin of driving chip M, and its N pole is then connected with the BOOST pin of driving chip M.The positive pole of electric capacity C9 is connected with the BOOST pin of driving chip M, and its negative pole is then connected with the TG pin of driving chip M.
Resistance R13 is divider resistance, and it is serially connected with between the TG pin of driving chip M and TS pin.The base stage of transistor Q4 is then connected with the TG pin of driving chip M, and its collector electrode is ground connection after electric capacity C10 and electric capacity C11 in turn, its grounded emitter.Meanwhile, the collector electrode of this transistor Q4 also needs the direct voltage of external+6V, to guarantee that transistor Q4 has enough bias voltages to drive himself conducting.
Described transformer T exports to outside field effect transistor after being used for that+the 6V of outside direct voltage is carried out transformation process.The Same Name of Ends of the primary coil of this transformer T is connected with the tie point of electric capacity C11 with electric capacity C10, ground connection after its non-same polarity is then connected with the emitter of transistor Q4.Meanwhile, the emitter of transistor Q4 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
The Same Name of Ends of the secondary coil of transformer T, tap Y1, tap Y2 together with the non-same polarity of secondary coil as output of the present utility model.According to the situation of reality, user can only select any one or several port of these four outputs to use.
As mentioned above, just the utility model can well be realized.
Claims (3)
1. the self-locking optical excitation raster data model system based on power amplification, primarily of driving chip M, and the drive circuit to be connected with this driving chip M forms, it is characterized in that, native system is also provided with the switch power amplifying circuit be connected with driving chip M, and the first self-locking optical excitation circuit be connected with switch power amplifying circuit and the second self-locking optical excitation circuit, described switch power amplifying circuit is by power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R6 between the output of power amplifier P1 and negative input and electric capacity C3, be serially connected in the resistance R7 between the output of power amplifier P2 and electrode input end and electric capacity C4, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R5, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R8, base stage is connected with the output of power amplifier P2 after resistance R9, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R12, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C5 of ground connection, the electric capacity C6 be in parallel with resistance R9, one end is connected with the base stage of triode Q3, the resistance R10 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R11 of the external-4V voltage of the other end, the electric capacity C7 be in parallel with resistance R11, N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P, and positive pole is connected with the INP pin of driving chip M, negative pole after being connected with the emitter of triode Q2 again the polar capacitor C8 of ground connection form, the negative input of described power amplifier P1 is connected with the electrode input end of power amplifier P2, and the output of power amplifier P3 is then connected with the VCC pin of driving chip M,
The first described self-locking optical excitation circuit is by NOR gate IC1, NOR gate IC2, NOR gate IC3, the first input end of one end AND OR NOT gate IC1 is connected, the other end photocell CDS1 that second input of AND OR NOT gate IC2 is connected after resistance R2, the first input end of one end AND OR NOT gate IC1 is connected, the potentiometer R1 of other end ground connection, and the electric capacity C1 be serially connected between the output of NOR gate IC3 and first input end forms; The output of the second input AND OR NOT gate IC2 of described NOR gate IC1 is connected, and the first input end of its output then AND OR NOT gate IC2 is connected; Second input of the output of described NOR gate IC2 then AND OR NOT gate IC3 is connected, and the output of NOR gate IC3 is then connected with the electrode input end of power amplifier P1;
The second described self-locking optical excitation circuit is by NOR gate IC4, NOR gate IC5, NOR gate IC6, the first input end of one end AND OR NOT gate IC4 is connected, the other end photocell CDS2 that second input of AND OR NOT gate IC5 is connected after resistance R4, the first input end of one end AND OR NOT gate IC4 is connected, the potentiometer R3 of other end ground connection, and the electric capacity C2 be serially connected between the output of NOR gate IC6 and first input end forms; The output of the second input AND OR NOT gate IC5 of described NOR gate IC4 is connected, and the first input end of its output then AND OR NOT gate IC5 is connected; Second input of the output of described NOR gate IC5 then AND OR NOT gate IC6 is connected, and the output of NOR gate IC6 is then connected with the negative input of power amplifier P2.
2. a kind of self-locking optical excitation raster data model system based on power amplification according to claim 1, it is characterized in that, described drive circuit is by transformer T, be serially connected with the diode D2 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C9 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R13 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C10 and electric capacity C11 ground connection and the transistor Q4 of grounded emitter form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C11 with electric capacity C10, ground connection after its non-same polarity is then connected with the emitter of transistor Q4; Meanwhile, the emitter of transistor Q4 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
3. a kind of self-locking optical excitation raster data model system based on power amplification according to claim 1 and 2, it is characterized in that, described driving chip M is LTC4440A integrated chip.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104967293A (en) * | 2014-11-22 | 2015-10-07 | 成都颉盛科技有限公司 | Self-locking optical excitation grid drive system based on half-bridge control drive circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104967293A (en) * | 2014-11-22 | 2015-10-07 | 成都颉盛科技有限公司 | Self-locking optical excitation grid drive system based on half-bridge control drive circuit |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150506 Termination date: 20151122 |
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