CN104916692A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN104916692A
CN104916692A CN201410397429.9A CN201410397429A CN104916692A CN 104916692 A CN104916692 A CN 104916692A CN 201410397429 A CN201410397429 A CN 201410397429A CN 104916692 A CN104916692 A CN 104916692A
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China
Prior art keywords
mentioned
electrode
main electrode
main
terminal
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CN201410397429.9A
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Inventor
增子真吾
安本恭章
梁濑直子
汤元美树
三村正人
齐藤泰伸
吉冈启
藤本英俊
内原士
大野哲也
仲敏行
小野祐
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Toshiba Corp
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Toshiba Corp
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Publication of CN104916692A publication Critical patent/CN104916692A/zh
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Abstract

本发明提供一种能够实现电极的连接部分的电传导性或热传导性的提高的半导体装置及其制造方法。根据一实施方式，半导体装置具备半导体芯片，该半导体芯片具有氮化物半导体层、以及设置于上述氮化物半导体层的控制电极、第一主电极和第二主电极。进而，上述装置具备支撑体，该支撑体具有基板、以及设置于上述基板的控制端子、第一主端子和第二主端子。进而，上述半导体芯片的上述控制电极、上述第一主电极以及上述第二主电极与上述支撑体相对置地设置于上述支撑体。进而，上述半导体芯片的上述控制电极、上述第一主电极以及上述第二主电极分别与上述支撑体的上述控制端子、上述第一主端子以及上述第二主端子电连接。

Description

半导体装置及其制造方法
相关申请
本申请主张以日本专利申请2014－49252号(申请日：2014年3月12日)为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式涉及半导体装置及其制造方法。
背景技术
氮化物半导体装置由于氮化物半导体的材料特性优越，因此作为能够兼顾晶体管的耐压的提高和导通电阻的降低的半导体装置而受到期待。例如，具有GaN(氮化镓)层与AlGaN(氮化铝镓)层的异质界面的场效应型晶体管受到关注。但是，在将设置于氮化物半导体装置的氮化物半导体层的栅极电极、源极电极、以及漏极电极分别通过接合线(bonding wire)与氮化物半导体装置的封装的栅极端子、源极端子、以及漏极端子电连接的情况下，由于接合线较细，因此存在难以向氮化物半导体装置供给大电流或高电压、或者氮化物半导体装置的热难以从接合线释放这样的问题。此外，当氮化物半导体装置的半导体芯片内的基板的电位变为浮置状态时，存在因基板与氮化物半导体层之间的晶格不匹配而产生半导体芯片的塌陷(collapse)这样的问题。
发明内容
本发明提供一种能够实现电极的连接部分的电传导性或热传导性的提高的半导体装置及其制造方法。
根据一实施方式，半导体装置具备半导体芯片，该半导体芯片具有氮化物半导体层、以及设置于上述氮化物半导体层的控制电极、第一主电极和第二主电极。进而，上述装置具备支撑体，该支撑体具有基板、以及设置于上述基板的控制端子、第一主端子和第二主端子。进而，上述半导体芯片的上述控制电极、上述第一主电极以及上述第二主电极与上述支撑体相对置地设置于上述支撑体。进而，上述半导体芯片的上述控制电极、上述第一主电极以及上述第二主电极分别与上述支撑体的上述控制端子、上述第一主端子以及上述第二主端子电连接。
附图说明
图1是表示第一实施方式的半导体装置的构造的剖面图。
图2是表示第一实施方式的半导体装置的构造的平面图。
图3A～图4C是表示第一实施方式的半导体装置的制造方法的剖面图。
具体实施方式
以下，参照附图来说明本发明的实施方式。
(第一实施方式)
(1)第一实施方式的半导体装置的构造
图1是表示第一实施方式的半导体装置的构造的剖面图。图1的半导体装置是氮化物半导体装置，具备半导体芯片1和支撑体2。
半导体芯片1具备：作为基板的例子的半导体基板11、氮化物半导体层12、栅极绝缘膜13、作为控制电极的例子的栅极电极14、作为第一以及第二主电极的例子的源极电极15以及漏极电极16、和作为1个以上的电极的例子的柱(host)电极17。
支撑体2具备：作为基板的例子的支撑基板21、作为控制端子的例子的栅极端子22、作为第一以及第二主端子的例子的源极端子23以及漏极端子24、和焊料25、26、27。
半导体基板11例如是Si(硅)基板。半导体基板11具有第一面S1、和第一面S1的相反侧的第二面S2。支撑基板21是例如AlN(氮化铝)基板等的绝缘基板。支撑基板21具有第一面S3、和第一面S3的相反侧的第二面S4。
图1示出与半导体基板11以及支撑基板21平行且相互垂直的X方向以及Y方向、以及与半导体基板11以及支撑基板21垂直的Z方向。在本说明书中，将+Z方向取为上方向，将－Z方向取为下方向。例如，半导体基板11和支撑基板21的位置关系表现为，支撑基板21位于半导体基板11的下方。
氮化物半导体层12形成于半导体基板11的第一面S1。氮化物半导体层12是含有氮的半导体层。氮化物半导体层12例如是包括缓冲层、电子转移层、以及电子供给层在内的层叠膜。缓冲层的例子是包括AlN层、AlGaN层、以及GaN层在内的层叠膜。电子转移层的例子是GaN层。电子供给层的例子是AlGaN层。
栅极电极14、源极电极15、以及漏极电极16经由氮化物半导体层12而形成于半导体基板11的第一面S1。具体来说，栅极电极14隔着栅极绝缘膜13而面向氮化物半导体层12，源极电极15和漏极电极16与氮化物半导体层12相接触。栅极绝缘膜13的例子是硅氧化膜。栅极电极14、源极电极15、以及漏极电极16的例子是包括Ni(镍)层和Au(金)层在内的层叠膜。
柱电极17形成于半导体基板11的第一面S1，将源极电极15与半导体基板11电连接。本实施方式的柱电极17使半导体基板11的电位成为与源极电极15的电位(固定电位)同电位，因而具有防止半导体基板11的电位成为浮置状态的功能。由此，根据本实施方式，能够抑制因半导体基板11的Si与氮化物半导体层12的GaN之间的晶格不匹配引起的半导体芯片1的塌陷的发生。柱电极17的例子是通过镀覆法形成的金属层。柱电极17与半导体基板11的连接可以是欧姆连接，也可以是非欧姆连接。
栅极端子22、源极端子23、以及漏极端子24形成于支撑基板21。栅极端子22、源极端子23、以及漏极端子24各自包括第一导电层(例如Cu(铜)层)22a、23a、24a、第二导电层(例如Ni(镍)层)22b、23b、24b、和第三导电层(例如Au(金)层)22c、23c、24c。
栅极端子22、源极端子23、以及漏极端子24各自包括形成于支撑基板21的第一面S3上的第一部分、形成于支撑基板21的第二面S4上的第二部分、和将第一部分与第二部分电连接的第三部分。这样的栅极端子22、源极端子23、以及漏极端子24例如能够通过形成将支撑基板21贯通的多个孔并在这些孔的内部形成栅极端子22、源极端子23、以及漏极端子24而形成。
栅极端子22、源极端子23、以及漏极端子24作为本实施方式的半导体装置的外部连接端子而被使用。例如，在希望将本实施方式的半导体装置的栅极电极14与外部装置电连接的情况下，将支撑基板21的第二面S4侧的栅极端子22与外部装置的端子电连接。
半导体芯片1的栅极电极14、源极电极15、以及漏极电极16与支撑体2相对置地设置于支撑体2。即，半导体芯片1以半导体基板11的第一面S1与支撑基板21的第一面S3相互对置的状态被设置于支撑体2。这样，本实施方式的半导体芯片1以面朝下(face down)的状态被设置于支撑体2。
半导体芯片1与支撑体2通过焊料25～27被接合。具体来说，栅极电极14通过焊料25被接合于栅极端子22。源极电极15通过焊料26被接合于源极端子23。漏极电极16通过焊料27被接合于漏极端子24。结果，半导体芯片1的栅极电极14、源极电极15、以及漏极电极16分别与支撑体2的栅极端子22、源极端子23、以及漏极端子24电连接。焊料25～27的材料的例子是SnAgCu。
另外，通过在支撑体2形成焊料25～27并利用焊料25～27将半导体芯片1接合到支撑体2，从而本实施方式的半导体芯片1被安装到支撑体2。但是，本实施方式的半导体芯片1也可以通过其他的方法来安装到支撑体2。
图2是表示第一实施方式的半导体装置的构造的平面图。图2仅图示了第一实施方式的半导体芯片1的栅极电极14、源极电极15、漏极电极16、以及柱电极17，其他的构成要素的图示省略。
栅极电极14、源极电极15、以及漏极电极16具有在Y方向上延伸的带状的形状。Y方向是第一方向的例子。栅极电极14被配置在源极电极15与漏极电极16之间。
本实施方式的柱电极17没被配置在源极电极15的栅极电极14侧而被配置在相对于源极电极15而言与栅极电极14相反的一侧。这样的柱电极17的配置存在例如能够防止栅极电极14与柱电极17之间的短路的优点。本实施方式的柱电极17在与Y方向平行的同一直线L上配置为一列。
符号D表示相互邻接的柱电极17间的Y方向的距离。符号W表示柱电极17的Y方向的宽度。本实施方式中，柱电极17间的距离D设定得大于柱电极17的宽度W。距离D的例子是100μm，宽度W的例子是10μm。
另外，柱电极17的配置或形状也可以是与上述的例子不同的配置或形状。此外，距离D或宽度W的值也可以是与上述的例子不同的值。例如，本实施方式的柱电极17被以等间隔进行了配置，但也可以以非等间隔进行配置。
(2)第一实施方式的半导体装置的细节
接着，再次参照图1对第一实施方式的半导体装置的细节进行说明。
如以上那样，本实施方式的半导体芯片1的栅极电极14、源极电极15、以及漏极电极16与支撑体2相对置地被设置于支撑体2。进而，本实施方式的半导体芯片1的栅极电极14、源极电极15、以及漏极电极16分别与支撑体2的栅极端子22、源极端子23、以及漏极端子24电连接。
因此，根据本实施方式，能够不使用接合线而将栅极电极14、源极电极15、以及漏极电极16分别与栅极端子22、源极端子23、以及漏极端子24电连接。
因此，根据本实施方式，能够向半导体装置容易地供给大电流或高电压。结果，能够有效地利用耐压高且导通电阻低这样的氮化物半导体装置的优点。
此外，根据本实施方式，能够使半导体装置的热容易地从栅极端子22、源极端子23、以及漏极端子24释放。结果，在向氮化物半导体装置供给大电流或高电压的情况下，能够使氮化物半导体装置的大量的热向外部释放。本实施方式中，也能够使半导体装置的热从支撑基板21释放。
此外，像以往那样通过接合线来将电极14～16与端子22～24连接的情况下，会出现如下问题：接合线的位置晃动、或需要在半导体芯片1设置接合区、或接合线成为半导体装置的封装的阻碍(即，半导体装置的小型化的阻碍)。
但是，根据本实施方式，能够将电极14～16及端子22～24的位置通过焊料25～27等可靠地固定。此外，根据本实施方式，不需要在半导体芯片1设置接合区，因此能够缩小半导体芯片1的面积。此外，根据本实施方式，能够将电极14～16与端子22～24近距离地配置，因此能够容易地将半导体装置小型化。
此外，本实施方式中，半导体芯片1被以面朝下的状态安装于支撑体2，因此电极14～16位于支撑体2侧，半导体基板11位于支撑体2的相反侧。从而，希望回避半导体基板11的电位成为浮置状态的情况。此外，像本实施方式这样半导体芯片1包括氮化物半导体层12的情况下，希望抑制由半导体基板11的Si与氮化物半导体层12的GaN之间的晶格不匹配引起的塌陷。
对此，本实施方式的半导体装置具备将源极电极15与半导体基板11电连接的柱电极17。因此，根据本实施方式，能够使半导体基板11的电位与源极电极15的电位同电位，从而回避半导体基板11的电位成为浮置状态的情况。因此，根据本实施方式，通过回避半导体基板11的电位成为浮置状态的情况，能够抑制由半导体基板11与氮化物半导体层12之间的晶格不匹配引起的塌陷。
此外，像以往那样通过接合线来将电极14～16与端子22～24连接的情况下，将出现如下问题：需要用树脂模制接合线；或因接合线的位置的晃动而难以模制半导体装置。
但是，根据本实施方式，不需要模制接合线，因此能够容易地模制半导体装置。此外，根据本实施方式，不需要模制接合线，因此，能够采用不进行半导体装置的模制的安装。其中，本实施方式中，为了防止半导体基板11破裂，也可以进行半导体基板11的模制(Mold)。
(3)第一实施方式的半导体装置的制造方法
图3和图4是表示第一实施方式的半导体装置的制造方法的剖面图。
首先，如图3A所示，在半导体基板11的第一面S1形成氮化物半导体层12。
接着，如图3B所示，在半导体基板11的第一面S1经由氮化物半导体层12而形成多个组的栅极绝缘膜13、栅极电极14、源极电极15、以及漏极电极16。图3B示出了4组的栅极绝缘膜13、栅极电极14、源极电极15、以及漏极电极16。
接着，如图3C所示，在与源极电极15邻接的位置形成将氮化物半导体层12贯通的多个孔18。孔18例如通过RIE(Reactive Ion Etching，反应离子刻蚀)形成。
接着，如图3D所示，在孔18的内部形成柱电极17。结果，源极电极15与半导体基板11通过柱电极17而电连接。柱电极17例如通过镀覆法形成。
另外，本实施方式的孔18的尺寸被设定为可埋入柱电极17的尺寸。孔18的平面形状的例子是10μm×10μm尺寸的四边形。
接着，如图4A所示，形成贯通氮化物半导体层12而到达半导体基板11的多条的槽19。槽19形成为，将半导体基板11的第一面S1贯通但未到达半导体基板11的第二面S2。符号S表示槽19的底部。槽19形成在属于各个组的源极电极15与漏极电极16之间等。具体来说，槽19形成在半导体基板11的切割线上。
本实施方式的槽19通过如下方式形成：在氮化物半导体层12利用刻蚀(例如RIE)形成槽19，之后在半导体基板11使用切割器形成槽19。即，在本实施方式的槽19的形成工序中，氮化物半导体层12以刻蚀的方式进行加工，半导体基板11使用切割器来加工。
以上述方法形成槽19的理由如下所示。一般来说，氮化物半导体层12比半导体基板11硬，但氮化物半导体层12的厚度比半导体基板11的厚度薄。因此，在使用切割器来加工氮化物半导体层12时，有切割器破损的可能性、和氮化物半导体层12的形状错乱的可能性。因此，优选的是，氮化物半导体层12以刻蚀的方式进行加工。另一方面，在使用切割器来加工半导体基板11的情况下，发生这种问题的可能性小。此外，在半导体基板11形成槽19的情况下，与采用刻蚀时相比，采用切割器时容易形成良好的槽19。因此，在本实施方式的槽19的形成工序中，以刻蚀的方式加工氮化物半导体层12，并且使用切割器来加工半导体基板11。
但是，在能够回避以上的问题的情况下等，氮化物半导体层12和半导体基板11都可以使用切割器来加工。例如，可以考虑通过谨慎地进行基于切割器的氮化物半导体层12的加工、或由高性能的切割器加工氮化物半导体层12以及半导体基板11，由此回避以上的问题。该情况下，能够消除以不同的方法对氮化物半导体层12和半导体基板11进行加工的浪费。
接着，如图4B所示，以使栅极电极14、源极电极15、以及漏极电极16与带3相对置的状态将半导体基板11贴附于带3。结果，半导体基板11以面朝下的状态被贴附于带3。
接着，如图4C所示，将半导体基板11从第二面S2侧进行薄膜化。半导体基板11的薄膜化例如通过CMP(Chemical Mechanical Polishing，化学机械抛光)来进行。此外，半导体基板11的薄膜化被执行，直到半导体基板11的第二面S2到达槽19为止。结果，半导体基板11被分割为多个半导体芯片1。
之后，如图1所示，各半导体芯片1通过焊料25～27被安装于支撑体2。这样，制造本实施方式的半导体装置。
如上所述，本实施方式的半导体装置是通过在形成了将氮化物半导体层12贯通而到达半导体基板11的槽19后对半导体基板11进行薄膜化的“先切割”而制造的。
因此，根据本实施方式，不需要持续切割直到槽19贯通半导体基板11为止，因此能够缩短用于半导体装置的切割时间。
一般来说，半导体基板11的切割深度越深，越需要广泛地确保切割线的边缘(margin)(修整区域)。根据本实施方式，能够使半导体基板11的切割深度较浅，因此能够减小切割线的边缘。
如上所述，本实施方式的半导体芯片1的栅极电极14、源极电极15、以及漏极电极16与支撑体2相对置地设置于支撑体2。进而，本实施方式的半导体芯片1的栅极电极14、源极电极15、以及漏极电极16分别与支撑体2的栅极端子22、源极端子23、以及漏极端子24电连接。
因此，根据本实施方式，能够不使用接合线而将栅极电极14、源极电极15、以及漏极电极16分别与栅极端子22、源极端子23、以及漏极端子24电连接，并且能够使它们的连接部分的电传导性或热传导性提高。
例如，根据本实施方式，能够将大电流或高电压容易地供给到半导体装置，将半导体装置的热容易地从栅极端子22、源极端子23、以及漏极端子24释放。
此外，本实施方式的半导体装置具备将半导体基板11与源极电极15电连接的柱电极17。因此，根据本实施方式，通过利用柱电极17来回避半导体基板11的电位成为浮置状态的情况，能够抑制由半导体基板11与氮化物半导体层12的晶格不匹配引起的半导体芯片1的塌陷。
另外，本实施方式的半导体基板11也可以是Si基板以外的半导体基板。这种半导体基板的一例是SiC(碳化硅)基板。此外，本实施方式的半导体基板11也可以替换为绝缘基板。这种绝缘基板的一例是蓝宝石基板。
对本发明的几个实施方式进行了说明，但这些实施方式是作为例子而提示的，并不意欲限定发明的范围。这些新的实施方式能够以其它各种形态实施，在不脱离发明主旨的范围内，能够进行各种省略、替换、变更。这些实施方式及其变形包含在发明的范围及主旨中，并且包含在权利要求所记载的发明及其等同范围内。

Claims (20)

1.一种半导体装置，具备：
半导体芯片，该半导体芯片具备氮化物半导体层、以及设置于上述氮化物半导体层的控制电极、第一主电极和第二主电极；以及
支撑体，该支撑体具备基板、以及设置于上述基板的控制端子、第一主端子和第二主端子，
上述半导体芯片的上述控制电极、上述第一主电极以及上述第二主电极与上述支撑体相对置地设置于上述支撑体，
上述半导体芯片的上述控制电极、上述第一主电极以及上述第二主电极分别与上述支撑体的上述控制端子、上述第一主端子以及上述第二主端子电连接。
2.如权利要求1所述的半导体装置，
上述控制端子、上述第一主端子以及上述第二主端子的每一个包括：
在上述基板的第一面设置的第一部分；
在上述基板的第二面设置的第二部分；以及
将上述第一部分与上述第二部分电连接的第三部分。
3.如权利要求1所述的半导体装置，
上述半导体芯片具备将上述基板与上述第一主电极或第二主电极电连接的1个以上的电极。
4.如权利要求3所述的半导体装置，
上述控制电极、上述第一主电极以及上述第二主电极具有在第一方向上延伸的形状，
上述1个以上的电极包括在与上述第一方向平行的同一直线上配置的多个电极。
5.如权利要求4所述的半导体装置，
上述电极间的上述第一方向的距离大于上述电极的上述第一方向的宽度。
6.如权利要求3所述的半导体装置，
上述控制电极设置于上述第一主电极与上述第二主电极之间，
上述1个以上的电极相对于上述第一主电极或第二主电极设置在与上述控制电极相反的一侧。
7.如权利要求1所述的半导体装置，
上述半导体芯片通过焊料而与上述支撑体接合。
8.一种半导体装置，具备：
基板；
设置于上述基板的氮化物半导体层；
设置于上述氮化物半导体层的控制电极、第一主电极以及第二主电极；以及
将上述基板与上述第一主电极或第二主电极电连接的1个以上的电极。
9.如权利要求8所述的半导体装置，
上述控制电极、上述第一主电极以及上述第二主电极具有在第一方向上延伸的形状，
上述1个以上的电极包括在与上述第一方向平行的同一直线上配置的多个电极。
10.如权利要求9所述的半导体装置，
上述电极间的上述第一方向的距离大于上述电极的上述第一方向的宽度。
11.如权利要求8所述的半导体装置，
上述控制电极设置于上述第一主电极与上述第二主电极之间，
上述1个以上的电极相对于上述第一主电极或第二主电极设置于与上述控制电极相反的一侧。
12.一种半导体装置的制造方法，包括如下步骤：
在基板的第一面形成氮化物半导体层；
在上述氮化物半导体层形成多组的控制电极、第一主电极以及第二主电极；
形成将上述氮化物半导体层贯通而到达上述基板的多条槽；以及
通过将上述基板从上述基板的第二面侧起进行薄膜化、直到上述第二面到达上述槽为止，由此将上述基板分割为多个半导体芯片。
13.如权利要求12所述的半导体装置的制造方法，
上述槽通过如下方式形成：在上述氮化物半导体层利用刻蚀而形成上述槽，在上述基板使用切割器来形成上述槽。
14.如权利要求12所述的半导体装置的制造方法，
上述槽通过如下方式形成：在上述氮化物半导体层以及上述基板使用切割器来形成上述槽。
15.如权利要求12所述的半导体装置的制造方法，
还包括形成将上述第一主电极或第二主电极与上述基板电连接的1个以上的电极的步骤。
16.如权利要求15所述的半导体装置的制造方法，
上述控制电极、上述第一主电极以及上述第二主电极形成为在第一方向上延伸，
上述1个以上的电极包括在与上述第一方向平行的同一直线上配置的多个电极。
17.如权利要求16所述的半导体装置的制造方法，
上述电极间的上述第一方向的距离被设定为大于上述电极的上述第一方向的宽度。
18.如权利要求15所述的半导体装置的制造方法，
上述控制电极形成在上述第一主电极与上述第二主电极之间，
上述1个以上的电极相对于上述第一主电极或第二主电极形成在与上述控制电极相反的一侧。
19.如权利要求12所述的半导体装置的制造方法，
还将各半导体芯片安装于上述支撑体，以使各半导体芯片的上述控制电极、上述第一主电极以及上述第二主电极分别与支撑体的控制端子、第一主端子以及第二主端子电连接。
20.如权利要求19所述的半导体装置的制造方法，
各半导体芯片通过焊料而与上述支撑体接合。
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