CN103636001A - 无金的欧姆接触 - Google Patents

无金的欧姆接触 Download PDF

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CN103636001A
CN103636001A CN201280020021.9A CN201280020021A CN103636001A CN 103636001 A CN103636001 A CN 103636001A CN 201280020021 A CN201280020021 A CN 201280020021A CN 103636001 A CN103636001 A CN 103636001A
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R·V·谢拉卡拉
T·E·卡齐奥
J·R·拉罗什
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Raytheon Co
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/452Ohmic electrodes on AIII-BV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
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    • HELECTRICITY
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

Abstract

本发明提供一种半导体结构,其具有:半导体;无金的导电结构,其与该半导体欧姆接触;以及一对导电层,其通过硅层分隔开。该结构包括:难熔金属层,其布置为与该半导体接触;并且其中通过该硅层分隔开的该对导电层中的一个是该难熔金属层。第二硅层被布置于该对导电层中的第二个之上,并且包括在该第二硅层上的第三导电层。在一实施例中,该半导体包括III-V族材料。

Description

无金的欧姆接触
技术领域
本公开大体涉及一种用于半导体器件的欧姆电性接触,并且更具体地涉及一种无金的欧姆接触。
背景技术
如在本领域中已知的,AlGaN/GAN高电子迁移率晶体管(HEMT)被越来越多地用于要求高频和高功率的应用中。为了发挥这些HEMT器件的潜力,需要达到低电阻、良好的边界锐度和可靠的欧姆接触。多数在器件中使用的低电阻欧姆接触使用Au作为顶层以降低薄层电阻并减少在为得到最低的比接触电阻率(lowest specific contact resistivity)所需要的高温退火期间的氧化。
在硅制造设备中Au的存在可能是能够引起灾难性的产量问题的严重的污染问题。对于需要在无金处理(例如CMOS硅制造)的环境中处理GaN器件晶片的应用,Au污染是严重的问题。
发明内容
根据本公开,提供一种器件,其具有III-V族半导体;以及与该半导体欧姆接触的无金的导电结构。
根据本公开,提供一种半导体结构,其具有:半导体;无金的导电结构,其与该半导体欧姆接触;以及一对导电层,其通过硅层分隔开,或者该一对导电层中的一个或二个与该硅层形成合金。
在一实施例中,该导电结构包括:难熔金属层,其布置为与该半导体接触;并且其中通过该硅层分隔开的或与该硅层形成合金的该一对导电层中的一个是该难熔金属层。
在一实施例中,第二硅层被布置在该一对导电层中的第二个之上,并且包括在该第二硅层上或与该第二硅层形成合金的第三导电层。
在一实施例中,提供一种半导体结构,其具有:半导体;导电结构,其与该半导体欧姆接触。该结构包括:第一金属层,其与该半导体欧姆接触;硅层,其与该第一金属层接触或形成合金;以及第二金属层,其与该硅层接触或形成合金。
在一实施例中,该半导体包括III-V族材料。
在一实施例中,该半导体包括GaN。
在一实施例中,该第一金属层是难熔金属。
在一实施例中,该第二金属层是铝。
在一实施例中,第二硅层与该第二金属层接触。
在一实施例中,第三金属层与该第二硅层接触或形成合金。
在一实施例中,该第三金属层是铂。
采用这种结构,无Au欧姆接触金属化,对于Si制造中的使用是至关重要的并且因此使得在Si加工厂中制造Si晶片上的异质集成(heterogeneous integration)的GaN成为可能。该电性接触具有良好的欧姆接触电阻。此外,由于避免使用贵金属Au,该接触具有相对低的成本。
在附图和下面的描述中介绍本公开的一个或多个实施例的细节。根据说明书和附图以及权利要求,本公开的其他特征、目的和优点将是显而易见的。
附图说明
图1是根据本公开的具有电性接触的晶体管器件的图;以及
图2是图1的晶体管器件中的电性接触的一个示例性电性接触的放大图。
在不同的附图中相同的参考标记表示相同的元件。
具体实施方式
现在参考图1,示出了一种晶体管器件10,该晶体管器件10在这里例如是AlGaN/GaN高电子迁移率晶体管(HEMT)结构。在此,在晶片(wafer)上形成该晶体管器件10,如所示的,该晶片具有单晶衬底12、在该衬底12上的GaN缓冲层14以及在该GaN层14上的半导体层16。该晶体管器件10分别具有栅电极17、以及源电极和漏电极18、20。该源电极和漏电极18、20是无金的电性接触并且二者与该半导体层16是欧姆接触的,这里的层16是III-V族AlGaN层。该源电极和漏电极18、20在结构上是相同的;作为其一个示例,这里在图2中详细地示出了源接触18。
源接触或漏接触是与该半导体层16欧姆接触的导电结构,并且包括:难熔金属层22(在这里是具有
Figure BPA0000181731520000038
范围的厚度的钛层),其与半导体层16接触;在该难熔金属层22上的硅层24,其具有
Figure BPA0000181731520000039
范围的厚度;在此例如是铝的导电层26,其在此具有
Figure BPA00001817315200000310
的厚度,与该硅层24接触;在该铝层26上的硅层28,其具有
Figure BPA00001817315200000311
范围的厚度;以及在此例如是铂的导电层30,其在此具有
Figure BPA00001817315200000312
的厚度,与该硅层26接触。
在这里,例如通过电子束蒸发在GaN/GaN HEMT晶片上形成该源电极或漏电极18、20。然后在特定的形成合金温度下的氮气氛中使该晶片形成合金以形成降低接触电阻的低电阻隔层(interlayer)。
现在应当认识到根据本公开的器件包括III-V族半导体和与该半导体欧姆接触的无金的导电结构。
还应当认识到根据本公开的半导体结构包括半导体;与该半导体欧姆接触的无金的导电结构,这种结构包括:一对导电层,其通过硅层分隔开,或者该对导电层的一个或二个与该硅层形成合金。该半导体结构包括一个或多个下列特征:其中该导电结构包括:被布置为与该半导体接触的难熔金属层,并且其中通过该硅层分隔开的该对导电层中的一个是该难熔金属层或硅与该难熔金属层的合金;第二硅层,其被布置于该对导电层中的第二个上,并且包括在该第二硅层上的第三导电层;其中该第一金属层是钛且该第三金属层是铂;其中该半导体是III-V族材料。
已描述了本公开的若干个实施例。然而,将理解的是在不脱离本公开的精神和范围的情况下可以做出各种修改。例如,应当理解的是,作为使用该结构的结果,这里的层可以与另一层形成合金以使得到的结构可包括硅和钛的合金、硅和铝的合金、和/或硅和铂的合金。因此,其他实施例在所述权利要求的范围内。

Claims (7)

1.一种器件,包括:
III-V族半导体;以及
无金的导电结构,其与所述半导体欧姆接触。
2.一种半导体结构,包括:
半导体;
无金的导电结构,其与所述半导体欧姆接触,这样的结构包括:
一对导电层,其由硅层分隔开,或者所述一对导电层中的一个或二个导电层与所述硅层形成合金。
3.根据权利要求2所述的半导体结构,其中,所述导电结构包括:
难熔金属层,其被布置为与该半导体接触;并且
其中,由所述硅层分隔开的所述一对导电层中的一个导电层是所述难熔金属层或硅与所述难熔金属层的合金。
4.根据权利要求3所述的半导体结构,包括被布置于所述一对导电层中的第二个导电层之上的第二硅层,并且包括在所述第二硅层上的第三导电层。
5.根据权利要求2所述的半导体结构,其中,第一金属层是钛,且第三金属层是铂。
6.根据权利要求5所述的半导体结构,其中,所述半导体是III-V族材料。
7.根据权利要求6所述的半导体结构,其中,所述半导体包括GaN。
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US13/152,481 US8466555B2 (en) 2011-06-03 2011-06-03 Gold-free ohmic contacts
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CN110226231A (zh) * 2017-02-21 2019-09-10 雷声公司 具有无金接触部的氮化物结构及形成这种结构的方法
CN113889534A (zh) * 2021-09-27 2022-01-04 南方科技大学 无金欧姆接触电极、半导体器件和射频器件及其制法

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CN114342088B (zh) * 2021-11-12 2024-01-09 英诺赛科(苏州)科技有限公司 半导体装置及其制造方法

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CN110192283A (zh) * 2017-02-21 2019-08-30 雷声公司 具有无金接触部的氮化物结构及形成这种结构的方法
CN110226231A (zh) * 2017-02-21 2019-09-10 雷声公司 具有无金接触部的氮化物结构及形成这种结构的方法
CN113889534A (zh) * 2021-09-27 2022-01-04 南方科技大学 无金欧姆接触电极、半导体器件和射频器件及其制法

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US20120305931A1 (en) 2012-12-06
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