CN104851894B - 阵列基板及其制备方法、显示装置 - Google Patents

阵列基板及其制备方法、显示装置 Download PDF

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CN104851894B
CN104851894B CN201510300781.0A CN201510300781A CN104851894B CN 104851894 B CN104851894 B CN 104851894B CN 201510300781 A CN201510300781 A CN 201510300781A CN 104851894 B CN104851894 B CN 104851894B
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electrode
array base
base palte
layer
patterning processes
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CN104851894A (zh
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宁策
张方振
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BOE Technology Group Co Ltd
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Abstract

本发明提供了一种阵列基板及其制备方法、显示装置，该阵列基板的制备方法至少包括以下步骤：形成第一电极层、栅金属层和第一非氧化物绝缘材料层，所述第一非氧化物绝缘材料层形成于所述栅金属层的上表面上；采用一次构图工艺形成包括所述第一电极和所述栅极的图形，在该构图工艺完成后，在所述栅极上还形成有第一非氧化物绝缘层以及在所述栅极下方还形成有属于所述第一电极层的第一子电极。该阵列基板的制备方法简单，有利于阵列基板和显示装置量产化。

Description

阵列基板及其制备方法、显示装置
技术领域
本发明属于液晶显示技术领域，具体涉及一种阵列基板和应用该阵列基板的显示装置。
背景技术
液晶显示面板通常包括阵列基板和彩膜基板。其中，阵列基板包括薄膜晶体管，薄膜晶体管包括a-si薄膜晶体管、多晶硅薄膜晶体管、氢化非晶硅薄膜晶体管和透明氧化物薄膜晶体管。
目前，为制备上述阵列基板，需要一层一层形成膜层和构图，因此，造成工艺过程复杂，例如，制备ADS模式的液晶显示面板的阵列基板，若晶体管为a-si晶体管，需要4次MASK工艺，若晶体管为氧化物晶体管，需要5次MASK工艺，从而造成产量低，经济效益差。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一，提出了一种阵列基板及其制备方法、应用该阵列基板的显示装置，可以简化制备工艺，进而可以提高产量和经济效益。
为解决上述问题之一，本发明提供了一种阵列基板的制备方法，所述阵列基板的制备方法至少包括以下步骤：形成第一电极层、栅金属层和第一非氧化物绝缘材料层，所述第一非氧化物绝缘材料层形成于所述栅金属层的上表面上；采用一次构图工艺形成包括第一电极和栅极的图形，在该构图工艺完成后，在所述栅极上还形成有第一非氧化物绝缘层以及在所述栅极下方还形成有属于所述第一电极层的第一子电极。
具体地，在形成第一电极层之后还包括形成半导体层；采用一次构图工艺形成包括所述第一电极、所述栅极的图形的同时，还形成包括有源层的图形。
具体地，在采用一次构图工艺形成包括所述第一电极、所述栅极和所述有源层的图形后，还包括以下步骤：形成第三绝缘层，采用一次构图工艺形成包括过孔的图形，所述过孔形成在所述有源层对应的区域，所述过孔作为所述源漏电极与所述有源层电连接的通道；在所述第三绝缘层上依次形成第二电极层和源漏金属层，采用一次构图工艺形成包括源电极、漏电极和第二电极的图形，在该构图工艺完成之后，在所述过孔位置处形成有位于所述源漏电极下方且属于所述第二电极层的第二子电极，所述源漏电极经由所述第二子电极与所述有源层电连接。
具体地，在形成所述第一电极层之后还包括形成半导体层、源漏金属层和第二非氧化物绝缘材料层，所述第二非氧化物绝缘材料层形成于所述源漏金属层的上表面上；采用一次构图工艺形成包括所述第一电极、所述栅极的图形的同时，还形成包括有源层、源电极和漏电极的图形，在该构图工艺完成后，在所述源电极和所述漏电极上均形成有第二非氧化绝缘层。
具体地，采用一次构图工艺形成包括所述第一电极、所述栅极、所述有源层、所述源电极和所述漏电极的图形后，还包括以下步骤：形成第三绝缘层，采用一次构图工艺形成包括过孔的图形，所述过孔形成于所述漏电极对应的区域且所述过孔贯穿所述第三绝缘层和所述第二非氧化物绝缘层，所述过孔作为所述漏电极与所述第二电极电连接的通道；在所述绝缘层上形成第二电极层，采用一次构图工艺形成包括所述第二电极的图形。
具体地，采用一次构图工艺形成包括所述第一电极和所述栅极的图形后，还包括以下步骤：形成第三绝缘层，在所述第三绝缘层上依次形成半导体层和源漏金属层，采用一次构图工艺对应形成包括有源层、源电极和漏电极的图形；形成所述第二电极层，采用一次构图工艺对应形成包括所述第二电极的图形。
具体地，所述栅金属层和所述源漏金属层的材料包括铜或铜合金。
具体地，所述第一非氧化物绝缘材料层和所述第二非氧化物绝缘材料层的材料包括氮化硅或者氮化铝。
具体地，在形成所述第一电极后，还包括，对所述第一电极进行退火工艺。
具体地，所述第二电极为狭缝状电极。
作为另外一个技术方案，本发明还提供一种阵列基板，所述阵列基板采用上述技术方案提供的阵列基板的制备方法制作。
作为另外一个技术方案，本发明还提供一种显示装置，其包括阵列基板，所述阵列基板采用上述技术方案提供的阵列基板。
本发明具有以下有益效果：
本发明提供的阵列基板的制备方法，先在栅金属层的上表面上形成第一非金属氧化物绝缘材料层，再采用一次构图工艺形成包括所述第一电极和所述栅极的图形之后，在栅极的表面上形成有第一非氧化物绝缘层，该第一非氧化物绝缘层可以在后续的工艺(例如，对第一电极进行退火工艺)中防止采用诸如铜等的易氧化导电材料的栅极被氧化。由此可知，本发明提供的阵列基板的制备方法与现有技术相比，在保证栅极不被氧化的前提下可采用一次构图工艺形成不仅包括第一电极还包括栅极的图形，也就是说，将至少两次构图工艺整合成一次构图工艺，因而可以至少减少一次构图工艺，从而可以简化工艺步骤，进而可以提高产量和经济效益。
本发明提供的阵列基板，其采用本发明另一技术方案提供的阵列基板的制备方法制备形成，因此，制备工艺简单，有利于阵列基板的产量化，提高经济效益。
本发明提供的显示装置，其采用本发明另一技术方案提供的阵列基板，阵列基板的制备过程简单，从而有利于阵列基板的产量化，从而有利于实现显示装置的量产，提高经济效益。
附图说明
图1a为本发明实施例一提供的阵列基板的制备方法在采用一次构图工艺形成包括第一电极和栅极的图形之后的状态图；
图1b为本发明实施例一提供的阵列基板的制备方法在采用一次构图工艺对应形成包括有源层、源电极和漏电极的图形之后的状态图；
图1c为本发明实施例一提供的阵列基板的制备方法在采用一次构图工艺对应形成包括第二电极的图形之后的状态图；
图2a为本发明实施例二提供的阵列基板的制备方法在采用一次构图工艺形成包括第一电极、栅极和有源层的图形之后的状态图；
图2b为本发明实施例二提供的阵列基板的制备方法采用一次构图工艺形成包括过孔的图形之后的状态图；
图2c为本发明实施例二提供的阵列基板的制备方法在采用一次构图工艺同时形成包括源电极、漏电极和第二电极的图形之后的状态图；
图2d为本发明实施例二提供的阵列基板的制备方法在采用一次构图工艺同时形成包括源电极、漏电极和第二电极的图形之后的另一种状态图；
图3a为本发明实施例三提供的阵列基板的制备方法在采用一次构图工艺形成包括第一电极、栅极、有源层、源电极和漏电极的图形之后的状态图；
图3b为本发明实施例三提供的阵列基板的制备方法在采用一次构图工艺形成包括过孔的图形之后的状态图；以及
图3c为本发明实施例三提供的阵列基板的制备方法在采用一次构图工艺形成包括第二电极的图形之后的状态图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图来对本发明提供的阵列基板及其制备方法、显示装置进行详细描述。
实施例一
本实施例提供的阵列基板的制备方法至少包括以下步骤：
形成第一电极层、栅金属层和第一非氧化物绝缘材料层，第一非氧化物绝缘材料层形成于栅金属层的上表面上。
采用一次构图工艺形成包括第一电极1和栅极2的图形，在该构图工艺完成之后，在栅极2的上表面上形成第一非氧化物绝缘层3以及在与栅极2下方还形成有属于第一电极层的第一子电极4，也就是说，第一电极层在该构图工艺之后形成包括第一子电极4和第一电极1的图形，如图1a所示。
具体地，第一非氧化物绝缘材料层的材料包括氮化硅或者氮化铝。栅金属层和源漏金属层的材料包括铜，由于铜的电导率较高，因此，可以有利于数据信号和扫描信号传导。
可以理解，本实施例提供的阵列基板的制备方法，借助采用诸如铜等的易氧化导电材料的栅极2上表面上形成的第一非氧化物绝缘层3，可以在执行后续工艺(例如：对第一电极1的退火工艺)时防止栅极2的表面被氧化，故可通过采用一次构图工艺形成不仅包括第一电极1还包括栅极2图形，这可以至少减少一次构图工艺，从而可以简化工艺步骤，进而可以提高产量和经济效益。
具体地，在本实施例中，在采用一次构图工艺形成包括第一电极1和栅极2的图形后之后还包括以下步骤：
形成第三绝缘层5，在第三绝缘层5上依次形成半导体层和源漏金属层，采用一次构图工艺对应形成包括有源层6、源电极71和漏电极72的图形，如图1b所示。
形成第二电极层，采用一次构图工艺对应形成包括第二电极8的图形，第二电极8为狭缝状的电极，如图1c所示。
并且，优选地，在形成第一电极1后，还包括对第一电极1进行退火工艺，以降低第一电极1的电阻，有利于第一电极1上加载的电压分布均匀。
值的一提的是，上述阵列基板的制备方法中还应包括形成用于实现扫描线和栅极2相连的过孔的过程，具体地，其不仅可以在上述的任一构图工艺中同时形成，还可以单独采用一次构图工艺形成。
需要说明的是，在本实施例中，第一电极1和第二电极8可以分别为公共电极和像素电极中一个和另一个。
实施例二：
本实施例提供的阵列基板的制备方法与上述实施例一提供的阵列基板的制备方法相类似，在此不再赘述，下面仅描述二者的不同点，具体地，在本实施例中：在形成第一电极层之后还包括形成半导体层，采用一次构图工艺形成包括第一电极1、栅极2的图形的同时，还形成包括有源层6的图形。
由上可知，在本实施例提供的阵列基板的制备方法，可以实现采用一次构图工艺形成不仅形成包括第一电极1还包括栅极2和有源层6的图形，如图2a所示，这同样可以至少减少一次构图工艺，从而可以简化工艺步骤，进而可以提高产量和经济效益。
优选地，在半导体层上还形成有欧姆接触材料层，在采用一次构图工艺形成包括第一电极1、栅极2和有源层6的图形之后，还实现在有源层6上形成有欧姆接触层9，如图2a所示，用以实现源漏电极7与a-si、多晶硅、单晶硅等材料的有源层6欧姆接触，若有源层6为氧化物半导体，则有源层6与源电极71、漏电极72电连接即为欧姆接触，因此不需要形成欧姆接触层9。
优选地，在采用一次构图工艺形成包括所述第一电极、所述栅极和所述有源层的图形后，还包括以下步骤：
形成第三绝缘层5，采用一次构图工艺形成包括过孔51的图形，过孔51形成在有源层6对应的区域，过孔51作为源漏电极7与有源层6电连接的通道，如图2b所示。
在第三绝缘层5上依次形成第二电极层和源漏金属层，采用一次构图工艺形成包括源电极71、漏电极72和第二电极8的图形，在该构图工艺完成之后，在过孔51位置处形成有位于源漏电极7下方且属于第二电极层的第二子电极10，源漏电极7经由第二子电极10与有源层6电连接，如图2c所示。
可以理解，采用一次构图工艺同时形成包括源电极71、漏电极72和第二电极8的图形，可以进一步简化阵列基板的制备工艺。
同样地，该阵列基板的制备方法中还应包括形成用于实现扫描线和栅极2相连的过孔的过程，具体地，其不仅可以在上述的任一构图工艺中同时形成，而且还可以单独采用一次构图工艺形成。在本实施例中，优选地，扫描线和栅极2相连的过孔在采用一次构图工艺实现第三绝缘层5上形成包括过孔51图形时同时形成。
需要说明的是，尽管在本实施例的图2b中，第三绝缘层5的与有源区6对应的区域仅设置有一个过孔51，这使得阵列基板的结构简单；但是，在实际应用中，如图2d所示，第三绝缘层5的与有源区6对应的区域还可以设置与源电极71和漏电极72分别的过孔51，这不仅有助于源电极71和漏电极72隔离，而且还可以保护沟道被刻蚀。
实施例三：
本实施例提供的阵列基板的制备方法与上述实施例一和二提供的阵列基板的制备方法相类似，在此不再赘述，下面仅描述三者的不同点，具体地，在本实施例中，在形成第一电极层之后还包括形成源漏金属层和第二非氧化物绝缘材料层，第二非氧化物绝缘材料层形成于源漏金属层的上表面上；采用一次构图工艺形成包括第一电极1、栅极2的图形的同时，还形成包括有源层6、源电极71和漏电极72的图形，在该构图工艺完成后，在源电极71和漏电极72上均形成有第二非氧化绝缘层11。可以理解，借助第二非氧化物绝缘层11可以防止采用诸如铜等易氧化导电材料的源电极71和漏电极72在后续工艺过程(例如，对第一电极1进行退火工艺)被氧化。
由此可知，本实施例提供的阵列基板的制备方法，可以实现采用一次构图工艺形成不仅形成包括第一电极1还包括栅极2、有源层6、源电极71和漏电极72的图形，如图3a所示，这同样可以至少减少一次构图工艺，从而可以简化工艺步骤，进而可以提高产量和经济效益。
在采用一次构图工艺形成包括所述第一电极、所述栅极、所述有源层、所述源电极和所述漏电极的图形后还包括以下步骤：
形成第三绝缘层5，采用一次构图工艺形成包括过孔51的图形，过孔51形成于漏电极72对应的区域且过孔51贯穿第三绝缘层5和第二非氧化物绝缘层11，过孔51作为漏电极72与第二电极8电连接的通道，如图3b所示。
在第三绝缘层5上形成第二电极层，采用一次构图工艺形成包括第二电极8的图形，如图3c所示。
作为另外一个技术方案，本发明实施例还提供的一种阵列基板，该阵列基板采用上述实施例一至三任一提供的阵列基板的制备方法制成。
本发明实施例提供的阵列基板，其采用本发明上述实施例一至三任一提供的阵列基板的制备方法制备形成，因此，制备工艺简单，有利于阵列基板的产量化，提高经济效益。
作为另外一个技术方案，本发明实施例还提供一种显示装置，其包括上述实施例提供的阵列基板。
本发明实施例提供的显示装置，其采用本发明另一技术方案提供的阵列基板，阵列基板的制备过程简单，从而有利于阵列基板的产量化，从而有利于实现显示装置的量产，提高经济效益。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (11)

1.一种阵列基板的制备方法，其特征在于，所述阵列基板的制备方法至少包括以下步骤：
形成第一电极层、栅金属层和第一非氧化物绝缘材料层，所述第一非氧化物绝缘材料层形成于所述栅金属层的上表面上；
在形成所述第一非氧化物绝缘材料层之后还包括形成半导体层、源漏金属层和第二非氧化物绝缘材料层，所述第二非氧化物绝缘材料层形成于所述源漏金属层的上表面上；
采用一次构图工艺形成包括第一电极和栅极的图形，在该构图工艺完成后，在所述栅极上还形成有第一非氧化物绝缘层以及在所述栅极下方还形成有属于所述第一电极层的第一子电极；采用一次构图工艺形成包括所述第一电极、所述栅极的图形的同时，还形成包括有源层、源电极和漏电极的图形，在该构图工艺完成后，在所述源电极和所述漏电极上均形成有第二非氧化绝缘层。
2.根据权利要求1所述的阵列基板的制作方法，其特征在于，在形成所述第一非氧化物绝缘材料层之后还包括形成半导体层；
采用一次构图工艺形成包括所述第一电极、所述栅极的图形的同时，还形成包括有源层的图形。
3.根据权利要求2所述的阵列基板的制备方法，其特征在于，在采用一次构图工艺形成包括所述第一电极、所述栅极和所述有源层的图形后，还包括以下步骤：
形成第三绝缘层，采用一次构图工艺形成包括过孔的图形，所述过孔形成在所述有源层对应的区域，所述过孔作为所述源电极和漏电极与所述有源层电连接的通道；
在所述第三绝缘层上依次形成第二电极层和源漏金属层，采用一次构图工艺形成包括源电极、漏电极和第二电极的图形，在该构图工艺完成之后，在所述过孔位置处形成有位于所述源漏电极下方且属于所述第二电极层的第二子电极，所述源漏电极经由所述第二子电极与所述有源层电连接。
4.根据权利要求3所述的阵列基板的制备方法，其特征在于，采用一次构图工艺形成包括所述第一电极、所述栅极、所述有源层、所述源电极和所述漏电极的图形后，还包括以下步骤：
形成第三绝缘层，采用一次构图工艺形成包括过孔的图形，所述过孔形成于所述漏电极对应的区域且所述过孔贯穿所述第三绝缘层和所述第二非氧化物绝缘层，所述过孔作为所述漏电极与所述第二电极电连接的通道；
在所述绝缘层上形成第二电极层，采用一次构图工艺形成包括所述第二电极的图形。
5.根据权利要求4所述的阵列基板的制备方法，其特征在于，采用一次构图工艺形成包括所述第一电极和所述栅极的图形后，还包括以下步骤：
形成第三绝缘层，在所述第三绝缘层上依次形成半导体层和源漏金属层，采用一次构图工艺对应形成包括有源层、源电极和漏电极的图形；
形成所述第二电极层，采用一次构图工艺对应形成包括所述第二电极的图形。
6.根据权利要求1所述的阵列基板的制备方法，其特征在于，所述栅金属层和所述源漏金属层的材料包括铜或铜合金。
7.根据权利要求1所述的阵列基板的制备方法，其特征在于，所述第一非氧化物绝缘材料层和所述第二非氧化物绝缘材料层的材料包括氮化硅或者氮化铝。
8.根据权利要求1-7任意一项所述的阵列基板的制备方法，其特征在于，在形成所述第一电极后，还包括，对所述第一电极进行退火工艺。
9.根据权利要求3、4、5任意一项所述的阵列基板的制备方法，其特征在于，所述第二电极为狭缝状电极。
10.一种阵列基板，其特征在于，所述阵列基板采用权利要求1-9任一所述的阵列基板的制备方法制作。
11.一种显示装置，其包括阵列基板，其特征在于，所述阵列基板采用权利要求10所述的阵列基板。
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