CN104733541A - 导电结构及其制作方法、阵列基板、显示装置 - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 239000000758 substrate Substances 0.000 title claims abstract description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 123
- 239000002184 metal Substances 0.000 claims abstract description 123
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 65
- 230000004888 barrier function Effects 0.000 claims abstract description 65
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- 239000003795 chemical substances by application Substances 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 7
- 238000001259 photo etching Methods 0.000 claims description 7
- 229910016027 MoTi Inorganic materials 0.000 claims description 6
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 238000009832 plasma treatment Methods 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 18
- 238000000926 separation method Methods 0.000 abstract description 9
- 238000005516 engineering process Methods 0.000 abstract description 8
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- 238000009826 distribution Methods 0.000 description 5
- 238000005260 corrosion Methods 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- 229910001257 Nb alloy Inorganic materials 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- DTSBBUTWIOVIBV-UHFFFAOYSA-N molybdenum niobium Chemical compound [Nb].[Mo] DTSBBUTWIOVIBV-UHFFFAOYSA-N 0.000 description 1
- 229910000476 molybdenum oxide Inorganic materials 0.000 description 1
- ZPZCREMGFMRIRR-UHFFFAOYSA-N molybdenum titanium Chemical compound [Ti].[Mo] ZPZCREMGFMRIRR-UHFFFAOYSA-N 0.000 description 1
- PQQKPALAQIIWST-UHFFFAOYSA-N oxomolybdenum Chemical compound [Mo]=O PQQKPALAQIIWST-UHFFFAOYSA-N 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- -1 therefore Chemical compound 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
本发明提供了一种导电结构及其制作方法、阵列基板、显示装置,该导电结构的制作方法包括:在基板上依次形成阻挡金属薄膜、与所述阻挡金属薄膜层叠设置的铜金属薄膜;在所述铜金属薄膜上形成预设的光刻胶图案;对所述阻挡金属薄膜以及所述铜金属薄膜进行刻蚀;对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理;采用剥离液剥离所述光刻胶图案。本发明实施方式提供的导电结构的制作方法,通过在采用湿法剥离工艺去除导电结构上的光刻胶前,对导电结构暴露出的侧壁进行氧化处理,使侧壁形成均一的金属氧化层,在进行湿法剥离时,能够有效改善铜金属薄膜与阻挡金属薄膜之间的界面分离现象。
Description
技术领域
本发明涉及显示领域,尤其涉及一种导电结构及其制作方法、阵列基板、显示装置。
背景技术
液晶显示面板因其质量轻、功耗低,辐射小、能大量节省空间等优点,现已取代传统的阴极射线管显示器,广泛应用于各个显示领域,如家庭、公共场所、办公场及个人电子相关产品等。
现有的液晶显示面板主要包括彩膜基板、阵列基板以及两基板之间的液晶层,随着液晶显示面板尺寸的增大以及显示性能要求的提高,要求阵列基板上的栅线和数据线具有更低的电阻,而采用铝制作的配线由于电阻系数较高,已经不能满足显示性能的要求,而铜的电阻系数比铝的电阻系数低的多,因此,使用铜作为栅线和数据线将成为今后的主流选择,目前,在采用铜制作阵列基板上配线的过程中,为了防止铜的扩散并增加其粘附力,一般需在铜金属薄膜的下方设置阻挡金属薄膜,然而,由于在不同金属之间的界面,其原子排列较不规则,因此界面能较大,当对铜金属薄膜及其下方的阻挡金属薄膜刻蚀完毕后,通过剥离液去除其上的剩余光刻胶时,与剥离液的接触很容易造成如图1所示的铜金属薄膜与阻挡金属薄膜之间的界面分离现象(undercut),从而影响产品品质。
发明内容
(一)要解决的技术问题
本发明要解决的技术问题是如何解决在采用铜材料制作阵列基板上配线的过程中发生的铜金属薄膜与阻挡金属薄膜之间的界面分离现象。
(二)技术方案
为解决上述技术问题,本发明的技术方案提供了一种导电结构的制作方法,包括:
在基板上依次形成阻挡金属薄膜、与所述阻挡金属薄膜层叠设置的铜金属薄膜;
在所述铜金属薄膜上形成预设的光刻胶图案;
对所述阻挡金属薄膜以及所述铜金属薄膜进行刻蚀;
对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理,以在所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁分别生成对应的金属氧化物层;
采用剥离液剥离所述光刻胶图案。
进一步地,所述阻挡金属薄膜的材料为Mo、MoNb或MoTi。
进一步地,对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理包括:对所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴漏出的侧壁进行氧等离子体处理。
进一步地,对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理包括:对所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴漏出的侧壁进行臭氧处理。
进一步地,对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理包括:将所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴漏出的侧壁置于空气中后加热处理。
为解决上述技术问题,本发明还提供了一种导电结构,包括层叠设置的阻挡金属层和铜金属层,且所述阻挡金属层的侧壁上和所述铜金属层的侧壁上分别形成有对应的金属氧化层。
进一步地,所述阻挡金属层的材料为Mo、MoNb或MoTi。
为解决上述技术问题,本发明还提供了一种阵列基板,包括栅线、数据线、源极、漏极、栅极,所述栅线、所述数据线、所述源极、所述漏极、所述栅极中至少一者为上述的导电结构。
为解决上述技术问题,本发明还提供了一种显示装置,包括上述的阵列基板。
(三)有益效果
本发明提供的导电结构的制作方法,通过在采用湿法剥离工艺去除导电结构上的光刻胶前,对导电结构暴露出的侧壁进行氧化处理,使侧壁形成均一的金属氧化层,减小了两金属层之间的界面与上下膜层之间的差异性,在进行湿法剥离时,减小水气药液残留造成腐蚀的可能性,有效改善铜金属薄膜与阻挡金属薄膜之间的界面分离现象(undercut),增加组件稳定性。
附图说明
图1是现有技术中在采用铜材料制作阵列基板上配线的过程中发生的铜金属薄膜与阻挡金属薄膜之间的界面分离现象的示意图;
图2是本发明实施方式提供的一种导电结构的制作方法的流程图;
图3~图7是本发明实施方式提供的一种制作导电结构的示意图。
具体实施方式
下面结合附图和实施例,对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明,但不用来限制本发明的范围。
图2是本发明实施方式提供的一种导电结构的制作方法的流程图,该导电结构的制作方法包括步骤S1~S5:
S1:在基板上依次形成阻挡金属薄膜、与所述阻挡金属薄膜层叠设置的铜金属薄膜,具体地,如图3所示,首先在基板100上形成一层阻挡金属薄膜200,其中,该阻挡金属薄膜200的材料可以为Mo(钼)、MoNb(钼铌合金)或MoTi(钼钛合金)等,而后再在该阻挡金属薄膜200上形成一层铜金属薄膜300;
S2:在所述铜金属薄膜上形成预设的光刻胶图案;具体地,可以首先在铜金属薄膜上涂覆一层光刻胶层,再采用掩膜版对光刻胶层进行曝光,使光刻胶形成光刻胶完全保留区域(对应于导电图形所在区域)和光刻胶完全去除区域(对应于导电图形之外的区域),对其显影处理后,光刻胶完全去除区域的光刻胶被完全去除,而只保留光刻胶完全保留区域的光刻胶,从而形成如图4所示的光刻胶图案400;
S3:对所述阻挡金属薄膜以及所述铜金属薄膜进行刻蚀;具体地,可以采用湿法刻蚀工艺完全刻蚀掉光刻胶完全去除区域的阻挡金属薄膜和铜金属薄膜,从而如图5所示形成所需图案的导电结构,其包括图案化的阻挡金属层210和铜金属层310;
S4:对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理,以在所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁分别生成对应的金属氧化物层;具体地,如图6所示,通过氧化处理后,阻挡金属层210和铜金属层310的侧壁上分别生成一层对应的金属氧化物层211和311,例如,若阻挡金属层210采用Mo(钼)材料制作而成,通过上述的氧化处理后,则在阻挡金属层210的侧壁上生成一层氧化钼层,在铜金属层310的侧壁上形成一层氧化铜层;
S5:采用剥离液剥离所述光刻胶图案,具体地,如图7所示,采用剥离液通过湿法剥离导电结构上方的光刻胶后,使得所需的导电结构完全呈现在基板上,并在由于阻挡金属层210和铜金属层310的侧壁上形成有均一的金属氧化物层,减小了两金属层之间的界面与上下膜层之间的差异性,在进行湿法剥离时,减小水气药液残留造成腐蚀的可能性,有效改善铜金属薄膜与阻挡金属薄膜之间的界面分离现象(undercut),增加组件稳定性。
优选地,在步骤S4中,可以采用(1)~(3)中的任一的方式对阻挡金属薄膜中暴露出的侧壁以及铜金属薄膜中暴露出的侧壁进行氧化处理:
(1)对阻挡金属薄膜中暴露出的侧壁以及铜金属薄膜中暴漏出的侧壁进行氧等离子体(O2plasma)处理;
(2)对阻挡金属薄膜中暴露出的侧壁以及铜金属薄膜中暴漏出的侧壁进行臭氧(O3)处理;
(3)将阻挡金属薄膜中暴露出的侧壁以及铜金属薄膜中暴漏出的侧壁置于空气中后加热处理。
本发明实施方式提供的导电结构的制作方法,通过在采用湿法剥离工艺去除导电结构上的光刻胶前,对导电结构暴露出的侧壁进行氧化处理,使侧壁形成均一的金属氧化层,减小了两金属层之间的界面与上下膜层之间的差异性,在进行湿法剥离时,减小水气药液残留造成腐蚀的可能性,有效改善铜金属薄膜与阻挡金属薄膜之间的界面分离现象(undercut),增加组件稳定性。
其中,本发明提供的上述导电结构的制作方法可用于制作阵列基板上的栅线、数据线、源极、漏极、栅极,通过上述方法,可以有效改善阵列基板上配线制作过程中发生的铜金属薄膜与阻挡金属薄膜之间的界面分离现象(undercut),提高产品的良率。
此外,本发明实施方式还提供了一种导电结构,该导电结构包括层叠设置的阻挡金属层和铜金属层,且所述阻挡金属层的侧壁上和所述铜金属层的侧壁上分别形成有对应的金属氧化层;
优选地,所述阻挡金属层的材料为Mo、MoNb或MoTi。具体地,该导电结构由上述的制作方法制作而成,通过在剥离光刻胶之前在导电结构的侧壁上形成均一的金属氧化层,从而有效改善铜金属薄膜与阻挡金属薄膜之间的界面分离现象(undercut),相比现有技术制作的导电结构,能够显著提高产品的可靠性。
另外,本发明还提供了一种阵列基板,该阵列基板包括栅线、数据线、源极、漏极、栅极,并且所述栅线、所述数据线、所述源极、所述漏极、所述栅极中至少一者为上述的导电结构。
本发明还提供了一种显示装置,包括上述的阵列基板。其中,本发明实施方式提供的显示装置可以是笔记本电脑显示屏、液晶显示器、液晶电视、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
以上实施方式仅用于说明本发明,而并非对本发明的限制,有关技术领域的普通技术人员,在不脱离本发明的精神和范围的情况下,还可以做出各种变化和变型,因此所有等同的技术方案也属于本发明的范畴,本发明的专利保护范围应由权利要求限定。
Claims (9)
1.一种导电结构的制作方法,其特征在于,包括:
在基板上依次形成阻挡金属薄膜、与所述阻挡金属薄膜层叠设置的铜金属薄膜;
在所述铜金属薄膜上形成预设的光刻胶图案;
对所述阻挡金属薄膜以及所述铜金属薄膜进行刻蚀;
对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理,以在所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁分别生成对应的金属氧化物层;
采用剥离液剥离所述光刻胶图案。
2.根据权利要求1所述的导电结构的制作方法,其特征在于,所述阻挡金属薄膜的材料为Mo、MoNb或MoTi。
3.根据权利要求1所述的导电结构的制作方法,其特征在于,对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理包括:对所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴漏出的侧壁进行氧等离子体处理。
4.根据权利要求1所述的导电结构的制作方法,其特征在于,对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理包括:对所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴漏出的侧壁进行臭氧处理。
5.根据权利要求1所述的导电结构的制作方法,其特征在于,对所述刻蚀后所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴露出的侧壁进行氧化处理包括:将所述阻挡金属薄膜中暴露出的侧壁以及所述铜金属薄膜中暴漏出的侧壁置于空气中后加热处理。
6.一种导电结构,其特征在于,包括层叠设置的阻挡金属层和铜金属层,且所述阻挡金属层的侧壁上和所述铜金属层的侧壁上分别形成有对应的金属氧化层。
7.根据权利要求6所述的导电结构,其特征在于,所述阻挡金属层的材料为Mo、MoNb或MoTi。
8.一种阵列基板,其特征在于,包括栅线、数据线、源极、漏极、栅极,所述栅线、所述数据线、所述源极、所述漏极、所述栅极中至少一者为权利要求6或7所述的导电结构。
9.一种显示装置,其特征在于,包括如权利要求8所述的阵列基板。
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