CN104659208A - Non-volatile resistive random access memory device and preparation method thereof - Google Patents
Non-volatile resistive random access memory device and preparation method thereof Download PDFInfo
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Abstract
A nonvolatile resistive random access memory comprises a lower electrode, a resistive functional layer and an upper electrode, and is characterized in that: a metal ion barrier layer is inserted between the upper electrode and the resistance change functional layer, so that metal conductive filaments formed in the resistance change functional layer in the programming process of the device can be prevented from entering the upper electrode. According to the nonvolatile resistive random access memory device and the manufacturing method thereof, the metal ion barrier layer is inserted between the inert electrode and the solid electrolyte resistive random function layer, so that metal conductive filaments formed in the Resistive Random Access Memory (RRAM) device are prevented from diffusing into the inert electrode layer in the programming process of the RRAM device, the phenomenon of wrong programming in the erasing process of the device is eliminated, and the reliability of the device is improved.
Description
Technical field
The invention belongs to microelectronics technology, particularly relate to a kind of device unit construction and manufacture method of non-volatile resistance-variable storing device (RRAM).
Background technology
Along with the needs that multimedia application, mobile communication etc. store Large Copacity, low-power consumption, non-volatility memorizer, the semiconductor device market share particularly shared by flash memory become increasing, also become a kind of considerable memory gradually.The main feature of non-volatility memorizer also can preserve stored information for a long time, the feature of its existing read-only memory when not powering up, and has again very high access speed.
Currently marketed non-volatility memorizer take flash memory as main flow, but flush memory device exists that operating voltage is excessive, service speed slow, endurance is good not and due to shortcomings such as tunnel oxide excessively thin in size micro process will cause memory time not long.Desirable non-volatility memorizer should possess the conditions such as operating voltage is low, structure simple, non-destructive reads, service speed is fast, memory time is long, device area is little, good endurance.Various new materials and devices is studied at present, attempt to reach above-mentioned target, the novel memory devices device of considerable part is wherein had all to adopt the change of resistance value to be used as the mode remembered, comprise resistance-variable storing device (RRAM, resistive switching memory).
Based on the sandwich structure of easy oxidation metal/solid-state electrolytic solution/inert metal, the non-volatile resistance-variable storing device that a class is important can be formed, be commonly called solid-state electrolytic solution base RRAM, programmable metallization device (PMC:Programmable Metallization CellMemory) or conducting bridge random asccess memory (CBRAM:Conductive BridgingRandom Access Memory).This kind of memory has the advantages such as structure is simple, speed is fast, low in energy consumption, and the extremely attention of industrial circle, becomes one of contenders of non-volatile holographic storage technology of future generation.
Its operation principle is: under the effect of electrical impulse outside, the anode easy oxidation metal of electrode of metal A (as, Cu, Ag and Ni etc.) under electric field action, be oxidized into metal ion A+, metal ion A+ transmits under the effect of electric field in solid-state electrolytic solution B, also finally reach inertia bottom electrode C to movable cathode, at bottom electrode C place, metal ion A+ is reduced into as metal A.Along with metal is constantly in bottom electrode C place deposition, finally reach top electrode A, form the filamentous metal guide electric bridge being communicated with upper/lower electrode, device resistance is in low resistive state; Under reversed electric field effect, this metal guide electric bridge disconnects, and device returns to high-impedance state.These two kinds of resistance states can be changed mutually in the effect of extra electric field.
But, because conventional inert metal electrode material is (as Pt, Au, Pd and W etc.) be polycrystalline structure, metallic atom/ion is caused easily to enter the alloy structure (document 1 forming easy oxidation metal and inert metal in inert electrode material, Y.C.Yang, F.Pan, Q.Liu, M.Liu, and F.Zeng, Nano Lett.9, 1636, 2009), metallic atom/ion also may move to the surface of inert electrode material by inert electrode material, form the nanostructure (document 2 of easy oxidation metal, J.J.Yang, J.P.Strachanm, Q.Xia, D.A.A.Ohlberg, P.J.Kuekes, R.D.Kelley, W.F.Stickle, D.R.Stewart, G.Medeiros-Ribeiro, and R.S.Williams, Adv.Mater.22, 4034, 2010).Metallic atom/ion enters inert material and is equivalent to also can form easy oxidation metal source at inert electrode place, this kind of RRAM device (conductive filament fracture) in the process of oppositely erasing is caused to there will be the phenomenon of programming by mistake (under reverse voltage, form metallic conduction filament), significant impact is caused on the reliability of device.
Summary of the invention
From the above mentioned, the object of the invention is to overcome above-mentioned technical difficulty, overcome the problem that metallic conduction filament that active electrode that the RRAM memory device based on solid-state electrolytic solution material exists formed enters into inert electrode material in programming process, providing a kind of new device structure by increasing metal ion barrier layer between inert electrode and solid state electrolysis liquid layer, improve the reliability of device.
For this reason, the invention provides a kind of non-volatile resistance-variable storing device, comprise bottom electrode, resistive functional layer, top electrode, it is characterized in that: between top electrode and resistive functional layer, insert metal ion barrier layer, the metallic conduction filament formed in resistive functional layer in device programming process can be stoped to enter top electrode.
Wherein, the material of bottom electrode is oxidizable metal material, such as, be at least one in Cu, Ag, Ni, Sn, Co, Fe, Mg or its combination; Alternatively, its thickness is 5nm ~ 500nm.
Wherein, the material of resistive functional layer is solid-state electrolytic solution or the binary oxide material with resistance transformation characteristic, such as, be CuS, AgS, AgGeSe, CuI
xs
y, ZrO
2, HfO
2, TiO
2, SiO
2, WO
x, NiO, CuO
x, ZnO, TaO
x, Y
2o
3any one or its combination; Alternatively, its thickness is 2nm ~ 200nm.
Wherein, the material of top electrode is inert metal material, be such as Pt, W, Au, Pd any one or its combination; Alternatively, its thickness such as 5nm ~ 500nm.
Wherein, the material on metal ion barrier layer be Ta, TaN, Ti, TiN, TiON, TaON, WN any one or its combination; Alternatively, its thickness is 2nm ~ 20nm.
The invention also discloses a kind of non-volatile resistance-variable storing device manufacture method, comprising: form bottom electrode on an insulating substrate; Form resistive functional layer on the bottom electrode; Resistive functional layer is formed metal ion barrier layer; Metal ion barrier layer forms top electrode, and wherein metal ion barrier layer can stop the metallic conduction filament formed in resistive functional layer in device programming process to enter top electrode.
Wherein, the formation process of bottom electrode and/or metal ion barrier layer and/or top electrode is electron beam evaporation, chemical vapour deposition (CVD), pulsed laser deposition, ald or magnetron sputtering.
Wherein, the formation process of resistive functional layer is electron beam evaporation, pulsed laser deposition, magnetron sputtering or sol-gel processing.
Wherein, the thickness of bottom electrode and/or top electrode is 5nm ~ 500nm; Optionally, the thickness of resistive functional layer is 2nm ~ 200nm; Optionally, the thickness on metal ion barrier layer is 2nm ~ 20nm.
Wherein, the material of bottom electrode is oxidizable metal material, such as, be at least one in Cu, Ag, Ni, Sn, Co, Fe, Mg or its combination; Optionally, the material of resistive functional layer is solid-state electrolytic solution or the binary oxide material with resistance transformation characteristic, such as, be CuS, AgS, AgGeSe, CuI
xs
y, ZrO
2, HfO
2, TiO
2, SiO
2, WO
x, NiO, CuO
x, ZnO, TaO
x, Y
2o
3any one or its combination; Optionally, the material of top electrode is inert metal material, be such as Pt, W, Au, Pd any one or its combination; Alternatively, the material on metal ion barrier layer be Ta, TaN, Ti, TiN, TiON, TaON, WN any one or its combination.
Wherein, periodic structure is formed in lower electrode surface; Optionally, the top electrode of polycrystalline changed into monocrystalline or increase domain.
According to non-volatile resistive memory of the present invention and manufacture method thereof, metal ion barrier layer is inserted between inert electrode and solid-state electrolytic solution resistance change functional layer, stop in RRAM device programming process, the metallic conduction filament formed in change resistance layer diffuses into inert electrode layer, the mistake programming phenomenon occurred in abatement device erase process, improves the reliability of device.
Accompanying drawing explanation
Technical scheme of the present invention is described in detail referring to accompanying drawing, wherein:
Fig. 1 is the cutaway view according to non-volatile resistive memory of the present invention;
Fig. 2 A-2D is the cutaway view according to non-volatile resistive memory manufacture method of the present invention; And
Fig. 3 is the schematic flow diagram according to non-volatile resistive memory manufacture method of the present invention.
Embodiment
Describe feature and the technique effect thereof of technical solution of the present invention in detail in conjunction with schematic embodiment referring to accompanying drawing, to disclose containing metal ion barrier layer to prevent non-volatile resistive memory and the manufacture method thereof of the mistake programming phenomenon occurred in device erase process.It is pointed out that structure like similar Reference numeral representation class, term " first " used in the application, " second ", " on ", D score etc. can be used for modifying various device architecture or manufacturing process.These modify the space of not hint institute's modification device architecture or manufacturing process unless stated otherwise, order or hierarchical relationship.
As shown in Figure 1, be the cutaway view according to non-volatile resistive memory of the present invention, it comprises dielectric substrate 11, lower conductive electrode 12, resistive functional layer 13, metal ion barrier layer 14 and upper conductive electrode 15.Wherein, top electrode 15 is the inert metal electrode such as Pt, W, Au, Pd, metal ion barrier layer 14 is Ta, TaN, Ti, TiN, TiON, TaON, WN etc., resistive functional layer 13 is for having solid-state electrolytic solution or the binary oxide material of resistance transformation characteristic, and lower electrode layer is the easy oxidation metals such as Cu, Ag, Ni.In programming process, the metal ion stoped in conductive filament diffuses in inert electrode layer by metal ion barrier layer, thus eliminates the phenomenon occurring programming by mistake in follow-up erase process, improves the reliability of device.
As shown in Fig. 2 A-2D and Fig. 3, it is the cutaway view that each step according to resistive memory manufacture method of the present invention is corresponding.
Particularly, as shown in Figure 2 A, conductive electrode 12 under dielectric substrate 11 being formed.There is provided dielectric substrate 11, it can be the hard substrates such as oxygen buried layer, sapphire (aluminium oxide), aluminium nitride, glass, quartz of silica on Si substrate, SOI substrate, can also be the flexible substrate such as resin, plastics.Adopt electron beam evaporation, chemical vapour deposition (CVD) (comprising PECVD, HDPCVD, MOCVD etc.), pulsed laser deposition, ald (ALD) or magnetically controlled sputter method, conductive electrode 12 under deposition in dielectric substrate 11.The material of electrode 12 is oxidizable metal material, be such as at least one in Cu, Ag, Ni, Sn, Co, Fe, Mg or its combination (such as with alloy form or stacked system), its thickness is 5nm ~ 500nm, is preferably 10 ~ 300nm and best 50 ~ 100nm, such as 80nm.Preferably, etching after adopting mask plate or periodically controlling deposition process parameters or deposition, periodic pattern (not shown) is formed on the surface of bottom electrode 12, to increase the contact area between bottom electrode 12 and the resistive functional layer on it, thus improve programming, efficiency of erasing.
Subsequently, as shown in Figure 2 B, bottom electrode 12 forms resistive functional layer 13.Resistive functional layer 13 may also be referred to as resistive memory medium layer, plays insulation buffer action between upper/lower electrode, and the metal ion of bottom electrode 12 can be allowed under electric field action to arrive top electrode 15 through resistive functional layer 13.The formation process of resistive functional layer 13 is electron beam evaporation, pulsed laser deposition, magnetron sputtering or sol-gel processing.Resistive functional layer 13, for having solid-state electrolytic solution or the binary oxide material of resistance transformation characteristic, is specially CuS, AgS, AgGeSe, CuI
xs
y, ZrO
2, HfO
2, TiO
2, SiO
2, WO
x, NiO, CuO
x, ZnO, TaO
x, Y
2o
3any one or its combination (comprising the various ways such as mixing, stacked, doping vario-property), thickness is 2nm ~ 200nm, preferred 5nm ~ 100nm, best 10nm ~ 60nm, best 40nm.Preferably, resistive functional layer 13 has smooth top surface.
Then, as shown in Figure 2 C, resistive functional layer 13 forms metal ion barrier layer 14.Adopt electron beam evaporation, chemical vapour deposition (CVD), pulsed laser deposition, ald or magnetically controlled sputter method, form metal ion barrier layer 14, its thickness is 2nm ~ 20nm, preferably 5nm ~ 15nm, best 10nm.Metal ion barrier layer 14 is enough fine and close in prevent the metal ion of bottom electrode 12 from penetrating the interstitial void arriving top electrode 15, also will have the formation that enough conductances are beneficial to conducting bridge.Particularly, the material on metal ion barrier layer 14 comprise Ta, TaN, Ti, TiN, TiON, TaON, WN any one or its combination.
Finally, as shown in Figure 2 D, metal ion barrier layer 14 forms conductive electrode 15.Adopt electron beam evaporation, chemical vapour deposition (CVD), pulsed laser deposition, ald or magnetically controlled sputter method, form the upper conductive electrode 15 be made up of inert metal material, be such as Pt, W, Au, Pd any one or its combine; Its thickness such as 5nm ~ 500nm, preferably 10 ~ 350nm also best 30 ~ 100nm, such as 70nm.Preferably, control deposition, sputtering technology temperature, or formed and to perform extra short annealing (RTA) or the laser annealing bearing temperature of resistive functional layer 13 (annealing temperature, the time be no more than) after electrode 15, the electrode 15 of polycrystalline structure (be limited by the temperature sensitivity of resistive functional layer in resistance-variable storing device, usual electrode 15 is polycrystalline) changed into monocrystalline or increase domain.In the process; because metal ion barrier layer 14 also serves the effect of insulation blocking further; reduce the heat or laser energy that conduct to resistive functional layer; the gap defect reducing electrode 15 surface under the prerequisite not changing resistive functional layer solid electrolyte characteristic can be made thus; further avoid the few part metals ion passing metal ion barrier layer 14 from bottom electrode 12 under large electric field and enter top electrode 15; completely avoid programming by mistake, significantly improve device reliability.
In one embodiment of the invention, first, electron beam evaporation process is utilized, with the thick SiO of 100nm
2insulating barrier Si substrate on, evaporation 100nm Ag film as lower conductive electrode layer; Then, the method for atomic deposition is adopted, the HfO of deposit one deck 5nm
2dielectric layer; Then magnetron sputtering technique is utilized, at HfO
2film grows the Ta that 5nm is thick; The Pt of last magnetron sputtering 50nm completes the basic structure of whole device as upper electrode material.Fig. 2 gives the process flow diagram of this embodiment.By contrast not containing the electrology characteristic of the electric resistance transition type memory part grown under the same process condition of Ta ion barrier, find that increase this layer of Ta ion barrier significantly can reduce device and occur missing the phenomenon of programming in erase process, improve the reliability of device.
According to non-volatile resistive memory of the present invention and manufacture method thereof, metal ion barrier layer is inserted between inert electrode and solid-state electrolytic solution resistance change functional layer, stop in RRAM device programming process, the metallic conduction filament formed in change resistance layer diffuses into inert electrode layer, the mistake programming phenomenon occurred in abatement device erase process, improves the reliability of device.
Although the present invention is described with reference to one or more exemplary embodiment, those skilled in the art can know without the need to departing from the scope of the invention and make various suitable change and equivalents to device architecture or method flow.In addition, can be made by disclosed instruction and manyly may be suitable for the amendment of particular condition or material and not depart from the scope of the invention.Therefore, object of the present invention does not lie in and is limited to as realizing preferred forms of the present invention and disclosed specific embodiment, and disclosed device architecture and manufacture method thereof will comprise all embodiments fallen in the scope of the invention.
Claims (10)
1. a non-volatile resistance-variable storing device, comprise bottom electrode, resistive functional layer, top electrode, it is characterized in that: between top electrode and resistive functional layer, insert metal ion barrier layer, the metallic conduction filament formed in resistive functional layer in device programming process can be stoped to enter top electrode.
2. non-volatile resistance-variable storing device as claimed in claim 1, wherein, the material of bottom electrode is oxidizable metal material, such as, be at least one in Cu, Ag, Ni, Sn, Co, Fe, Mg or its combination; Alternatively, its thickness is 5nm ~ 500nm.
3. non-volatile resistance-variable storing device as claimed in claim 1, wherein, the material of resistive functional layer is solid-state electrolytic solution or the binary oxide material with resistance transformation characteristic, such as, be CuS, AgS, AgGeSe, CuI
xs
y, ZrO
2, HfO
2, TiO
2, SiO
2, WO
x, NiO, CuO
x, ZnO, TaO
x, Y
2o
3any one or its combination; Alternatively, its thickness is 2nm ~ 200nm.
4. non-volatile resistance-variable storing device as claimed in claim 1, wherein, the material of top electrode is inert metal material, be such as Pt, W, Au, Pd any one or its combination; Alternatively, its thickness such as 5nm ~ 500nm.
5. non-volatile resistance-variable storing device as claimed in claim 1, wherein, the material on metal ion barrier layer is any one or its combination of Ta, TaN, Ti, TiN, TiON, TaON, WN; Alternatively, its thickness is 2nm ~ 20nm.
6. a non-volatile resistance-variable storing device manufacture method, comprising:
Form bottom electrode on an insulating substrate;
Form resistive functional layer on the bottom electrode;
Resistive functional layer is formed metal ion barrier layer;
Metal ion barrier layer forms top electrode,
Wherein metal ion barrier layer can stop the metallic conduction filament formed in resistive functional layer in device programming process to enter top electrode.
7. non-volatile resistance-variable storing device manufacture method as claimed in claim 6, wherein, the formation process of bottom electrode and/or metal ion barrier layer and/or top electrode is electron beam evaporation, chemical vapour deposition (CVD), pulsed laser deposition, ald or magnetron sputtering.
8. non-volatile resistance-variable storing device manufacture method as claimed in claim 6, wherein, the formation process of resistive functional layer is electron beam evaporation, pulsed laser deposition, magnetron sputtering or sol-gel processing.
9. non-volatile resistance-variable storing device manufacture method as claimed in claim 6, wherein, the thickness of bottom electrode and/or top electrode is 5nm ~ 500nm; Optionally, the thickness of resistive functional layer is 2nm ~ 200nm; Optionally, the thickness on metal ion barrier layer is 2nm ~ 20nm.
10. non-volatile resistance-variable storing device manufacture method as claimed in claim 6, wherein, the material of bottom electrode is oxidizable metal material, such as, be at least one in Cu, Ag, Ni, Sn, Co, Fe, Mg or its combination; Optionally, the material of resistive functional layer is solid-state electrolytic solution or the binary oxide material with resistance transformation characteristic, such as, be CuS, AgS, AgGeSe, CuI
xs
y, ZrO
2, HfO
2, TiO
2, SiO
2, WO
x, NiO, CuO
x, ZnO, TaO
x, Y
2o
3any one or its combination; Optionally, the material of top electrode is inert metal material, be such as Pt, W, Au, Pd any one or its combination; Alternatively, the material on metal ion barrier layer be Ta, TaN, Ti, TiN, TiON, TaON, WN any one or its combination.
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| CN110854267A (en) * | 2019-12-09 | 2020-02-28 | 上海华力微电子有限公司 | Resistive random access memory and manufacturing method thereof |
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| CN114429970A (en) * | 2022-01-25 | 2022-05-03 | 中国电子科技集团公司第五十八研究所 | Preparation method and structure of anti-radiation atomic switch device structure |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6927411B2 (en) * | 2000-02-11 | 2005-08-09 | Axon Technologies Corporation | Programmable structure, an array including the structure, and methods of forming the same |
| CN101071843A (en) * | 2007-05-18 | 2007-11-14 | 中国科学院上海微系统与信息技术研究所 | Resistor storage device unit structure and its preparing method |
| CN101572291A (en) * | 2009-06-12 | 2009-11-04 | 中国科学院上海微系统与信息技术研究所 | Storage unit structure for realizing multilevel storage and manufacture method thereof |
| US20100092656A1 (en) * | 2008-10-10 | 2010-04-15 | Axon Technologies Corporation | Printable ionic structure and method of formation |
| CN102487122A (en) * | 2010-12-06 | 2012-06-06 | 中国科学院微电子研究所 | Non-volatile resistance transformation memory and preparation method thereof |
| CN102610746A (en) * | 2011-01-20 | 2012-07-25 | 中国科学院微电子研究所 | Non-volatile resistance transition memory |
| CN102683585A (en) * | 2011-03-18 | 2012-09-19 | 中国科学院微电子研究所 | Resistance memory integrated with standard CMOS (complementary Metal oxide semiconductor) process and preparation method thereof |
| CN103022350A (en) * | 2012-12-28 | 2013-04-03 | 北京大学 | Memory resistor and production method thereof |
| CN103426920A (en) * | 2013-09-02 | 2013-12-04 | 南京大学 | Storage materials and application storage materials in nonvolatile charge trapping type memory device |
-
2015
- 2015-02-05 CN CN201510061731.1A patent/CN104659208A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6927411B2 (en) * | 2000-02-11 | 2005-08-09 | Axon Technologies Corporation | Programmable structure, an array including the structure, and methods of forming the same |
| CN101071843A (en) * | 2007-05-18 | 2007-11-14 | 中国科学院上海微系统与信息技术研究所 | Resistor storage device unit structure and its preparing method |
| US20100092656A1 (en) * | 2008-10-10 | 2010-04-15 | Axon Technologies Corporation | Printable ionic structure and method of formation |
| CN101572291A (en) * | 2009-06-12 | 2009-11-04 | 中国科学院上海微系统与信息技术研究所 | Storage unit structure for realizing multilevel storage and manufacture method thereof |
| CN102487122A (en) * | 2010-12-06 | 2012-06-06 | 中国科学院微电子研究所 | Non-volatile resistance transformation memory and preparation method thereof |
| CN102610746A (en) * | 2011-01-20 | 2012-07-25 | 中国科学院微电子研究所 | Non-volatile resistance transition memory |
| CN102683585A (en) * | 2011-03-18 | 2012-09-19 | 中国科学院微电子研究所 | Resistance memory integrated with standard CMOS (complementary Metal oxide semiconductor) process and preparation method thereof |
| CN103022350A (en) * | 2012-12-28 | 2013-04-03 | 北京大学 | Memory resistor and production method thereof |
| CN103426920A (en) * | 2013-09-02 | 2013-12-04 | 南京大学 | Storage materials and application storage materials in nonvolatile charge trapping type memory device |
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|---|---|---|---|---|
| CN107624199B (en) * | 2015-06-26 | 2022-02-25 | 英特尔公司 | Perpendicular magnetic memory with filament conduction path |
| CN107624199A (en) * | 2015-06-26 | 2018-01-23 | 英特尔公司 | Vertical magnetism memory with filament conductive path |
| WO2019062198A1 (en) * | 2017-09-29 | 2019-04-04 | 华中科技大学 | Gate tube device and preparation method therefor |
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| CN109950146A (en) * | 2019-03-04 | 2019-06-28 | 安阳师范学院 | A kind of method that electron beam evaporation prepares charge trap memory part |
| CN110400873A (en) * | 2019-08-27 | 2019-11-01 | 电子科技大学 | Memristor cynapse device and method based on the bis- change resistance layers of SiOx:Ag/TiOx |
| CN110459675A (en) * | 2019-08-27 | 2019-11-15 | 电子科技大学 | Based on SiOx:Ag/TaOxThe memristor cynapse device and method of double change resistance layers |
| CN110504358A (en) * | 2019-08-27 | 2019-11-26 | 电子科技大学 | Based on the memristor cynapse device and preparation method for mixing silver-colored silicon oxynitride and titanium oxide |
| CN110504359A (en) * | 2019-08-27 | 2019-11-26 | 电子科技大学 | Based on the memristor cynapse device and preparation method for mixing silver-colored silicon oxynitride and tantalum oxide |
| CN110444662A (en) * | 2019-08-27 | 2019-11-12 | 电子科技大学 | Based on SiOx:Ag/AlOxThe memristor cynapse device and method of double change resistance layers |
| CN110444661A (en) * | 2019-08-27 | 2019-11-12 | 电子科技大学 | Based on the memristor cynapse device and preparation method for mixing silver-colored silicon oxynitride and aluminium oxide |
| CN110854267A (en) * | 2019-12-09 | 2020-02-28 | 上海华力微电子有限公司 | Resistive random access memory and manufacturing method thereof |
| CN110854267B (en) * | 2019-12-09 | 2023-09-22 | 上海华力微电子有限公司 | Resistive random access memory and manufacturing method thereof |
| CN113113537A (en) * | 2021-04-08 | 2021-07-13 | 华中科技大学 | Threshold conversion device and preparation method thereof |
| CN114429970A (en) * | 2022-01-25 | 2022-05-03 | 中国电子科技集团公司第五十八研究所 | Preparation method and structure of anti-radiation atomic switch device structure |
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