CN102487122A - Non-volatile resistance transformation memory and preparation method thereof - Google Patents
Non-volatile resistance transformation memory and preparation method thereof Download PDFInfo
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- CN102487122A CN102487122A CN201010574352XA CN201010574352A CN102487122A CN 102487122 A CN102487122 A CN 102487122A CN 201010574352X A CN201010574352X A CN 201010574352XA CN 201010574352 A CN201010574352 A CN 201010574352A CN 102487122 A CN102487122 A CN 102487122A
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Abstract
The invention relates to the technical field of a semiconductor memory, which discloses a non-volatile resistance transformation memory of a binary oxide solid electrolyte film material containing a metal nano layer. The non-volatile resistance transformation memory comprises a first conducting electrode, a second conducting layer, a third conducting layer and a binary oxide solid electrolyte film arranged between the first conducting electrode and the third conducting electrode. The invention simultaneously discloses a method for preparing the non-volatile resistance transformation memory, which comprises the following steps of: forming an insulating layer on the dielectric layer of the first conducting electrode; forming a contact hole in the insulating layer to expose the first conducting electrode; forming the binary oxide solid electrolyte film containing the second conducting layer on the first conducting electrode in the contact hole; and forming the third conducting electrode on the binary oxide solid electrolyte film in the contact hole. According to the preparation method disclosed by the invention, the resistance transformation memory with small device area, high yield and good performance can be obtained, and a foundation is laid for large-scale integration and practicability of devices.
Description
Technical field
The present invention relates to the semiconductor memory technologies field, relate in particular to a kind of non-volatile resistance and change memory and preparation method thereof based on the binary oxide solid-state electrolytic solution material that has added the metal nano layer.
Background technology
Non-volatility memorizer, its main feature are under situation about not powering up, also can keep canned data for a long time, and the characteristics of its existing ROM have very high access speed again.Along with the needs to big capacity, low-power consumption storage such as multimedia application, mobile communication; Non-volatility memorizer; Flash memory (Flash) particularly, the market share of shared semiconductor device becomes increasing, also more and more becomes a kind of considerable type of memory.Currently marketed non-volatility memorizer is a main flow with flash memory (Flash), but flush memory device exists that operating voltage is excessive, service speed slow, endurance is good inadequately and since in device downsizing process thin excessively tunnel oxide shortcoming such as will cause that fall short of memory time.Desirable non-volatility memorizer should possess conditions such as operating voltage is low, simple in structure, non-destructive reads, service speed fast, memory time (Retention) is long, device area is little, endurance (Endurance) is good.
Many new materials and device are studied at present, attempted the target that reaches above-mentioned, wherein have the novel storage component part of considerable part all to adopt the change of resistance value to be used as memory style.Wherein electric resistance changing memory (RRAM) mainly is based on the resistance-variable characteristic of solid-oxide material.The basic structure of electric resistance transition type memory device is the sandwich structure of top electrode-functional layer material film-bottom electrode; The resistance value of this layer film under the effect of extra electric field, can have two kinds of different state (high resistant and low-resistance, can be used for respectively characterizing ' 0 ' with ' 1 ' two states) but and inverse conversion each other.RRAM has the potentiality at 32 nanometer nodes and the existing main flow FLASH memory of following replacement, thereby becomes a research direction of present novel storage component part.The material system of RRAM comprises at present: complicated oxide, for example Pr
1-xCa
xMnO
3Perovskite material SrTiO
3And SrZrO
3Deng; Simple binary metal oxide comprises the oxide of transiting group metal elements such as Cu, Ti, Ni, Ta, Hf, Nb.Compare other material with complex, binary oxide has simple in structure, and is easy to manufacture, and with the advantage of existing CMOS process compatible.The electric resistance changing characteristic of common binary oxide has very strong dependence to the growing method and the defect state of sull; Have the characteristic of electric resistance changing under extra electric field though there are a variety of binary oxide materials to come to light, they do not have a unified physical mechanism and explain.
Solid-state electrolytic solution electric resistance changing memory is the relatively clearer and more definite electric resistance changing memory of a kind of mechanism, mainly is based on formation and the disappearance of conductive nano bridge under the electric field action.The basic structure of solid-state electrolytic solution resistance change memory device is as shown in Figure 1, mainly is included in bottom electrode 101, the solid-state electrolytic solution film 102 of inertia under the electric field action, the top electrode 103 of easy oxidation under electric field action.The resistance value of this layer film can have two kinds of different state (high resistant and low-resistance, can be used for respectively characterizing ' 0 ' with ' 1 ' two states).The operation principle of device is as shown in Figure 2: electrode of metal A is oxidized into metal ion A+ under electric field action; The A+ ion transmits in solid-state electrolytic solution B, finally reaches inertia bottom electrode C, is reduced at the A+ of C place ion to be metal A; Along with metal A constantly deposits at the C place; Finally reach top electrode A, form the nano metal conducting bridge, device resistance is in low resistive state; Under the reversed electric field effect, this nano metal conducting bridge breaks off, and device is returned to high-impedance state.Such two resistance states can be used for respectively characterizing ' 0 ' and ' 1 ', and as shown in Figure 3, these two kinds of resistance states can be changed under the effect of extra electric field each other.
But the present solid-state electrolytic solution material that proposes all is that sulphur is material usually, CuS for example, Ag-Ge-Se, Ge-Se; ZnCdS, AgI, Cu-Ge-S or the like; As everyone knows, these sulphur are that material need take very complicated technology to avoid polluting in CMOS technology, have therefore increased manufacturing cost.Adopt binary oxide as the solid-state electrolytic solution material have low cost of manufacture, technology is simple and the advantage of CMOS process compatible.In addition, the electric resistance changing characteristic of binary oxide solid-state electrolytic solution electric resistance changing memory and the defect state in the binary oxide material have very strong relation.Because the defect state that self-sow forms is difficult to Artificial Control, thus cause at present based on the productive rate of the storage component part of Dyadic transition group metallic oxide material resistance conversion characteristic not high, unstable properties.If can in device, add the metal nano layer, then can artificially modulate the distribution of defect state in oxide layer, the productive rate of device will obtain bigger raising so.
Summary of the invention
The technical problem that (one) will solve
To the deficiency that above-mentioned existing electric resistance changing memory exists, the object of the present invention is to provide a kind of simple binary oxide that adopts to change storage component part as the non-volatile resistance that memory property is uniform and stable, device yield is high that has that the solid-state electrolytic solution material has also added the metal nano layer therein.
Another object of the present invention is to provide a kind of technology is simple, cost is low preparation to change the method for memory based on the non-volatile resistance of the binary oxide solid-state electrolytic solution thin-film material that contains the metal nano layer.
(2) technical scheme
Be an aspect that achieves the above object, the invention provides a kind of non-volatile resistance and change memory that be made based on the binary oxide solid-state electrolytic solution thin-film material that contains the metal nano layer, this memory comprises:
First conductive electrode;
The first binary oxide solid-state electrolytic solution thin layer on first conductive electrode;
Second conductive layer on the first binary oxide solid-state electrolytic solution thin layer;
The second binary oxide solid-state electrolytic solution thin layer on second conductive layer; And
The 3rd conductive electrode on the second binary oxide solid-state electrolytic solution thin layer.
Be an aspect that achieves the above object, the present invention also provides the method for a kind of preparation based on the non-volatile resistance transformation memory of the binary oxide solid-state electrolytic solution thin-film material that contains the metal nano layer, may further comprise the steps:
On the dielectric layer that contains first conductive electrode, form insulating barrier;
In insulating barrier, form contact hole to expose first conductive electrode;
In contact hole, on first conductive electrode, form the first binary oxide solid-state electrolytic solution thin layer;
In contact hole, on the first binary oxide solid-state electrolytic solution thin layer, form second conductive layer;
In contact hole, on second conductive layer, form the second binary oxide solid-state electrolytic solution thin layer; And
In contact hole, on the second binary oxide solid-state electrolytic solution thin layer, form the 3rd conductive electrode.
Be another aspect that achieves the above object, the invention provides a kind of non-volatile resistance and change memory that be made based on the binary oxide solid-state electrolytic solution thin-film material that contains the metal nano layer, this memory comprises:
First conductive electrode;
Second conductive layer on first conductive electrode;
Binary oxide solid-state electrolytic solution thin layer on second conductive layer; And
The 3rd conductive electrode on the binary oxide solid-state electrolytic solution thin layer.
Be another aspect that achieves the above object, the present invention also provides the method for a kind of preparation based on the non-volatile resistance transformation memory of the binary oxide solid-state electrolytic solution thin-film material that contains the metal nano layer, may further comprise the steps:
On the dielectric layer that contains first conductive electrode, form insulating barrier;
In insulating barrier, form contact hole to expose first conductive electrode;
In contact hole, on first conductive electrode, form second conductive layer;
In contact hole, on second conductive layer, form binary oxide solid-state electrolytic solution thin layer; And
In contact hole, on binary oxide solid-state electrolytic solution thin layer, form the 3rd conductive electrode.
(3) beneficial effect
Can find out that from technique scheme the present invention has following beneficial effect:
1, utilizes the present invention, adopt the simple binary oxide, make the electric resistance changing memory have material with technology is simple, device performance is prone to the advantage controlled as the solid-state electrolytic solution material.
2, utilize the present invention; In binary oxide solid-state electrolytic solution film and between bottom electrode and binary oxide solid-state electrolytic solution film, introduce the metal nano layer; Can greatly improve the productive rate of device and stability, the homogeneity of device stores performance so that the distribution of defect state in binary oxide solid-state electrolytic solution film is more controlled and even.
3, utilize the present invention, that storage component part has is simple in structure, easy of integration, cost is low, with the advantage of conventional silicon planar CMOS process compatible, help extensive promotion and application of the present invention.
4, utilize the present invention, the processing technology of device and traditional cmos process are compatible.
5, utilize the present invention; Adopt first conductive electrode (the being bottom electrode) structure in the embedding medium; Help changing the integrated of memory and transistor or diode based on the non-volatile resistance of the binary oxide solid-state electrolytic solution thin-film material that contains the metal nano layer; Be easy to the copper-connection backend process integrated, thereby lay the first stone for the extensive integrated and practicability of device.
Description of drawings
Fig. 1 is the basic structure sketch map of solid-state electrolytic solution electric resistance changing storage component part;
Fig. 2 is the operation principle sketch map of existing solid-state electrolytic solution resistance change memory;
Fig. 3 is the desirable i-v curve sketch map of solid-state electrolytic solution electric resistance changing memory;
Fig. 4 is positioned at preparation technology's flow process and the device architecture sketch map that non-volatile resistance among the binary oxide solid-state electrolytic solution material changes memory for the metal nano layer;
Fig. 5 is the metal nano layer changes memory at the non-volatile resistance among between binary oxide solid-state electrolytic solution material and the bottom electrode preparation technology's flow process and a device architecture sketch map.
Embodiment
For making the object of the invention, technical scheme and advantage clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, to further explain of the present invention.
Shown in Fig. 4-7, Fig. 4-7 is positioned at the device architecture sketch map that non-volatile resistance among the binary oxide solid-state electrolytic solution material changes memory for the metal nano layer.This memory comprises: contain the second binary oxide solid-state electrolytic solution thin layer 407 in second conductive layer 406 in the first binary oxide solid-state electrolytic solution thin layer 405 in dielectric layer 401, insulating barrier 403 and contact hole 404 thereof, the contact hole 404 of first conductive electrode 402, the contact hole 404, the contact hole 404, the 3rd conductive electrode 408 in the contact hole 404.
Preparation technology's flow process that the metal nano layer of preparation shown in Fig. 4-7 is positioned at the non-volatile resistance transformation memory among the binary oxide solid-state electrolytic solution material is following:
Shown in Fig. 4-1, adopt the dielectric layer 401 that contains first conductive electrode 402 as substrate, shown in Fig. 4-2, on this substrate, adopting chemical gaseous phase depositing process to form thickness is the insulating barrier 403 of 50 to 300 nanometers;
Shown in Fig. 4-3, adopting photoetching and dry etch process in insulating barrier 403, to form diameter is that the contact hole 404 of 50 to 200 nanometers is to expose first conductive electrode 402;
Shown in Fig. 4-4, in contact hole 404, on first conductive electrode 402, adopt a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD) to form the first binary oxide solid-state electrolytic solution thin layer 405 that thickness is 5 to 100 nanometers;
Shown in Fig. 4-5, in contact hole 404, on the first binary oxide solid-state electrolytic solution thin layer 405, adopt a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD) to form second conductive layer 406 that thickness is 1 to 3 nanometer;
Shown in Fig. 4-6, in contact hole 404, on second conductive layer 406, adopt a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD) to form the second binary oxide solid-state electrolytic solution thin layer 407 that thickness is 5 to 100 nanometers;
Shown in Fig. 4-7, in contact hole 404, on the second binary oxide solid-state electrolytic solution thin layer 407, adopt a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD) to form the 3rd conductive electrode 408 that thickness is 30 to 100 nanometers.
Shown in Fig. 5-6, Fig. 5-6 is positioned at the device architecture sketch map of the non-volatile resistance transformation memory between binary oxide solid-state electrolytic solution material and the bottom electrode (i.e. first conductive electrode) for the metal nano layer.This memory comprises: contain second conductive layer 505 in dielectric layer 501, insulating barrier 503 and contact hole 504 thereof, the contact hole 504 of first conductive electrode 502, the binary oxide solid-state electrolytic solution thin layer 506 in the contact hole 504, the 3rd conductive electrode 507 in the contact hole 504.
Preparation technology's flow process that the metal nano layer of preparation shown in Fig. 5-6 is positioned at the non-volatile resistance transformation memory between binary oxide solid-state electrolytic solution material and the bottom electrode (i.e. first conductive electrode) is following:
Shown in Fig. 5-1, adopt the dielectric layer 501 that contains first conductive electrode 502 as substrate, shown in Fig. 5-2, on this substrate, adopting chemical gaseous phase depositing process to form thickness is the insulating barrier 503 of 50 to 300 nanometers;
Shown in Fig. 5-3, adopting photoetching and dry etch process in insulating barrier 503, to form diameter is that the contact hole 504 of 50 to 200 nanometers is to expose first conductive electrode 502;
Shown in Fig. 5-4, in contact hole 504, on first conductive electrode 502, adopt a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD) to form second conductive layer 505 that thickness is 1 to 3 nanometer;
Shown in Fig. 5-5, in contact hole 504, on second conductive layer 505, adopt a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD) to form the binary oxide solid-state electrolytic solution thin layer 506 that thickness is 10 to 200 nanometers;
Shown in Fig. 5-6, in contact hole 504, on binary oxide solid-state electrolytic solution thin layer 506, adopt a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD) to form the 3rd conductive electrode 507 that thickness is 30 to 100 nanometers.
Embodiment one
In one embodiment of the invention; As shown in Figure 4; To embed platinum in the silica medium 401 as first conductive electrode 402; Adopt the silicon nitride dielectric layer 403 of chemical gaseous phase depositing process electrode one deck 150 nanometer thickness; Adopt photoetching and dry etch process in silicon nitride dielectric layer 403, to form the contact hole 404 that diameter is 150 nanometers; In contact hole 404,, accomplish the basic structure of entire device through the silver-colored nanometer layer (second conductive layer 406) of the electron beam evaporation process zirconia layer of deposit 25 nanometer thickness (the first solid-state electrolytic solution thin layer 405), 2 nanometer thickness successively, the zirconia layer (the second solid-state electrolytic solution thin layer 407) of 25 nanometer thickness, the silver-colored top electrode (the 3rd conductive electrode 408) of 100 nanometer thickness.
Embodiment two
In another embodiment of the present invention; As shown in Figure 5; To embed tungsten in the silica medium 501 as first conductive electrode 502; Adopt the silicon nitride dielectric layer 503 of chemical gaseous phase depositing process electrode one deck 90 nanometer thickness; Adopt photoetching and dry etch process in silicon nitride dielectric layer 503, to form the contact hole 504 that diameter is 70 nanometers, in contact hole 504,, accomplish the basic structure of entire device through the hafnium oxide layer (solid-state electrolytic solution thin layer 506) of the magnetron sputtering technique copper nanometer layer of deposit 2 nanometer thickness (second conductive layer 505), 40 nanometer thickness successively, the Cu top electrode (the 3rd conductive electrode 507) of 50 nanometer thickness.
Above-described specific embodiment; The object of the invention, technical scheme and beneficial effect have been carried out further explain, and institute it should be understood that the above is merely specific embodiment of the present invention; Be not limited to the present invention; All within spirit of the present invention and principle, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (29)
1. a non-volatile resistance changes memory, is made based on the binary oxide solid-state electrolytic solution thin-film material that contains the metal nano layer, it is characterized in that this memory comprises:
First conductive electrode;
The first binary oxide solid-state electrolytic solution thin layer on first conductive electrode;
Second conductive layer on the first binary oxide solid-state electrolytic solution thin layer;
The second binary oxide solid-state electrolytic solution thin layer on second conductive layer; And
The 3rd conductive electrode on the second binary oxide solid-state electrolytic solution thin layer.
2. non-volatile resistance according to claim 1 changes memory; It is characterized in that; The material that said first conductive electrode adopts is metal or the conductive compound that under electric field action, is inertia, comprises a kind of in tungsten, titanium nitride, tantalum nitride, platinum, gold, the graphite.
3. non-volatile resistance according to claim 1 changes memory; It is characterized in that the material that the said first binary oxide solid-state electrolytic solution thin layer adopts is a kind of in hafnium oxide, zirconia, aluminium oxide, silica, tungsten oxide, tantalum oxide, nickel oxide, titanium oxide, cupric oxide, zinc oxide, manganese oxide, magnesia, niobium oxide, vanadium oxide and the molybdenum oxide.
4. non-volatile resistance according to claim 1 changes memory; It is characterized in that; Said second conductive layer is a metal nano layer; The material that the material of said second conductive layer adopts is the metal that under electric field action, is prone to be oxidized to metal ion, comprises a kind of in copper, silver, iron, zinc, nickel, the mercury.
5. non-volatile resistance according to claim 1 changes memory; It is characterized in that the material that the said second binary oxide solid-state electrolytic solution thin layer adopts is a kind of in hafnium oxide, zirconia, aluminium oxide, silica, tungsten oxide, tantalum oxide, nickel oxide, titanium oxide, cupric oxide, zinc oxide, manganese oxide, magnesia, niobium oxide, vanadium oxide and the molybdenum oxide.
6. non-volatile resistance according to claim 1 changes memory, it is characterized in that, the material that said the 3rd conductive electrode adopts is the metal that under electric field action, is prone to be oxidized to metal ion, comprises a kind of in copper, silver, iron, zinc, nickel, the mercury.
7. non-volatile resistance according to claim 1 changes memory, it is characterized in that the thickness of the said first binary oxide solid-state electrolytic solution thin layer is 5 to 100 nanometers.
8. non-volatile resistance according to claim 1 changes memory, it is characterized in that the thickness of said second conductive layer is 1 to 3 nanometer.
9. non-volatile resistance according to claim 1 changes memory, it is characterized in that the thickness of the said second binary oxide thin layer is 5 to 100 nanometers.
10. one kind prepares the method that the said non-volatile resistance of claim 1 changes memory, it is characterized in that, may further comprise the steps:
On the dielectric layer that contains first conductive electrode, form insulating barrier;
In insulating barrier, form contact hole to expose first conductive electrode;
In contact hole, on first conductive electrode, form the first binary oxide solid-state electrolytic solution thin layer;
In contact hole, on the first binary oxide solid-state electrolytic solution thin layer, form second conductive layer;
In contact hole, on second conductive layer, form the second binary oxide solid-state electrolytic solution thin layer; And
In contact hole, on the second binary oxide solid-state electrolytic solution thin layer, form the 3rd conductive electrode.
11. the method for preparing non-volatile resistance transformation memory according to claim 10; It is characterized in that; In the said step that on the dielectric layer that contains first conductive electrode, forms insulating barrier; The material that said first conductive electrode adopts is metal or the conductive compound that under electric field action, is inertia; Comprise a kind of in tungsten, titanium nitride, tantalum nitride, platinum, gold, the graphite, the material that said dielectric layer adopts is a kind of in silicon nitride, silica, the silicon oxynitride or their combination, and the material that said insulating barrier adopts is a kind of in silicon nitride, silica, the silicon oxynitride or their combination; The method of said formation insulating barrier is chemical vapour deposition (CVD), and the thickness of said insulating barrier is 50 to 300 nanometers.
12. the method for preparing non-volatile resistance transformation memory according to claim 10; It is characterized in that; The said contact hole that in insulating barrier, forms is with in the step that exposes first conductive electrode; The diameter of said contact hole is 50 to 200 nanometers, and the method for said formation contact hole is photoetching and etching.
13. the method for preparing non-volatile resistance transformation memory according to claim 10; It is characterized in that; In the said step that in contact hole, on first conductive electrode, forms the first binary oxide solid-state electrolytic solution thin layer; The material that the said first binary oxide solid-state electrolytic solution thin layer adopts is a kind of in hafnium oxide, zirconia, aluminium oxide, silica, tungsten oxide, tantalum oxide, nickel oxide, titanium oxide, cupric oxide, zinc oxide, manganese oxide, magnesia, niobium oxide, vanadium oxide and the molybdenum oxide; The thickness of the said first binary oxide solid-state electrolytic solution thin layer is 5 to 100 nanometers, and the method for the said formation first binary oxide solid-state electrolytic solution thin layer is a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD).
14. the method for preparing non-volatile resistance transformation memory according to claim 10; It is characterized in that; In the said step that in contact hole, on the first binary oxide solid-state electrolytic solution thin layer, forms second conductive layer; Said second conductive layer is a metal nano layer, and the material that said second conductive layer adopts is for being prone to be oxidized to the metal of metal ion under electric field action, comprises a kind of in copper, silver, iron, zinc, nickel, the mercury; The thickness of said second conductive layer is 1 to 3 nanometer; The method of said formation second conductive layer is a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD).
15. the method for preparing non-volatile resistance transformation memory according to claim 10; It is characterized in that; In the said step that in contact hole, on second conductive layer, forms the second binary oxide solid-state electrolytic solution thin layer, the material that the said second binary oxide solid-state electrolytic solution thin layer adopts is a kind of in hafnium oxide, zirconia, aluminium oxide, silica, tungsten oxide, tantalum oxide, nickel oxide, titanium oxide, cupric oxide, zinc oxide, manganese oxide, magnesia, niobium oxide, vanadium oxide and the molybdenum oxide; The thickness of the said second binary oxide solid-state electrolytic solution thin layer is 5 to 100 nanometers; The method of the said formation second binary oxide solid-state electrolytic solution thin layer is a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD).
16. the method for preparing non-volatile resistance transformation memory according to claim 10; It is characterized in that; In the said step that in contact hole, on the second binary oxide solid-state electrolytic solution thin layer, forms the 3rd conductive electrode; The material that said the 3rd conductive electrode adopts is for being prone to be oxidized to the metal of metal ion under electric field action, comprise a kind of in copper, silver, iron, zinc, nickel, the mercury; The method of said formation the 3rd conductive electrode is a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD); The thickness of said the 3rd conductive electrode is 30 to 100 nanometers.
17. a non-volatile resistance changes memory, is made based on the binary oxide solid-state electrolytic solution thin-film material that contains the metal nano layer, it is characterized in that this memory comprises:
First conductive electrode;
Second conductive layer on first conductive electrode;
Binary oxide solid-state electrolytic solution thin layer on second conductive layer; And
The 3rd conductive electrode on the binary oxide solid-state electrolytic solution thin layer.
18. non-volatile resistance according to claim 17 changes memory; It is characterized in that; The material that said first conductive electrode adopts is metal or the conductive compound that under electric field action, is inertia, comprises a kind of in tungsten, titanium nitride, tantalum nitride, platinum, gold, the graphite.
19. non-volatile resistance according to claim 17 changes memory; It is characterized in that; Said second conductive layer is a metal nano layer; The material that said second conductive layer adopts is the metal that under electric field action, is prone to be oxidized to metal ion, comprises a kind of in copper, silver, iron, zinc, nickel, the mercury.
20. non-volatile resistance according to claim 17 changes memory; It is characterized in that the material that said binary oxide solid-state electrolytic solution thin layer adopts is a kind of in hafnium oxide, zirconia, aluminium oxide, silica, tungsten oxide, tantalum oxide, nickel oxide, titanium oxide, cupric oxide, zinc oxide, manganese oxide, magnesia, niobium oxide, vanadium oxide and the molybdenum oxide.
21. non-volatile resistance according to claim 17 changes memory, it is characterized in that, the material that said the 3rd conductive electrode adopts is the metal that under electric field action, is prone to be oxidized to metal ion, comprises a kind of in copper, silver, iron, zinc, nickel, the mercury.
22. non-volatile resistance according to claim 17 changes memory, it is characterized in that the thickness of said second conductive layer is 1 to 3 nanometer.
23. non-volatile resistance according to claim 17 changes memory, it is characterized in that the thickness of said binary oxide thin layer is 10 to 200 nanometers.
24. one kind prepares the method that the said non-volatile resistance of claim 17 changes memory, it is characterized in that, may further comprise the steps:
On the dielectric layer that contains first conductive electrode, form insulating barrier;
In insulating barrier, form contact hole to expose first conductive electrode;
In contact hole, on first conductive electrode, form second conductive layer;
In contact hole, on second conductive layer, form binary oxide solid-state electrolytic solution thin layer; And
In contact hole, on binary oxide solid-state electrolytic solution thin layer, form the 3rd conductive electrode.
25. the method for preparing non-volatile resistance transformation memory according to claim 24; It is characterized in that; In the said step that on the dielectric layer that contains first conductive electrode, forms insulating barrier; The material that said first conductive electrode adopts is for being the metal or the conductive compound of inertia under electric field action; Comprise a kind of in tungsten, titanium nitride, tantalum nitride, platinum, gold, the graphite, the material that said dielectric layer adopts is a kind of in silicon nitride, silica, the silicon oxynitride or their combination, and the material that said insulating barrier adopts is a kind of in silicon nitride, silica, the silicon oxynitride or their combination; The method of said formation insulating barrier is chemical vapour deposition (CVD), and the thickness of said insulating barrier is 50 to 300 nanometers.
26. the method for preparing non-volatile resistance transformation memory according to claim 24; It is characterized in that; The said contact hole that in insulating barrier, forms is with in the step that exposes first conductive electrode; The diameter of said contact hole is 50 to 200 nanometers, and the method for said formation contact hole is photoetching and etching.
27. the method for preparing non-volatile resistance transformation memory according to claim 24; It is characterized in that; In the said step that in contact hole, on first conductive electrode, forms second conductive layer; Said second conductive layer is a metal nano layer, and the material that said second conductive layer adopts is for be oxidized to the metal of metal ion easily under electric field action, comprises a kind of in copper, silver, iron, zinc, nickel, the mercury; The thickness of said second conductive layer is 1 to 3 nanometer; The method of said formation second conductive layer is a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD).
28. the method for preparing non-volatile resistance transformation memory according to claim 24; It is characterized in that; In the said step that in contact hole, on second conductive layer, forms binary oxide solid-state electrolytic solution thin layer, the material that said binary oxide solid-state electrolytic solution thin layer adopts is a kind of in hafnium oxide, zirconia, aluminium oxide, silica, tungsten oxide, tantalum oxide, nickel oxide, titanium oxide, cupric oxide, zinc oxide, manganese oxide, magnesia, niobium oxide, vanadium oxide and the molybdenum oxide; The thickness of said binary oxide thin layer is 5 to 100 nanometers; The method of said formation binary oxide solid-state electrolytic solution thin layer is a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD).
29. the method for preparing non-volatile resistance transformation memory according to claim 24; It is characterized in that; In the said step that in contact hole, on binary oxide solid-state electrolytic solution thin layer, forms the 3rd conductive electrode; The material that said the 3rd conductive electrode adopts is for being prone to be oxidized to the metal of metal ion under electric field action, comprise a kind of in copper, silver, iron, zinc, nickel, the mercury; The method of said formation the 3rd conductive electrode is a kind of in ald, sputter, evaporation, pulsed laser deposition, the chemical vapour deposition (CVD); The thickness of said the 3rd conductive electrode is 30 to 100 nanometers.
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| CN104659208A (en) * | 2015-02-05 | 2015-05-27 | 中国科学院微电子研究所 | Non-volatile resistance random access memory and preparation method thereof |
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