CN103426920A - Storage materials and application storage materials in nonvolatile charge trapping type memory device - Google Patents
Storage materials and application storage materials in nonvolatile charge trapping type memory device Download PDFInfo
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- 239000011232 storage material Substances 0.000 title claims abstract description 12
- 238000003860 storage Methods 0.000 claims abstract description 28
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- 230000004888 barrier function Effects 0.000 claims abstract description 13
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- 239000004065 semiconductor Substances 0.000 claims abstract description 6
- 238000009825 accumulation Methods 0.000 claims description 23
- 238000002360 preparation method Methods 0.000 claims description 12
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 11
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 10
- 238000005516 engineering process Methods 0.000 claims description 6
- 230000000694 effects Effects 0.000 claims description 5
- 229910052697 platinum Inorganic materials 0.000 claims description 5
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Abstract
Provided are charge storage materials in a nonvolatile charge trapping type memory device. The storage materials are mixed oxide materials, namely, (CuO) x (Al2O3) 1-x mixed oxide materials, and the value of x is 0.1-0.8. The invention further discloses the application of the charge storage materials in the nonvolatile charge trapping type memory device. According to the structure of the nonvolatile charge trapping type memory device, a tunneling layer Al2O3/a storage layer film (CuO) X (Al2O3) 1-x/a barrier layer Al203 is grown on a semiconductor substrate in sequence, (CuO) x (Al2O3) 1-x is a storage layer, and CuO nanocrystalline obtained from the charge storage materials (CuO) X (Al2O3) 1-x through annealing has the function of storing dielectric materials.
Description
Technical field
The invention belongs to the microelectronic material field, relate to the novel storage medium of a class and the application in Nonvolatile charge trap type memory device thereof.
Background technology
Since nonvolatile semiconductor memory is born, floating gate type memory is the main product on storage market always.Along with feature sizes of semiconductor devices is dwindled and the improving constantly of integrated level gradually, the floating gate type nonvolatile memory part faces serious leakage problem, is difficult to meet the microminiaturized requirement of memory.Along with constantly reducing of tunnel layer size in the floating gate type memory part, an electric charge total loss that defect will cause storing in multi-crystal silicon floating bar.Therefore, find a kind of nonvolatile memory that has high storage density, fast programming, low cost, low energy consumption, become the focus of current memory research field.Polycrystalline silicon-oxide-nitride--oxide-silicon (SONOS) type charge trapping memory performance good with it, for example low-power consumption, low program voltage, program speed are fast, and good data holding ability and anti-fatigue performance have caused people's attention gradually.Traditional SONOS type memory adopts Si
3N
4Substitute the multi-crystal silicon floating bar layer, electric charge is by Si
3N
4The trap level of the separation in accumulation layer is caught, thereby has avoided to a great extent the stress induced leakage effect in the floating gate type structure.In recent years, adopt nano microcrystalline to become the focus of research as charge storage media.
Magnetron sputtering is a kind of high-speed sputtering technology that 20 century 70s develop rapidly.Introduced quadrature field in magnetron sputtering, the zone by the movement limit of initiating electron at adjacent cathodes, be significantly improved ionization level and sputtering raste, can obtain higher deposition rate gentle the depressing of lower operating voltage.Atomic layer chemical vapor deposition (ALD) technology is to utilize gaseous sources in successively (layer by layer) growth of the self-saturation realization that sinks to the bottom adsorption or reaction, the thickness of film former does not rely on the growth parameter(s)s such as underlayer temperature, vapour pressure, source flux in operation window, only relevant with the number of cycle period.Due to its unique self-limiting growth process, the ald film forming has accurate THICKNESS CONTROL, excellent three-dimensional stickiness becomes the advantages such as film uniformity with large tracts of land, is preparing unique advantage aspect ultrathin film, nanostructure.
Summary of the invention
The present invention seeks to, a kind of storage medium, preparation method and the application in Nonvolatile charge trap type memory thereof are provided, especially a kind of mixed oxide material and preparation method, preparation process is simple, is easy to control.
The present invention also provides and utilizes above-mentioned mixed oxide material, utilizes magnetron sputtering technique to go out film at Grown.
Technical scheme of the present invention is: the charge storage material in Nonvolatile charge trap type memory device, described storage medium is mixed oxide material, (CuO)
x(Al
2O
3)
1-xMixed oxide, the x value is 0.1-0.8, especially 0.3-0.6.
Choose CuO and Al during preparation
2O
3Powder, dry at 10-15MPa pressure again and depress to disk after the ball mill wet ball grinding mixes, and finally fires 5 ± 1 hours (CuO) made under 1300 ± 50 ℃
x(Al
2O
3)
1-xCeramic target; The x value is 0.3 to 0.6.
The structure of Nonvolatile charge trap type memory device is order growth link tunnel layer Al on semiconductor chip
2O
3/ accumulation layer film (CuO)
X(Al
2O
3)
1-x/ barrier layer Al
2O
3, (CuO)
X(Al
2O
3)
1-xFor accumulation layer, charge storage material (CuO)
X(Al
2O
3)
1-xThe CuO nano microcrystalline obtained by annealing plays the effect of storage medium.
Tunnel layer Al
2O
3Thick 2-10nm, as (CuO) of accumulation layer film
X(Al
2O
3)
1-xThick 2-10nm; Barrier layer Al
2O
3Thick 10-25nm is thick.
Utilize above-mentioned ceramic target, prepare a kind of Nonvolatile charge trap type memory device, concrete steps are:
A) select P type Si(or monocrystalline silicon piece) be substrate, clean up the rear ALD(of utilization vacuum ald or vacuum coating) technology thick Al of about 2-10nm in superficial growth
2O
3As tunnel layer;
B) utilize magnetron sputtering technique to grow on tunnel layer and form (CuO) uniformly
X(Al
2O
3)
1-xFilm is as accumulation layer;
C) utilize the thick Al of the about 15nm of ALD regrowth one deck on accumulation layer
2O
3As barrier layer;
D) sample of above-mentioned preparation is annealed at the temperature lower than the CuO fusing point, make that CuO is nanocrystalline to separate out from accumulation layer, and by Al
2O
3The amorphous parent phase surrounds, and described CuO is nanocrystalline as storage medium; Annealing is carried out in quick anneal oven, and annealing time is 20-60S, and annealing atmosphere is nitrogen atmosphere, and annealing temperature is at 200 ± 15 ℃; E) the recycling magnetron sputtering technique after annealing on barrier layer, grow on the thick platinum of the about 10nm of thickness as top electrode.
The present invention has following beneficial effect: the present invention proposes a kind of storage medium (CuO)
X(Al
2O
3)
1-xAnd application, this mixed oxide material is for Nonvolatile charge trap type memory device, in Nonvolatile charge trap type memory device (CuO)
X(Al
2O
3)
1-xFor accumulation layer, the CuO nano microcrystalline obtained by annealing plays the effect of storage medium, and the preparation process of storage medium and memory application is all simple and be easy to control.
A) the present invention can obtain large information memory capacity for Nonvolatile charge trap type memory device structures.Fig. 2 shows that memory window is 0.3V when scanning voltage is 6V.When scanning voltage is 8V, 10V and 12V, obvious hysteresis window has been arranged, be respectively 1.4V, 2.1V and 2.6V.
B) as seen from Figure 3, at room temperature (testing time is 9000 seconds), the device made is under 7V voltage, through 10
5Inferior loss of charge amount of wiping after writing is 28.7%.
C) as seen from Figure 4, at room temperature, through 10
5Inferior wiping writes rear memory window and increased 0.3V, shows to using that the CuO nano microcrystalline can significantly improve the anti-fatigue performance of device as storage medium.
The accompanying drawing explanation
Fig. 1: structure and the principle schematic thereof of CuO nano microcrystalline base nonvolatile charge capture type storage device.
Fig. 2: under high frequency situations (1MHz), the capacitance-voltage characteristics of CuO nano microcrystalline base nonvolatile charge capture type storage device under different scanning voltage.Wherein the x axle means to be applied to the voltage (unit is volt) on platinum electrode, and the y axle means normalized storage capacitance.
Fig. 3: the retention of CuO nano microcrystalline base nonvolatile charge capture type storage device.Wherein the x axle means the retention time (unit is second), and the y axle means the loss of charge amount.
Fig. 4: the anti-fatigue performance of CuO nano microcrystalline base nonvolatile charge capture type storage device.Wherein the x axle means the write/erase number of times, and the y axle means flat band voltage (unit is volt).In figure, the square curve is write operation, and the circle curve is erase operation.
Embodiment
Embodiment 1:
A) selecting P type Si is substrate, cleans up the rear ALD(of utilization vacuum ald or vacuum coating) technology thick Al of about 2-10nm in superficial growth
2O
3As tunnel layer;
B) utilize magnetron sputtering technique to grow on tunnel layer and form (CuO) uniformly
X(Al
2O
3)
1-xFilm is as accumulation layer;
C) utilize the thick Al of the about 15nm of ALD regrowth one deck on accumulation layer
2O
3As barrier layer;
D) sample of above-mentioned preparation is annealed at the temperature lower than the CuO fusing point, make that CuO is nanocrystalline to separate out from accumulation layer, and by Al
2O
3The amorphous parent phase surrounds, and described CuO is nanocrystalline as storage medium; Annealing is carried out in quick anneal oven, and annealing time is 20-60S, and annealing atmosphere is nitrogen atmosphere, and annealing temperature is at 200 ± 15 ℃; E) the recycling magnetron sputtering technique after annealing on barrier layer, grow on the thick platinum of the about 10nm of thickness as top electrode.
Embodiment 2: based on the Si substrate, the preparation process of CuO nano microcrystalline base nonvolatile charge capture type storage device is specific as follows:
A) the Si substrate is put into to proper amount of acetone, after ultrasonic cleaning 10 minutes, with deionized water ultrasonic cleaning 10 minutes, wash the residual material of substrate surface, and then substrate is put into to the hydrofluoric acid solution diluted and soak about 30 seconds, remove oxide on surface, re-use the deionized water ultrasonic cleaning 5 minutes, wash remaining hydrofluoric acid off, put into atomic layer chemical vapor deposition cavity deposit film after drying up with high pure nitrogen.
B) adopt Al (CH in deposition process
3)
3As source metal, ozone is oxygen source.The Al that deposit thickness is 3nm
2O
3As tunnel layer.
C) then sample is put into to the Grown by Magnetron Sputtering chamber, utilize (CuO) of preparation
X(Al
2O
3)
1-xTarget, in specimen surface deposition (CuO)
X(Al
2O
3)
1-xFilm.In specimen surface deposition (CuO)
X(Al
2O
3)
1-xFilm, as accumulation layer, film thickness is the 10nm left and right.X=0.3 wherein.(CuO)
X(Al
2O
3)
1-xThe preparation of target materials method is for choosing CuO and Al
2O
3Powder, dry at 10-15MPa pressure again and depress to disk after the ball mill wet ball grinding mixes, and finally under 1300 ℃, fires 5 hours, makes (CuO)
X(Al
2O
3)
1-xCeramic target.
D) sample surfaces in the accumulation layer of having grown deposits the Al that one deck 10nm is thick again
2O
3As barrier layer, growth course is with reference to step (b).
E) grown behind barrier layer, by device short annealing furnace annealing, condition is at 200 ℃, and in nitrogen atmosphere, annealing is 40 seconds.
F) platinum that the sample surfaces after annealing is thick with the about 10nm of Grown by Magnetron Sputtering is as top electrode, and bottom electrode is with being coated in one deck conductive silver glue on the Si substrate.
The measurement that equals CuO nano microcrystalline base nonvolatile charge capture type storage device memory window and retention in experiment is all used Keithley4200 analyzing parameters of semiconductor instrument to complete.In the high frequency sweep situation, top electrode connects positive voltage, and bottom electrode connects negative voltage, and in scanning process, electronics enters accumulation layer and caught by the CuO nano microcrystalline under electric field action, is equivalent to write operation; On the contrary, top electrode connects negative voltage, and bottom electrode connects positive voltage, and in scanning process, the electronics of being caught by the CuO nano microcrystalline comes back to substrate under the effect of electric field force, is equivalent to erase operation.
The method of testing of retention is: apply 10V on top electrode, and the potential pulse of 1ms, electronics enters accumulation layer and is caught by the CuO nano microcrystalline under electric field action.The loss amount of electric charge after the test different time, thus the loss of charge amount under the different retention times obtained.
The method of testing of device anti-fatigue performance is: at first at top electrode, apply 10V, and the potential pulse of 1ms, electronics enters accumulation layer and is caught by the CuO nano microcrystalline under electric field action.Then at top electrode, apply-10V, the potential pulse of 1ms, electronics is got back to substrate under electric field action.So repeatedly 10
5Inferior.
Described test result In Figure 2-4.
Although the present invention discloses as above with preferred embodiment, so it is not in order to limit the present invention.The persond having ordinary knowledge in the technical field of the present invention, without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (5)
1. the charge storage material in a Nonvolatile charge trap type memory device, is characterized in that described storage medium is mixed oxide material, (CuO)
x(Al
2O
3)
1-xMixed oxide, the x value is 0.1-0.8, especially 0.3-0.6.
2. the charge storage material in Nonvolatile charge trap type memory device according to claim 1, choose CuO and Al while it is characterized in that preparing
2O
3Powder, dry at 10-15MPa pressure again and depress to disk after the ball mill wet ball grinding mixes, and finally fires 5 ± 1 hours (CuO) made under 1300 ± 50 ℃
x(Al
2O
3)
1-xCeramic target; The x value is 0.3-0.6.
3. the application of charge storage material in Nonvolatile charge trap type memory device in Nonvolatile charge trap type memory device according to claim 1 and 2, the structure that it is characterized in that Nonvolatile charge trap type memory device is the tunnel layer Al that sequentially grows on semiconductor chip
2O
3/ accumulation layer film (CuO)
X(Al
2O
3)
1-x/ barrier layer Al
2O
3, (CuO)
x(Al
2O
3)
1-xFor accumulation layer, charge storage material (CuO)
X(Al
2O
3)
1-xThe CuO nano microcrystalline obtained by annealing plays the effect of storage medium.
4. the application of lotus storage medium according to claim 3 in Nonvolatile charge trap type memory device, is characterized in that tunnel layer Al
2O
3Thick 2-10nm, as (CuO) of accumulation layer film
X(Al
2O
3)
1-xThick 2-10nm; Barrier layer Al
2O
3Thick 10-25nm is thick.
5. according to the described application in Nonvolatile charge trap type memory device of claim 3 or 4, it is characterized in that the preparation method is as follows:
) to select P type Si be substrate, cleans up the rear ALD(of utilization vacuum ald or vacuum coating) technology thick Al of about 2-10nm in superficial growth
2O
3As tunnel layer;
B) utilize magnetron sputtering technique to grow on tunnel layer and form (CuO) uniformly
X(Al
2O
3)
1-xFilm is as accumulation layer;
C) utilize ALD regrowth one deck Al on accumulation layer
2O
3As barrier layer;
D) sample of above-mentioned preparation is annealed at the temperature lower than the CuO fusing point, make that CuO is nanocrystalline to separate out from accumulation layer, and by Al
2O
3The amorphous parent phase surrounds, and described CuO is nanocrystalline as storage medium;
Difference based on two kinds of substance crystallization temperature in mixture, after the high temperature anneal, the supersaturation composition crystallization in mixture, CuO is nanocrystalline separates out from accumulation layer, and by Al
2O
3The amorphous parent phase surrounds, and CuO is nanocrystalline as storage medium.The nanocrystalline Al that is evenly distributed on of gained CuO
2O
3In the amorphous parent phase.Annealing is carried out in quick anneal oven, and annealing time is 20-60S, and annealing atmosphere is nitrogen atmosphere, and annealing temperature is at 200 ± 15 ℃;
E) the sample recycling magnetron sputtering technique after annealing on barrier layer, grow on the thick platinum of the about 10nm of thickness as top electrode.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104659208A (en) * | 2015-02-05 | 2015-05-27 | 中国科学院微电子研究所 | Non-volatile resistance random access memory and preparation method thereof |
| CN109727992A (en) * | 2018-12-27 | 2019-05-07 | 中国科学院微电子研究所 | Charge trapping memory and its production method |
| CN110047916A (en) * | 2019-03-14 | 2019-07-23 | 南京大学 | A kind of silicon substrate charge trapping memory part and preparation method |
| CN110957377A (en) * | 2019-12-16 | 2020-04-03 | 南京大学 | Memory container based on MOS (metal oxide semiconductor) transistor and preparation method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1819204A (en) * | 2005-02-07 | 2006-08-16 | 三星电子株式会社 | Nonvolatile nanochannel memory device using mesoporous material |
| US20100276747A1 (en) * | 2009-04-30 | 2010-11-04 | Jang-Sik Lee | Charge trapping layer, method of forming the charge trapping layer, non-volatile memory device using the same and method of fabricating the non-volatile memory device |
-
2013
- 2013-09-02 CN CN201310392148.XA patent/CN103426920B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1819204A (en) * | 2005-02-07 | 2006-08-16 | 三星电子株式会社 | Nonvolatile nanochannel memory device using mesoporous material |
| US20100276747A1 (en) * | 2009-04-30 | 2010-11-04 | Jang-Sik Lee | Charge trapping layer, method of forming the charge trapping layer, non-volatile memory device using the same and method of fabricating the non-volatile memory device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104659208A (en) * | 2015-02-05 | 2015-05-27 | 中国科学院微电子研究所 | Non-volatile resistance random access memory and preparation method thereof |
| CN109727992A (en) * | 2018-12-27 | 2019-05-07 | 中国科学院微电子研究所 | Charge trapping memory and its production method |
| CN110047916A (en) * | 2019-03-14 | 2019-07-23 | 南京大学 | A kind of silicon substrate charge trapping memory part and preparation method |
| CN110957377A (en) * | 2019-12-16 | 2020-04-03 | 南京大学 | Memory container based on MOS (metal oxide semiconductor) transistor and preparation method thereof |
| CN110957377B (en) * | 2019-12-16 | 2021-05-28 | 南京大学 | Memory container based on MOS (metal oxide semiconductor) transistor and preparation method thereof |
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