CN104637942A - 快速恢复整流器 - Google Patents
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Abstract
本发明提供一种快速恢复整流器。所述整流器包含N型外延层、多个P型扩散区域和多个N型扩散区域。所述P型扩散区域设置在所述N型外延层中,且所述N型扩散区域分别设置在所述P型扩散区域中。其中,所述P型扩散区域电耦接到所述N型扩散区域。
Description
技术领域
本发明一般来说涉及整流器,尤其涉及一种快速恢复整流器。
背景技术
至少部分包含例如快速恢复二极管(Fast Recovery Diode,简称为:FRD)、金属氧化物半导体场效应晶体管(Metal Oxide Semiconductor Field EffectTransistor,简称为:MOSFET)和绝缘栅极双极晶体管(Insulated Gate BipolarTransistor,简称为:IGBT)等二极管结构的电力半导体装置在电力供应电路中用作开关。为了实现快速开关且减小开关损耗,需要电力半导体装置具有较短反向恢复时间(Reverse Recovery Time,简称为:TRR)的开关。在现有技术中,可通过使用低掺杂的N型或P型杂质半导体装置以在电力半导体装置处于前向偏压时减少电子和空穴的供应和聚集来缩短TRR。另一方面,N型和P型杂质的减少导致接触电阻显着提高,且接触电阻的提高影响电力半导体装置的开关性能。此外,高浓度的N型或P型杂质导致开关的TRR延长的这一问题。
特别是,当施加在整流器上的操作电压的电压电平相对较高时,TRR严重延长,且整流器的性能降低。
发明内容
本发明提供一种快速恢复整流器。
所述整流器包含N型外延层、多个P型扩散区域和多个N型扩散区域。所述P型扩散区域设置在所述N型外延层中,且所述N型扩散区域分别设置在所述P型扩散区域中。其中,所述P型扩散区域电耦接到所述N型扩散区域。
在本发明的实施例中,所述整流器还包含覆盖层。所述覆盖层覆盖所述N型外延层、所述P型扩散区域和所述N型扩散区域,且所述N型外延层、所述P型扩散区域和所述N型扩散区域通过所述覆盖层而电耦接以成为所述整流器的阳极。
在本发明的实施例中,其中所述N型外延层形成所述整流器的阴极。
在本发明的实施例中,其中所述覆盖层为金属层或金属硅化物层。
在本发明的实施例中,其中所述相邻P型扩散区域中的两个之间的距离在预定范围之间。
在本发明的实施例中,所述整流器还包含至少一个P型保护扩散区域。所述第一P型保护扩散区域设置在所述N型外延层中且围绕所述P型扩散区域,其中所述第一P型保护扩散区域为浮动的。
在本发明的实施例中,所述整流器还包含至少一个第二P型保护扩散区域。所述第二P型保护扩散区域设置在所述N型外延层中且围绕所述第一P型保护扩散区域,其中所述第二P型保护扩散区域电耦接到所述N型扩散区域。
在本发明的实施例中,所述整流器还包含氧化硅层。所述氧化硅层设置在所述第一P型保护扩散区域和所述第二P型保护扩散区域上且覆盖所述第一P型保护扩散区域和所述第二P型保护扩散区域。
在本发明的实施例中,所述整流器还包含N型衬底层。所述N型外延层设置在所述N型衬底层上,且所述N型外延层覆盖所述N型衬底层。
在本发明的实施例中,其中所述N型外延层、所述P型扩散区域中的每一个和所述对应N型扩散区域形成双极晶体管。
因此,本发明提供多个N型扩散区域,所述多个N型扩散区域分别设置在所述P型扩散区域中以在所述整流器中形成多个双极晶体管。因此,当整流器处于反向偏压时,整流器的硅中不存在残余空穴电荷。即使整流器正在高操作电压下工作,也可缩短反向恢复时间。
应理解,以上一般描述和以下详细描述都是示范性的,且希望提供对如所主张的本发明的进一步解释。
附图说明
图1所示为根据本发明的实施例的整流器的结构图;
图2所示为根据本发明的实施例的整流器100的等效电路图;
图3A所示为整流器100处于正向偏压时的框图;
图3B所示为整流器100处于反向偏压时的框图;
图4所示为根据本发明的实施例的整流器的俯视图;
图5所示为沿着图4中的截面线A到A'截取的整流器400的横截面图。
附图标记说明:
100:整流器;
110:N型衬底层;
120:N型外延层;
130:覆盖层;
141~143:P型扩散区域;
151~153:N型扩散区域;
400:整流器;
410:N型衬底层;
420:N型外延层;
430:覆盖层;
441~44N:P型扩散区域;
461:氧化硅层;
4511~45NM:N型扩散区域;
D1~D2:肖特基二极管;
IF:电流;
R1~R3:保护环/P型保护扩散区域;
T1~T3:双极晶体管。
具体实施方式
现将详细参考本发明的优选实施例,该实施例在附图中得以说明。只要可能,相同参考数字在图式和描述中用以指相同或相似部分。
参看图1,图1所示为根据本发明的实施例的整流器的结构图。整流器100包含N型衬底层110、N型外延层120、多个P型扩散区域141到143、多个N型扩散区域151到153和覆盖层130。N型外延层120设置在N型衬底层110上,且N型外延层120覆盖N型衬底层110。P型扩散区域141到143设置在N型外延层120中,且N型扩散区域151到153分别设置在P型扩散区域141到143中。
覆盖层130设置在N型外延层120上,且覆盖层130覆盖N型外延层120、P型扩散区域141到143和N型扩散区域151到153。在此实施例中,P型扩散区域141到143可通过覆盖层130而分别耦接到N型扩散区域151到153,且P型扩散区域141到143可通过覆盖层130而耦接到一起以形成整流器100的阳极。
覆盖层130可为金属层或金属硅化物层,且覆盖层130可为由金(Au)、铂(Pt)、钨(W)、钼(Mo)、铬(Cr)、镍(Ni)、锡(Ti)或其它金属形成的金属层。此外,覆盖层130可用于形成硅化物,且接着在沉积接触层之前继之以扩散阻障,例如,TiW、TiN或其它层。针对导线结合,接触层可由Al形成,或针对焊接,由银(Ag)或Au形成。
另一方面,N型外延层120可用于形成整流器100的阴极。也就是说,导线可通过与N型外延层120或N型衬底层110接触而连接到整流器100的阴极。
整流器100的阴极的电极可设置在N型衬底层110上,且整流器100的阴极的电极接触N型衬底层110。整流器100的阳极的电极可设置在覆盖层130上,且整流器100的阳极的电极接触覆盖层130以电耦接到P型扩散区域141到143和N型扩散区域151到153。
此外,P型扩散区域141到143中的每一个不相互接触。此外,相邻P型扩散区域141到143中的两个之间的距离在预定范围之间。所述预定范围可由整流器100的设计者设置,且所述预定范围可根据整流器100的操作电压和整流器100的工艺参数来设置。此外,P型扩散区域的数目不受限制,图1中设置在整流器100中的三个P型扩散区域141到143仅为实例。
参看图2,图2所示为根据本发明的实施例的整流器100的等效电路图。此处请注意,N型外延层120、P型扩散区域141到143中的每一个和分别对应的N型扩散区域151到153形成双极晶体管T1到T3。N型扩散区域151到153分别形成双极晶体管T1到T3的发射极,P型扩散区域141到143分别形成双极晶体管T1到T3的基极,且N型外延层120形成双极晶体管T1到T3的集电极。双极晶体管T1到T3为NPN型双极晶体管,且双极晶体管T1到T3的发射极为多晶硅发射极(poly emitter)。另一方面,肖特基二极管D1和D2可由覆盖层130和N型外延层120形成。肖特基二极管D1和D2的阳极可耦接到双极晶体管T1到T3的发射极和基极,且肖特基二极管D1和D2的阴极耦接到双极晶体管T1到T3的集电极。
此外,关于双极晶体管T1到T3的发射极,通过从多晶硅扩散来形成浅结(shallow junction)。多晶硅可通过原位多晶掺杂(in-situ doping poly)来制成。原位多晶掺杂的载流子浓度可为N型掺杂剂的1E18到1E21。
在整流器的操作中,参看图3A和图3B,图3A所示为整流器100处于正向偏压时的框图,且图3B所示为整流器100处于反向偏压时的框图。在图3A中,当整流器100处于正向偏压(也就是说,第一电压施加到整流器100的阳极,且第二电压施加到整流器100的阴极,且第一电压的电压电平大于第二电压的电压电平)时,电流IF通过由双极晶体管T1到T3形成的电流通道而从整流器100的阳极流动到N型外延层120和N型衬底层110。因为由N型外延层120和P型扩散区域141到143形成的P-N结的深度减小,所以其少数载流子浓度可在N型外延层120和N型衬底层110中显着降低。因此,正向接通电压减小,且因此整流器100的开关速度可提高。
在图3B中,当整流器100处于反向偏压(也就是说,第一电压施加到整流器100的阳极,且第二电压施加到整流器100的阴极,且第一电压的电压电平小于第二电压的电压电平)时,耗尽层形成而延伸到P型扩散区域141到143,且电流通道关闭,以使得整流器100切断。由于双极晶体管T1到T3,N型外延层120中不存在残余空穴电荷,且反向恢复时间(TRR)可得到改进。
总体来说,参看图3A和图3B,整流器100在P型扩散区域141到143与N型外延层120之间提供浅结结构,以在浅结结构用于改进反向击穿电压且降低泄漏电流时降低内建电位。此外,双极晶体管T1到T3的发射极在整流器100的阳极与整流器100的半导体结构之间建立欧姆接触。因此,大部分电流流经整流器100的浅结结构,且瞬时速度和反向恢复电荷(reverserecovery charge,简称为:QRR)可进一步减小。
参看图4,图4所示为根据本发明的实施例的整流器的俯视图。在图4中,整流器400包含保护环R1到R3、P型扩散区域441到44N和N型扩散区域4511到45NM。N型扩散区域4511到45NM布置成阵列,且P型扩散区域中的每一个(例如,P型扩散区域441)具有多个N型扩散区域(例如,N型扩散区域4511到451M)。保护环R1到R3围绕P型扩散区域441到44N,且与保护环R1相邻的P型扩散区域441和44N的面积大于其它P型扩散区域。设置在P型扩散区域441和44N中的N型扩散区域的面积也可大于设置在P型扩散区域441和44N外的N型扩散区域的面积。
参看图5,图5所示为沿着图4中的截面线A到A'截取的整流器400的横截面图。在图5中,整流器400包含N型衬底层410、N型外延层420、覆盖层430、P型扩散区域441到44N、N型扩散区域4511到45N1、氧化硅层461和P型保护扩散区域R1到R3。P型保护扩散区域R1到R3设置在整流器400的边缘中,且P型扩散区域441到44N由P型保护扩散区域R1到R3围绕。更具体地说,P型保护扩散区域R1和R2为电浮动的。P型保护扩散区域R3可耦接到P型扩散区域441到44N。
氧化硅层461设置在N型外延层420中,且氧化硅层461覆盖N型外延层420的一部分、P型保护扩散区域R1到R3的全部、P型扩散区域441到44N的一部分和N型扩散区域4511到45N1的一部分。P型保护扩散区域R1到R3用于整流器400的端子结构,以改进反向击穿电压且减小泄漏电流。
总体来说,本发明提供设置在N型外延层中以形成浅P-N结结构的多个P型扩散区域。整流器的内建电位可降低。此外,本发明通过在P型扩散区域中的每一个中设置多个N型扩散区域而提供多个双极晶体管。当整流器被反向偏压时,N型外延层中的空穴电荷可得以消除,且反向恢复时间(TRR)可缩短。也就是说,根据本发明,可改进整流器的性能。
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。
Claims (10)
1.一种快速恢复整流器,其特征在于,包括:
N型外延层;
多个P型扩散区域,设置在所述N型外延层中;以及
多个N型扩散区域,分别设置在所述P型扩散区域中,
其中,所述P型扩散区域电耦接到所述N型扩散区域。
2.根据权利要求1所述的整流器,其特征在于,还包括:
覆盖层,覆盖所述N型外延层、所述P型扩散区域和所述N型扩散区域,且所述N型外延层、所述P型扩散区域和所述N型扩散区域通过所述覆盖层而电耦接以成为所述整流器的阳极。
3.根据权利要求2所述的整流器,其特征在于,所述N型外延层形成所述整流器的阴极。
4.根据权利要求2所述的整流器,其特征在于,所述覆盖层为金属层或金属硅化物层。
5.根据权利要求1所述的整流器,其特征在于,所述相邻P型扩散区域中的两个之间的距离在预定范围之间。
6.根据权利要求1所述的整流器,其特征在于,还包括:
至少一个第一P型保护扩散区域,设置在所述N型外延层中且围绕所述P型扩散区域,其中所述第一P型保护扩散区域为浮动的。
7.根据权利要求6所述的整流器,其特征在于,还包括:
至少一个第二P型保护扩散区域,设置在所述N型外延层中且围绕所述第一P型保护扩散区域,其中所述第二P型保护扩散区域电耦接到所述N型扩散区域。
8.根据权利要求7所述的整流器,其特征在于,还包括:
氧化硅层,设置在所述第一P型保护扩散区域和所述第二P型保护扩散区域上且覆盖所述第一P型保护扩散区域和所述第二P型保护扩散区域。
9.根据权利要求1所述的整流器,其特征在于,还包括:
N型衬底层,其中所述N型外延层设置在所述N型衬底层上,且所述N型外延层覆盖所述N型衬底层。
10.根据权利要求1所述的整流器,其特征在于,所述N型外延层、所述P型扩散区域中的每一个和所述对应N型扩散区域形成双极晶体管。
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CN115241293B (zh) * | 2022-06-15 | 2023-12-05 | 江苏新顺微电子股份有限公司 | 一种高速软恢复高压肖特基二极管器件及制造方法 |
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