CN104600041A - Packaging structure and method of double-sided radiating semiconductor - Google Patents
Packaging structure and method of double-sided radiating semiconductor Download PDFInfo
- Publication number
- CN104600041A CN104600041A CN201410822723.XA CN201410822723A CN104600041A CN 104600041 A CN104600041 A CN 104600041A CN 201410822723 A CN201410822723 A CN 201410822723A CN 104600041 A CN104600041 A CN 104600041A
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- Prior art keywords
- conjunction
- chip
- lead frame
- fin
- welding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/141—Disposition
- H01L2224/1418—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/14181—On opposite sides of the body
Abstract
The invention discloses packaging structure and method of a double-sided radiating semiconductor. The packaging structure of the double-sided radiating semiconductor comprises a lead frame, a first combining material, a chip, a second combining material and a radiating plate which are arranged in a rubber coating by wrapping from bottom to top in a sequence; the first combining material and the second combining material are equipped with high temperature resistant balls with the same diameter. The packaging method of the double-sided radiating semiconductor comprises the steps of preparing the lead frame; welding the chip on the upper surface of a chip seat through the first combining material; welding the radiating plate to the chip through the second combining material; directly drying the lead frame welded with the radiating plate through a drying oven; adhering an one-off adhesive film on the rear surface of the lead frame; the bottom surface of the chip seat and the top surface of the radiating plate expose from the adhesive after forming; the first combining material and the second combining material are equipped with the high temperature resistant balls with the same diameter; the overall thickness of the lead frame, the chip and the radiating plate can be accurately controlled before packaging.
Description
Technical field
The present invention relates to technical field of semiconductor encapsulation, particularly relate to a kind of two-side radiation semiconductor package structure and method for packing thereof.
Background technology
In semiconductor packaging, in order to ensure its thermal diffusivity, need the integral thickness controlling the front chip of encapsulation and fin, current THICKNESS CONTROL is difficult to ensure its accuracy, as thickness is excessive, when integral molded plastic is shaping, can cause damage to chip, chip can crush by severe patient, as thickness is excessively thin, when integral molded plastic is shaping, the phenomenon of excessive glue can be there is in surface on a heat sink, affect attractive in appearance and heat dispersion.
Summary of the invention
The object of the invention is to propose a kind of two-side radiation semiconductor package structure and method for packing thereof, accurately can control integral thickness.
For reaching this object, the present invention by the following technical solutions:
First aspect, a kind of two-side radiation semiconductor package structure, comprising:
Lead frame, described lead frame comprises chip carrier, interior pin and outer pin;
First in conjunction with material, and described first is positioned on described chip carrier in conjunction with material;
Chip, described chip is positioned at described first in conjunction with on material;
Second in conjunction with material, and described second is positioned on described chip in conjunction with material;
Fin, described fin is positioned at described second in conjunction with on material;
Colloid, the coated and described lead frame of described colloid, described chip and described fin;
Described first includes high temperature resistance isometrical bead with described second in conjunction with material in conjunction with material.
Further, described chip has relative acting surface and non-active face, and the non-active face of described chip is bonded in the upper surface of described chip carrier in conjunction with material by first, and the acting surface of described chip is bonded in the lower surface of described fin in conjunction with material by second.
Further, the acting surface of described chip is provided with electronic building brick, the acting surface of described chip is not provided with electronic building brick.
Further, the bottom surface of described chip carrier and the end face of described fin all leak outside in described colloid.
Second aspect, the invention discloses a kind of two-side radiation method for packing semiconductor, comprising:
Prepare lead frame: described lead frame comprises chip carrier, interior pin and outer pin;
Welding chip: use first in conjunction with material welding chip on described chip carrier;
Chips welding fin: use second in conjunction with material by described fin and described chips welding;
Baking: by the lead frame of the described fin of welding, directly send into oven cooking cycle, in conjunction with material solidification after baking, and then semiconductor whole height is determined;
Injection mo(u)lding; Stick a glued membrane at the described lead frame back side, carry out mold-closing injection;
Described first includes high temperature resistance isometrical bead with described second in conjunction with material in conjunction with material.
Further, the bottom surface of described chip carrier and the end face of described fin all leak outside in described colloid.
A kind of two-side radiation semiconductor package structure provided by the invention and method for packing thereof, by chip upper and lower surface oil with include the isometrical bead of high temperature resistance in conjunction with material, accurately control the integral thickness of lead frame, chip and fin before encapsulating, make semiconductor in encapsulation process, chip can not be damaged by pressure and semiconductor packages can not be caused to overflow glue, improve the package quality of product, further increase the integral heat sink performance of product.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, introduce doing one to the accompanying drawing used required in embodiment or description of the prior art simply below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the two-side radiation semiconductor package structure figure that the embodiment of the present invention one provides;
Fig. 2 is the flow chart of the two-side radiation method for packing semiconductor that the embodiment of the present invention two provides.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, hereinafter with reference to the accompanying drawing in the embodiment of the present invention, by execution mode, technical scheme of the present invention is described clearly and completely, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Embodiment one:
Fig. 1 is the two-side radiation semiconductor package structure figure that the embodiment of the present invention one provides.As shown in Figure 1, this two-side radiation semiconductor package comprises:
Lead frame 101, described lead frame comprises chip carrier, interior pin and outer pin.
First in conjunction with material 102, and described first is positioned on described chip carrier in conjunction with material 102.
Chip 103, described chip 103 is positioned at described first in conjunction with on material 102.
Second in conjunction with material 104, and described second is positioned on described chip 103 in conjunction with 104 materials.
Fin 105, described fin is positioned at described second in conjunction with on material 104.
Colloid 106, the coated and described lead frame 101 of described colloid 106, described chip 103 and described fin 105, the bottom surface of described chip carrier and the end face of described fin 105 all leak outside in described colloid;
Described first includes high temperature resistance isometrical bead with described second in conjunction with material 104 in conjunction with material 102.
Wherein, first is inner conducting resinl containing the isometrical bead of high temperature resistance or solder(ing) paste in conjunction with material 102, by the mode of a glue, is coated in conjunction with material on the chip carrier of lead frame 101.
Second is inner conducting resinl containing the isometrical bead of high temperature resistance or solder(ing) paste in conjunction with material 104, by the mode of a glue, will be coated on chip 103 in conjunction with material.
A kind of two-side radiation semiconductor package structure provided in the embodiment of the present invention one, by use in the upper and lower surface of chip with include the isometrical bead of high temperature resistance in conjunction with material, accurately control the integral thickness of lead frame, chip and fin before encapsulating.
Wherein, described chip 103 has relative acting surface and non-active face, the non-active face of described chip 103 is bonded in the upper surface of the chip carrier of described lead frame 101 in conjunction with material 102 by first, the acting surface of described chip 103 is bonded in the lower surface of described fin 105 in conjunction with material 104 by second, the acting surface of described chip 103 is provided with electronic building brick, and the acting surface of described chip is not provided with electronic building brick.
Wherein, the bottom surface of described chip carrier and the end face of described fin 105 all leak outside in described colloid 106.The end face of chip carrier bottom surface and fin 105 is not coated by colloid institute, can in time and the external world carry out exchange heat, dispel the heat, enhance the heat dispersion of semiconductor device.
Embodiment two:
Fig. 2 is the flow chart of the two-side radiation method for packing semiconductor that the embodiment of the present invention two provides.As shown in Figure 2, this two-side radiation method for packing semiconductor comprises:
Step 201, preparation lead frame, described lead frame comprises chip carrier, interior pin and outer pin;
Step 202, use first are in conjunction with material welding chip on described chip carrier;
Step 203, use second in conjunction with material by described fin and described chips welding;
Step 204, by the chip of the described fin of welding, directly send into oven cooking cycle, in conjunction with material solidification after baking, and then semiconductor whole height is determined;
Step 205, stick a glued membrane at the described lead frame back side, carry out mold-closing injection;
Wherein, described first in step 202 and step 203 includes high temperature resistance isometrical bead with described second in conjunction with material in conjunction with material.
Wherein, first is inner conducting resinl containing the isometrical bead of high temperature resistance or solder(ing) paste in conjunction with material, by the mode of a glue, is coated in conjunction with material on the chip carrier of lead frame.
Second is inner conducting resinl containing the isometrical bead of high temperature resistance or solder(ing) paste in conjunction with material, by the mode of a glue, will be coated on chip in conjunction with material.
Its method for packing of a kind of two-side radiation semiconductor provided in the embodiment of the present invention one, first by chip upper and lower surface use with include the isometrical bead of high temperature resistance in conjunction with material, accurately control the integral thickness of lead frame, chip and fin before encapsulating, and then encapsulate, make semiconductor in encapsulation process, chip can not be damaged by pressure and semiconductor packages can not be caused to overflow glue, improve the package quality of product, further increase the integral heat sink performance of product.
Wherein, the bottom surface of described chip carrier and the end face of described fin all leak outside in described colloid.The end face of chip carrier bottom surface and fin is not coated by colloid institute, can in time and the external world carry out exchange heat, dispel the heat, enhance the heat dispersion of semiconductor device.
Note, above are only preferred embodiment of the present invention and institute's application technology principle.Skilled person in the art will appreciate that and the invention is not restricted to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and can not protection scope of the present invention be departed from.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by appended right.
Claims (6)
1. a two-side radiation semiconductor package structure, is characterized in that, comprising:
Lead frame, described lead frame comprises chip carrier, interior pin and outer pin;
First in conjunction with material, and described first is positioned on described chip carrier in conjunction with material;
Chip, described chip is positioned at described first in conjunction with on material;
Second in conjunction with material, and described second is positioned on described chip in conjunction with material;
Fin, described fin is positioned at described second in conjunction with on material;
Colloid, the coated and described lead frame of described colloid, described chip and described fin;
Described first includes high temperature resistance isometrical bead with described second in conjunction with material in conjunction with material.
2. encapsulating structure according to claim 1, it is characterized in that, described chip has relative acting surface and non-active face, the non-active face of described chip is bonded in the upper surface of described chip carrier in conjunction with material by first, the acting surface of described chip is bonded in the lower surface of described fin in conjunction with material by second.
3. encapsulating structure according to claim 2, is characterized in that, the acting surface of described chip is provided with electronic building brick, and the acting surface of described chip is not provided with electronic building brick.
4. encapsulating structure according to claim 1, is characterized in that, the bottom surface of described chip carrier and the end face of described fin all leak outside in described colloid.
5. a two-side radiation method for packing semiconductor, is characterized in that, comprising:
Prepare lead frame: described lead frame comprises chip carrier, interior pin and outer pin;
Welding chip: use first in conjunction with material welding chip on described chip carrier;
Chips welding fin: use second in conjunction with material by described fin and described chips welding;
Baking: by the lead frame of the described fin of welding, directly send into oven cooking cycle, in conjunction with material solidification after baking, and then semiconductor whole height is determined;
Injection mo(u)lding; Stick a glued membrane at the described lead frame back side, carry out mold-closing injection;
Described first includes high temperature resistance isometrical bead with described second in conjunction with material in conjunction with material.
6. method for packing according to claim 6, is characterized in that, the bottom surface of described chip carrier and the end face of described fin all leak outside in described colloid.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410822723.XA CN104600041B (en) | 2014-12-25 | 2014-12-25 | A kind of two-side radiation semiconductor package structure and its method for packing |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410822723.XA CN104600041B (en) | 2014-12-25 | 2014-12-25 | A kind of two-side radiation semiconductor package structure and its method for packing |
Publications (2)
| Publication Number | Publication Date |
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| CN104600041A true CN104600041A (en) | 2015-05-06 |
| CN104600041B CN104600041B (en) | 2017-10-24 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201410822723.XA Active CN104600041B (en) | 2014-12-25 | 2014-12-25 | A kind of two-side radiation semiconductor package structure and its method for packing |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105762084A (en) * | 2016-04-29 | 2016-07-13 | 南通富士通微电子股份有限公司 | Packaging method and packaging device for flip chip |
| CN105914155A (en) * | 2016-04-29 | 2016-08-31 | 南通富士通微电子股份有限公司 | Flip chip and package method thereof |
| CN110875266A (en) * | 2018-08-30 | 2020-03-10 | 广东威灵汽车部件有限公司 | Connection structure of semiconductor wafer |
| CN114883279A (en) * | 2022-07-12 | 2022-08-09 | 深圳市冠禹半导体有限公司 | Gallium nitride device and packaging method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101308827A (en) * | 2007-05-18 | 2008-11-19 | 矽品精密工业股份有限公司 | Cooling type semiconductor package |
| CN101752327A (en) * | 2008-12-01 | 2010-06-23 | 矽品精密工业股份有限公司 | Semiconductor packaging piece with heat dissipation structure |
| US20140168902A1 (en) * | 2012-12-18 | 2014-06-19 | Kyol PARK | Semiconductor package |
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2014
- 2014-12-25 CN CN201410822723.XA patent/CN104600041B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101308827A (en) * | 2007-05-18 | 2008-11-19 | 矽品精密工业股份有限公司 | Cooling type semiconductor package |
| CN101752327A (en) * | 2008-12-01 | 2010-06-23 | 矽品精密工业股份有限公司 | Semiconductor packaging piece with heat dissipation structure |
| US20140168902A1 (en) * | 2012-12-18 | 2014-06-19 | Kyol PARK | Semiconductor package |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105762084A (en) * | 2016-04-29 | 2016-07-13 | 南通富士通微电子股份有限公司 | Packaging method and packaging device for flip chip |
| CN105914155A (en) * | 2016-04-29 | 2016-08-31 | 南通富士通微电子股份有限公司 | Flip chip and package method thereof |
| CN110875266A (en) * | 2018-08-30 | 2020-03-10 | 广东威灵汽车部件有限公司 | Connection structure of semiconductor wafer |
| CN114883279A (en) * | 2022-07-12 | 2022-08-09 | 深圳市冠禹半导体有限公司 | Gallium nitride device and packaging method thereof |
| CN114883279B (en) * | 2022-07-12 | 2022-10-25 | 深圳市冠禹半导体有限公司 | Packaging method of gallium nitride device |
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| Publication number | Publication date |
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| CN104600041B (en) | 2017-10-24 |
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