CN101308827A - Cooling type semiconductor package - Google Patents
Cooling type semiconductor package Download PDFInfo
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- CN101308827A CN101308827A CNA2007101046356A CN200710104635A CN101308827A CN 101308827 A CN101308827 A CN 101308827A CN A2007101046356 A CNA2007101046356 A CN A2007101046356A CN 200710104635 A CN200710104635 A CN 200710104635A CN 101308827 A CN101308827 A CN 101308827A
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- heat
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- conducting glue
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention discloses a heat-dissipating semiconductor enclosure, comprising a chip carrier and a semiconductor chip which is electrically connected to the chip carrier; a heat conduction glue holder area is arranged at the surface of the semiconductor chip; the border of the heat conduction glue holder area is away from the border of the semiconductor chip; the heat-dissipating semiconductor enclosure further comprises heat conduction glue which is arranged in the heat conduction glue holder area, a heat dissipating element which is connected on the heat conduction glue, and an enclosing rubber body which is arranged between the chip carrier and the heat dissipating element and covers the chip carrier and the heat dissipating element.; in this way, the border of the functional surface, the border of the non-functional surface and the side edges of the semiconductor chip can all be embedded into the enclosing rubber body, thus increasing the contact area of the enclosing rubber body with the semiconductor chip; meanwhile, the side edges of the heat conduction glue and the side edges of the chip are not trimmed so that the propagation problem can be avoided.
Description
Technical field
The present invention relates to a kind of semiconductor package part, particularly relate to a kind of radiating semiconductor packer that is integrated with heat spreader structure.
Background technology
Along with requirement, such as dwindled integrated circuit (IC) area of ball grid array (BGA, BallGrid Array) and have high density and the semiconductor package part of many pinizations characteristic day by day becomes one of main flow on the encapsulation market to compactization of electronic product.Yet owing to be the electronic circuit (Electronic Circuits) and electronic component (Electronic Components) that kind of semiconductor package part has higher density, the heat that is produced when operation is higher; And this kind semiconductor package part is the packing colloid coating semiconductor chip with poor heat conduction, so often because of the not good performance that has influence on semiconductor chip of the efficient of loss heat.
Be to improve the radiating efficiency of semiconductor package part, industry develops then and to add the technology of heat sink in semiconductor package part, and relevant technology is United States Patent (USP) the 6th, 552 for example, No. 428, the 6th, 400, No. 014, the 6th, 472, No. 743, the 5th, 977, No. 626, the 5th, 851, No. 337, the 6th, 236, No. 568, the 6th, 507, No. 116, the 5th, 672, No. 548, the 6th, 744, No. 132 and the 6th, 403, No. 882 etc.
As shown in Figure 1, be United States Patent (USP) the 6th, 552, the semiconductor package part of No. 428 exposed fin of the disclosed tool of patent, be on substrate 10, to connect to be equipped with a fin 12, this fin 12 has the lower sheet space 123 that is formed with hollow bulb 123a in the middle of, one upper sheet space 121, and one is connected to the binding plate 122 of these lower sheet space 123 hollow bulb 123a peripheries and this upper sheet space 121 peripheries, wherein, this lower sheet space 123 is provided with a plurality of feet 123b in the appropriate location, so that this fin 12 frame supports on substrate 10 by this feet 123b, and make the upper sheet space 121 of this fin 12 and 10 of this substrates keep a distance, make this distance be enough to potting resin is being coated on fin 12, when chip 11 and part substrate 10, the end face of this fin upper sheet space 121 can expose to outside the packing colloid, and must contact the heat that is produced during for 11 operations of loss chip with the external world.
Yet, in the aforesaid semiconductor package part, the heat that is produced during the chip operation still needs at interval, and packing colloid just can conduct to heat sink, and this packing colloid is the very poor material of a heat conductivity, its thermal conductivity coefficient is 0.8w/m ° of K only, be with, the heat that chip is produced in running can't effectively be delivered to heat sink, produce, make and enjoy test in chip performance and useful life and often cause heat to accumulate phenomenon.
See also shown in Figure 2ly, in view of aforesaid problem, United States Patent (USP) the 5th, 977 discloses a kind of radiating semiconductor packer No. 626, and the radiator structure 23 of this radiating semiconductor packer includes the par 230 that an end face exposes outside packing colloid 24; Frame supports a plurality of support portions 231 that this par 230 makes it to be positioned at semiconductor chip 21 tops; And extend for a plurality of a plurality of contact sites 232 that are used for gluing in the protuberance 237 of substrate 20 these 231 bottoms, support portion certainly; Wherein, this support portion 231 is that ring places that this par 230 is peripheral and outer gradually to extend this contact site 232 to constitute the channel 28 of holding chip 21 downwards, simultaneously be formed with the protuberance 234 that contacts to chip 21 downwards in these radiator structure 23 pars 230, the heat energy that produces for 21 operations of this chip can be directly released by the protuberance 234 of this radiator structure 23 and par 231 and is dissipated in the atmosphere, and needn't pass through the not good packing colloid of heat conductivity.
Yet, aforesaid semiconductor package part is in Encapsulation Moulds compacting journey, for avoiding taking place the excessive glue problem of packing colloid, the inboard roof of employed encapsulating mould must fit tightly, be resisted against the par of radiator structure, but, then often can cause the chip of this radiator structure below to produce the problem of breaking again because of bearing the protuberance excessive pressure when if the strength of the inboard roof contact radiator structure of encapsulating mould is excessive.
Therefore, for avoiding the problems referred to above, as shown in Figure 3A, United States Patent (USP) the 6th, 403, No. 882 patent proposes a kind of radiating semiconductor packer in addition, comprises that one has the chip 31 of action face (activesurface) 36 and relative non-action face 37, and on non-action face 37 wherein, form the heat-conducting glue 32 of one deck low elastic modulus so (Modulus of elastic), wherein this heat-conducting glue 32 is to be covered on these chip 31 non-action face 37 comprehensively; One cover sheet 33 utilizes this heat-conducting glue 32 to engage with the non-action face 37 of this chip 31; And a chip carrier 30, be to engage with the action face 36 of this chip 31.Thereby improve chip thermal resistance problem by this heat-conducting glue.
See also Fig. 3 B again, yet when aforesaid semiconductor package part encapsulates molding operation and forms the packing colloid 34 of coating chip, because this heat-conducting glue 32 is to be covered on these chip 31 non-action face 37 comprehensively, relatively, the packing colloid 34 that is coated on these chip 31 peripheries only forms contact interface with heat-conducting glue 32 sides, yet under the expansion contraction situation of thermal cycle, in this interface delamination (Delamination) D takes place very easily, and this delamination D extends (propagation) along the interface direction easily, cause the delamination of chip 31 and packing colloid 34, moreover, because of the contact area of this packing colloid 34 and chip 31 also only has chip 31 sides, adhesive force is obviously not enough, cause delamination can continue to extend (propagation) action face 36, even cause conductive projection (bump) the 35 generation rhegma problems that are electrically connected to this chip carrier 30 for chip 31 to this chip 31.
Therefore, how effectively to solve the existing problem of above-mentioned existing radiating semiconductor packer, make simple and lower-cost semiconductor package part, be the target of demanding urgently now reaching and obtain.
Summary of the invention
Because the shortcoming of above-mentioned prior art, a purpose of the present invention provides a kind of radiating semiconductor packer, avoids the interface generation delamination problems of packing colloid and heat-conducting glue.
Another purpose of the present invention provides a kind of radiating semiconductor packer, avoids different elements interface generation delamination extension (propagation) problem in the packaging part.
Still a further object of the present invention provides a kind of radiating semiconductor packer of low thermal resistance.
Another object of the present invention provides a kind of radiating semiconductor packer, avoids taking place in the encapsulation molding operation chip crushing problem.
For reaching above-mentioned and other purpose, radiating semiconductor packer of the present invention comprises: chip bearing member; Semiconductor chip connects and puts and be electrically connected to this chip bearing member, and this semiconductor chip surface is provided with the heat-conducting glue connecting area, and wherein, this heat-conducting glue connecting area edge is to this semiconductor chip marginating compartment one segment distance; Heat-conducting glue is formed at this heat-conducting glue connecting area; Heat sink connects and places on this heat-conducting glue; And packing colloid, be formed between this chip bearing member and this heat sink, to coat this semiconductor chip and this heat-conducting glue.
That is among the present invention, this is folded in heat-conducting glue area between semiconductor chip and heat sink less than semiconductor area, make the action face (active surface) of semiconductor chip and the edge and the side of non-action face embed packing colloid, promote packing colloid and chips incorporate area, and the difficult delamination problems that takes place, because heat-conducting glue side and sides of chip do not trim, also can stop the extension of delamination simultaneously.
This semiconductor chip can be selected to be electrically connected to substrate to cover crystal type, and this heat-conducting glue connecting area promptly is located on the non-action face of this semiconductor chip; This semiconductor chip can the bonding wire mode be electrically connected to substrate again, and this heat-conducting glue connecting area promptly is located on the action face of this semiconductor chip.Moreover the width at this heat-conducting glue connecting area edge to this semiconductor chip edge is in 1/3 to 1/5 scope of width at these semiconductor chip central authorities to this semiconductor chip edge, is preferably 1/4 scope.
Therefore, radiating semiconductor packer of the present invention is to make the heat-conducting glue connecting area edge of semiconductor chip surface to semiconductor chip marginating compartment one segment distance, thereby for heat sink at interval heat-conducting glue and connecing place on this semiconductor chip, so that the heat conduction approach of semiconductor chip low thermal resistance to be provided, and because of the area of heat-conducting glue set on this heat-conducting glue connecting area area less than this semiconductor chip, make the action face of semiconductor chip and the edge and the side of non-action face all embed packing colloid, promote packing colloid and chips incorporate area, be difficult for taking place delamination problems, simultaneously since this heat-conducting glue edge and this semiconductor chip edge do not trim, can avoid the extension (propagation) of delamination again, moreover, when Encapsulation Moulds compacting journey, also can produce deformation by the elasticity speciality of this heat-conducting glue, and then the pressure of absorption encapsulating mould, avoid weighing wounded semiconductor chip.
Description of drawings
Fig. 1 is a United States Patent (USP) the 6th, 552, No. 428 radiating semiconductor packer schematic diagram;
Fig. 2 is a United States Patent (USP) the 5th, 977, No. 626 radiating semiconductor packer schematic diagram;
Fig. 3 A is a United States Patent (USP) the 6th, 403, No. 882 radiating semiconductor packer schematic diagram;
Fig. 3 B is a United States Patent (USP) the 6th, 403, and No. 882 radiating semiconductor packer produces delamination
The problem schematic diagram;
Fig. 4 A to Fig. 4 E is the schematic diagram of radiating semiconductor packer first embodiment of the present invention; And
Fig. 5 is the schematic diagram of radiating semiconductor packer second embodiment of the present invention.
The component symbol explanation
10 substrates, 11 chips
12 fin, 121 upper sheet spaces
122 link plate 123 lower sheet spaces
123a hollow bulb 123b feet
20 substrates, 21 semiconductor chips
23 radiator structures, 230 pars
231 support portions, 232 contact sites
234 protuberances, 237 protuberances
24 packing colloids, 28 channel
30 chip carriers, 31 chips
32 heat-conducting glues, 33 baffles
34 packing colloids, 35 conductive projections
36 action face, 37 non-action face
40 chip bearing members, 41 semiconductor chips
411 action face, 412 non-action face
413 conductive projections, 414 heat-conducting glue connecting areas
42 heat-conducting glues, 43 heat sinks
44 packing colloids, 50 chip bearing members
51 semiconductor chips, 513 bonding wires
514 heat-conducting glue connecting areas, 52 heat-conducting glues
53 heat sinks, 54 packing colloids
56 action face, 57 non-action face
D delamination W, W ' width
S thickness
Embodiment
Below by particular specific embodiment explanation embodiments of the present invention, those skilled in the art can understand other advantage of the present invention and effect easily by the content that this specification disclosed.
See also Fig. 4 A to Fig. 4 E, be the schematic diagram of radiating semiconductor packer first embodiment of the present invention.
Shown in Fig. 4 A and Fig. 4 B, chip bearing member 40 is provided and has action face 411 and the semiconductor chip 41 of the non-action face 412 of relative this action face 411, wherein the non-action face 412 of this semiconductor chip 41 is provided with heat-conducting glue connecting area 414, and the action face 411 of this semiconductor chip 41 is to connect and put and be electrically connected on this chip bearing member 40 to cover crystal type.
The action face 411 of this semiconductor chip 41 electrically connects to make this semiconductor chip 41 and this chip bearing member 40 by a plurality of conductive projections 413.This chip bearing member 40 can be substrate or lead frame.These heat-conducting glue connecting area 414 edges to these semiconductor chip 41 marginating compartments have a segment distance, that is the width W ' at these heat-conducting glue connecting area 414 edges to these semiconductor chip 41 edges is in 1/3 to 1/5 scope of width W at these semiconductor chip 41 central authorities to these semiconductor chip 41 edges, best, the width W ' at these heat-conducting glue connecting area 414 edges to these semiconductor chip 41 edges is these semiconductor chip 41 central authorities to 1/4 of the width W of this chip edge.
Shown in Fig. 4 C, heat-conducting glue connecting area 414 on the non-action face 412 of this semiconductor chip 41 forms a heat-conducting glue 42, wherein, the material of this heat-conducting glue 42 is the epoxy resin (Epoxy) of low elastic modulus so, its modulus of elasticity (Modulus of elastic) is less than 1000Mpa, and the glass transition temperature (Tg) of this heat-conducting glue 42 value is less than 25 ℃, and contains heat conducting material in this heat-conducting glue 42, and making its thermal conductivity coefficient is 2 to 5w/m ° of K.
Shown in Fig. 4 D and Fig. 4 E, on this heat-conducting glue 42, connect and put a heat sink 43, the heat that is produced during for these semiconductor chip 41 runnings of loss, carry out Encapsulation Moulds compacting journey afterwards again,, use that this semiconductor chip 41 is hedged off from the outer world with in the packing colloid 44 of this chip bearing member 40 and 43 formation of heat sink, one this semiconductor chip 41 of coating and this heat-conducting glue 42, wherein, the thickness of this heat-conducting glue 42 is S, and its thickness range is 50 to 300 μ m, is the best with 200 μ m.In addition, when Encapsulation Moulds compacting journey, can produce deformation by the elasticity speciality of this heat-conducting glue, and then absorb the pressure of encapsulating mould, avoid weighing wounded semiconductor chip 41.
That is utilize heat-conducting glue 42 areas be folded in 43 of this semiconductor chip 41 and heat sinks among the present invention less than semiconductor chip 41 areas, make the edge and the side of the action face edge of semiconductor chip 41, non-action face all embed packing colloid 44, promote packing colloid and chips incorporate area, be difficult for taking place delamination problems, because heat-conducting glue 42 sides and semiconductor chip 41 sides do not trim, also can avoid the extension of delamination simultaneously.
Other sees also Fig. 5, is the second embodiment schematic diagram of radiating semiconductor packer of the present invention.
The packaging part and the previous embodiment of this enforcement are roughly the same, main difference is that semiconductor chip 51 is to connect with its non-action face 57 to put on chip bearing member 50, and be electrically connected to this chip bearing member 50 by many bonding wires 513 in the routing mode, and on these semiconductor chip 51 action face 56, do not influence bonding wire 513 positions and be provided with heat-conducting glue connecting area 514, and these heat-conducting glue connecting area 514 edges are at a distance of this semiconductor chip 51 edges one segment distance, be opposite to this semiconductor chip 51 action face 56 mutually by the heat-conducting glue 52 that is laid in this heat-conducting glue connecting area 514 for heat sink 53, form coat this semiconductor chip 51 and heat-conducting glue 52 afterwards and expose outside the packing colloid 54 of these heat sink 53 end faces.
Therefore, radiating semiconductor packer of the present invention is to make the heat-conducting glue connecting area edge of semiconductor chip surface to semiconductor chip marginating compartment one segment distance, thereby for heat sink at interval heat-conducting glue and connecing place on this semiconductor chip, so that the heat conduction approach of semiconductor chip low thermal resistance to be provided, and because of the area of heat-conducting glue set on this heat-conducting glue connecting area area less than this semiconductor chip, make the action face of semiconductor chip and the edge and the side of non-action face all embed packing colloid, promote packing colloid and chips incorporate area, be difficult for taking place delamination problems, simultaneously since this heat-conducting glue edge and this semiconductor chip edge do not trim, can avoid the extension (propagation) of delamination again, moreover, when Encapsulation Moulds compacting journey, also can produce deformation by the elasticity speciality of this heat-conducting glue, and then the pressure of absorption encapsulating mould, avoid weighing wounded semiconductor chip.
The foregoing description only is illustrative principle of the present invention and effect thereof, but not is used to limit the present invention.Any those skilled in the art all can be under spirit of the present invention and category, and the foregoing description is modified and changed.Therefore, the scope of the present invention should be foundation as the scope with claims.
Claims (12)
1. radiating semiconductor packer comprises:
Chip bearing member;
Semiconductor chip connects and puts and be electrically connected on this chip bearing member, and this semiconductor chip surface is provided with the heat-conducting glue connecting area, wherein, and this semiconductor chip edge one segment distance of this heat-conducting glue connecting area marginating compartment;
Heat-conducting glue is formed at this heat-conducting glue connecting area;
Heat sink connects and places on this heat-conducting glue; And
Packing colloid is formed between this chip bearing member and this heat sink, to coat this semiconductor chip and this heat-conducting glue.
2. radiating semiconductor packer according to claim 1, wherein, this chip bearing member is wherein one of substrate and a lead frame.
3. radiating semiconductor packer according to claim 1, wherein, this semiconductor chip has relative action face and non-action face, and this semiconductor chip is its action face to be connect put and be electrically connected to this chip bearing member to cover crystal type, and this heat-conducting glue connecting area is located on the non-action face of this semiconductor chip.
4. radiating semiconductor packer according to claim 1, wherein, this semiconductor chip has relative action face and non-action face, this semiconductor chip is to connect with its non-action face to place this chip bearing member, and be electrically connected to this chip bearing member in the bonding wire mode, and this heat-conducting glue connecting area is located on the action face of this semiconductor chip.
5. radiating semiconductor packer according to claim 1, wherein, the width at this heat-conducting glue connecting area edge to this semiconductor chip edge is in 1/3 to 1/5 scope of width at these semiconductor chip central authorities to this semiconductor chip edge.
6. radiating semiconductor packer according to claim 5, wherein, the width at this heat-conducting glue connecting area edge to this semiconductor chip edge be these semiconductor chip central authorities to this semiconductor chip edge width 1/4 for best.
7. radiating semiconductor packer according to claim 1, wherein, this heat-conducting glue is constituted by the epoxy resin of low elastic modulus so.
8. radiating semiconductor packer according to claim 1, wherein, the modulus of elasticity of this heat-conducting glue is less than 1000Mpa.
9. radiating semiconductor packer according to claim 1, wherein, the glass transition temperature value of this heat-conducting glue is less than 25 ℃.
10. radiating semiconductor packer according to claim 1 wherein, contains heat conducting material in this heat-conducting glue, and making its thermal conductivity coefficient is 2 to 5w/m ° of K.
11. radiating semiconductor packer according to claim 1, wherein, this semiconductor chip has relative action face and non-action face, and the edge of its action face and non-action face and side all embed packing colloid, to promote packing colloid and chips incorporate area.
12. radiating semiconductor packer according to claim 1, wherein, this heat-conducting glue edge and this semiconductor chip edge do not trim, and extend problem to avoid that delamination takes place between different materials.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101046356A CN101308827A (en) | 2007-05-18 | 2007-05-18 | Cooling type semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101046356A CN101308827A (en) | 2007-05-18 | 2007-05-18 | Cooling type semiconductor package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101308827A true CN101308827A (en) | 2008-11-19 |
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ID=40125168
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2007101046356A Pending CN101308827A (en) | 2007-05-18 | 2007-05-18 | Cooling type semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101308827A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104600041A (en) * | 2014-12-25 | 2015-05-06 | 杰群电子科技（东莞）有限公司 | Packaging structure and method of double-sided radiating semiconductor |
| US10685904B2 (en) | 2014-11-21 | 2020-06-16 | Delta Electronics, Inc. | Packaging device and manufacturing method thereof |
| CN114520201A (en) * | 2020-11-19 | 2022-05-20 | 颀邦科技股份有限公司 | Semiconductor heat dissipation package structure and manufacturing method thereof |
-
2007
- 2007-05-18 CN CNA2007101046356A patent/CN101308827A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10685904B2 (en) | 2014-11-21 | 2020-06-16 | Delta Electronics, Inc. | Packaging device and manufacturing method thereof |
| US11049796B2 (en) | 2014-11-21 | 2021-06-29 | Delta Electronics, Inc. | Manufacturing method of packaging device |
| CN104600041A (en) * | 2014-12-25 | 2015-05-06 | 杰群电子科技（东莞）有限公司 | Packaging structure and method of double-sided radiating semiconductor |
| CN104600041B (en) * | 2014-12-25 | 2017-10-24 | 杰群电子科技（东莞）有限公司 | A kind of two-side radiation semiconductor package structure and its method for packing |
| CN114520201A (en) * | 2020-11-19 | 2022-05-20 | 颀邦科技股份有限公司 | Semiconductor heat dissipation package structure and manufacturing method thereof |
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