CN104538438A - 石墨烯掺杂材料及其制备方法、电极、像素结构、显示装置 - Google Patents
石墨烯掺杂材料及其制备方法、电极、像素结构、显示装置 Download PDFInfo
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Abstract
本发明提供一种石墨烯掺杂材料及其制备方法、电极、像素结构、显示装置。本发明的目的是解决现有技术存在的单层石墨烯方阻较高的问题;本发明的石墨烯掺杂材料及其制备方法、电极、像素结构、显示装置由于对石墨烯层进行掺杂,形成石墨烯掺杂材料使得掺杂材料与石墨烯进行键接、提高载流子的传输速率,降低了石墨烯掺杂材料的方阻。
Description
技术领域
本发明涉及显示技术领域,具体地,涉及一种石墨烯掺杂材料及其制备方法、电极、像素结构、显示装置。
背景技术
柔性显示已经成为显示领域的发展方向,尤其是穿戴设备日渐汹涌的发展趋势,现有技术通常采用透明导电材料ITO、IZO等作为像素电极,然而这些金属氧化物的机械强度和柔韧性决定了其不能很好的应用于柔性显示产品。
现有技术中提出采用单层石墨烯替代ITO作为像素电极,虽然单层石墨烯能够满足柔性特性,但其方块电阻较大,通常单层石墨烯方块电阻较高,达到120Ω/□以上,不能满足像素电极对低电阻值的要求。
发明内容
本发明的目的是解决现有技术存在的单层石墨烯方阻较高的问题;提供一种方阻低的石墨烯掺杂材料。
解决本发明技术问题所采用的技术方案是一种石墨烯掺杂材料,所述石墨烯掺杂材料包括至少一层石墨烯层和至少一层掺杂层。
优选的,所述的掺杂层包括BaF2、MgF2、FeCl3中的任意一种或几种。
优选的,所述掺杂层的总厚度为6-35nm。
优选的,所述石墨烯层包括1-5层。
优选的,所述掺杂层包括1-4层。
优选的,所述掺杂层和所述石墨烯层间隔分布。
本发明还提供一种石墨烯掺杂材料的制备方法,包括真空蒸镀的步骤:
将待掺杂材料置于真空蒸镀装置内;
将所述待掺杂基片置于蒸镀腔室中,对所述待掺杂材料进行加热,将待掺杂材料蒸镀于待掺杂基片。
优选的,所述真空蒸镀是在300-400℃下,真空度大于等于10-4托的条件下进行的。
本发明还提供一种电极,所述电极包括上述的石墨烯掺杂材料。
本发明还提供一种像素结构,包括像素电极和/或公共电极,其特征在于,所述像素电极和/或所述公共电极包括上述的电极。
本发明还提供一种显示装置,包括如权利要求上述的像素结构。
发明的石墨烯掺杂材料及其制备方法、电极、像素结构、显示装置由于对石墨烯层进行掺杂,形成的石墨烯掺杂材料使得掺杂材料与石墨烯进行键接、提高载流子的传输速率,降低了石墨烯掺杂材料的方阻。
附图说明
图1为本发明实施例4中石墨烯掺杂材料的结构示意图;
图2为本发明实施例12中ADS像素结构示意图;
图3为本发明实施例12中石墨烯掺杂像素电极的构图工艺流程图;
其中,1.衬底;2.栅极;3.公共电极;4.栅线;5.栅极绝缘层;6.有源层;7.绝缘层;8.钝化层;9.源漏极;10.像素电极;11.石墨烯层;12.掺杂层;13.光刻胶;14.模板。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明作进一步详细描述。
对比例
本对比例提供一种石墨烯导电层的由单层石墨烯层形成,对该石墨烯导电层进行方阻测试和透过率进行测试,其结果见表1。
其中,透过率通过分光光度计在300-1600nm范围内对导电层进行光学透过率进行测试;
方阻测试采用RTS-9型四探针测试仪,测试导电层的室温方阻。
实施例1:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括1层石墨烯和1层掺杂层;掺杂层为FeCl3掺杂层;FeCl3掺杂层的厚度为6nm。
上述石墨烯掺杂材料的制备方法如下:
1)将待掺杂材料置于蒸镀机内的坩埚内;
2)将待掺杂基片置于蒸镀腔室,通过设计于外部的热源对坩埚进行加热进行蒸镀;
3)通过控制加热源电流的大小来控制蒸镀速率,直至蒸镀预定的厚度。
上述的蒸镀装置可以对待蒸镀物质进行独立控制,将蒸镀温度控制在300-400℃,真空度大于等于10-4托,通过控制电流的大小控制蒸镀速率,蒸镀到预定厚度时停止蒸镀。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例2:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括1层石墨烯层和1层掺杂层;掺杂层为MgF2掺杂层;MgF2掺杂层的厚度为8nm。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例3:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括一1层石墨烯层和1层掺杂层;掺杂层为BaF2掺杂层;BaF2掺杂层的厚度为10nm。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例4:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括3层石墨烯层和2层掺杂层;
掺杂层分别为MgF2掺杂层和FeCl3掺杂层,其中,MgF2掺杂层的厚度为6nm,FeCl3掺杂层的厚度为6nm。
如图1所示,石墨烯掺杂材料的各层的排布顺序依次为:石墨烯层、MgF2掺杂层、石墨烯层、FeCl3掺杂层、石墨烯层。
应当理解的是,上述各层的排列也可是其它顺序,只要能实现掺杂材料与石墨烯之间的键接、提高载流子的传输速率即可。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例5:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括3层石墨烯层和2层掺杂层;掺杂层为BaF2掺杂层,其中,BaF2掺杂层的厚度为10nm。
石墨烯掺杂材料的各层的排布顺序依次为:石墨烯层、BaF2掺杂层、石墨烯层、BaF2掺杂层、石墨烯层。
应当理解的是,上述各层的排列也可是其它顺序,只要能实现掺杂材料与石墨烯之间的键接、提高载流子的传输速率即可。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例6:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括4层石墨烯层和2层掺杂层;
掺杂层分别为MgF2掺杂层和FeCl3掺杂层;其中,MgF2掺杂层的厚度为6nm,FeCl3掺杂层的厚度为6nm。
石墨烯掺杂材料的各层的排布顺序依次为:石墨烯层、MgF2掺杂层、石墨烯层、FeCl3掺杂层、石墨烯层、石墨烯层。
应当理解的是,上述各层的排列也可是其它顺序,只要能实现掺杂材料与石墨烯之间的键接、提高载流子的传输速率即可。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例7:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括4层石墨烯层和3层掺杂层;掺杂层为FeCl3掺杂层;其中,FeCl3掺杂层的厚度为6nm。
石墨烯掺杂材料的各层的排布顺序依次为:石墨烯层、FeCl3掺杂层、石墨烯层、FeCl3掺杂层、石墨烯层、FeCl3掺杂层、石墨烯层。
应当理解的是,上述各层的排列也可是其它顺序,只要能实现掺杂材料与石墨烯之间的键接、提高载流子的传输速率即可。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例8:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括5层石墨烯层和4层掺杂层;
掺杂层分别为MgF2掺杂层、BaF2掺杂层和FeCl3掺杂层;其中,MgF2掺杂层的厚度为6nm,FeCl3掺杂层的厚度为6nm、BaF2掺杂层的厚度为10nm。
石墨烯掺杂材料的各层的排布顺序依次为:石墨烯层、MgF2掺杂层、石墨烯层、FeCl3掺杂层、石墨烯层、BaF2掺杂层、石墨烯层、BaF2掺杂层、石墨烯层。
应当理解的是,上述各层的排列也可是其它顺序,只要能实现掺杂材料与石墨烯之间的键接、提高载流子的传输速率即可。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例9:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括5层石墨烯层和3层掺杂层;
掺杂层分别为BaF2掺杂层和FeCl3掺杂层;其中,FeCl3掺杂层的厚度为6nm、BaF2掺杂层的厚度为10nm。
石墨烯掺杂材料的各层的排布顺序依次为:石墨烯层、FeCl3掺杂层、石墨烯层、BaF2掺杂层、石墨烯层、石墨烯层、BaF2掺杂层、石墨烯层。
应当理解的是,上述各层的排列也可是其它顺序,只要能实现掺杂材料与石墨烯之间的键接、提高载流子的传输速率即可。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
实施例10:
本实施例提供一种石墨烯掺杂材料,所述石墨烯掺杂材料包括5层石墨烯层和4层掺杂层;
掺杂层分别为BaF2掺杂层、MgF2掺杂层和FeCl3掺杂层;其中,FeCl3掺杂层的厚度为6nm、BaF2掺杂层的厚度为10nm、MgF2掺杂层的厚度为6nm。
石墨烯掺杂材料的各层的排布顺序依次为:石墨烯层、FeCl3掺杂层、石墨烯层、FeCl3掺杂层、石墨烯层、MgF2掺杂层、石墨烯层、BaF2掺杂层、石墨烯层。
应当理解的是,上述各层的排列也可是其它顺序,只要能实现掺杂材料与石墨烯之间的键接、提高载流子的传输速率即可。
上述掺杂层的制备方法与实施例1中的方法类似,在此不再一一赘述。
对该石墨烯掺杂材料进行方阻测试和透过率测试,其结果见表1。
应当理解的是,上述掺杂层的厚度可以根据具体情况调整,只要能实现掺杂材料与石墨烯之间的键接,掺杂层的厚度可以尽量小。
从表1中可见,实施例1-10中的石墨烯掺杂材料的透过率保持在较高的水平;同时,将掺杂层和石墨烯键接后相对于单层石墨烯方阻降低很多,更加适合于作为透明显示的电极材料。
实施例11:
本实施例提供一种电极,所述电极包括上述的石墨烯掺杂材料。
实施例12:
本实施例提供一种像素结构,包括像素电极和/或公共电极,像素电极和/或公共电极上述的电极。
应当理解的是,像素结构的可以采用现有技术中的TN(TwistNematic)、IPS(In-Plane Switching)、ADS(Advanced Super DimensionSwitch)等结构,本实施例以ADS像素结构为例进行介绍,说明如何将石墨复合导电层制作成电极,例如,像素电极和/或公共电极的。
如图2所示,现有技术中的ADS像素结构包括:衬底1;设置在衬底1上的栅极2、公共电极3、栅线4;设置在栅极2上的栅极绝缘层5;设置在栅极绝缘层5上的有源层6;设置在有源层6上的绝缘层7;设置在绝缘层7上的钝化层8;设置在钝化层8上的源漏极9;设置在源漏极9上的像素电极10。
下面介绍上述的ADS像素结构制作方法:
通过构图工艺在衬底1上形成栅极、公共电极3、栅线4、栅极绝缘层5、有源层6、绝缘层7、源漏极9、钝化层8。
上述结构的形成方法为现有技术范畴在此不再一一赘述。
接着在钝化层8上形成石墨烯掺杂材料,具体地,可以先形成石墨烯层11,石墨烯层11的制备方法可以采用气相沉积法,石墨烯气相沉积为现有技术范畴在此不再一一赘述。
在石墨烯上形成采用蒸镀法形成掺杂层12,具体方法与实施例1中的方法相同,在此不再一一赘述。
应当理解的,可根据石墨烯层11和掺杂层12的层数和先后顺序交替制作石墨烯层11和掺杂层12,形成相应结构的石墨烯掺杂材料。
对上述形成的石墨烯掺杂材料采用构图工艺进行处理:
具体地,如图3所示,采用以下步骤进行处理:
1)在上述形成的石墨烯掺杂材料上涂布、固化形成光刻胶13(PMMA);
2)采用热纳米压印工艺将模板14的图形在光刻胶13上形成电极图案;
3)采用等离子刻蚀工艺处理,制作电极,具体工艺条件为:功率:30W,基础压力5×10-8托;工作压力:30毫托;工作气体流量为20sccm;时间:150s。
4)剥离光刻胶13,形成像素电极图案。
可选的,在像素电极上制备其它功能层,形成ADS像素结构。
应当理解的是,也可以单独制备相应图案的石墨烯掺杂像素电极,然后将石墨烯掺杂像素电极贴敷于钝化层8上的相应位置。
应当理解的是,上面过程以像素电极为例进行介绍,对公共电极等其它采用石墨烯掺杂材料制备的电极也是适用的,在此不再一一赘述。
实施例13:
本实施例提供一种显示装置,所述显示装置包括上述的像素结构。
表1对比例和实施例中石墨烯掺杂材料结构和性能测试参数
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。
Claims (11)
1.一种石墨烯掺杂材料,其特征在于,所述石墨烯掺杂材料包括至少一层石墨烯层和至少一层掺杂层。
2.如权利要求1所述的石墨烯掺杂材料,其特征在于,所述的掺杂层包括BaF2、MgF2、FeCl3中的任意一种或几种。
3.如权利要求1所述的石墨烯掺杂材料,其特征在于,所述掺杂层的总厚度为6-35nm。
4.如权利要求1所述的石墨烯掺杂材料,其特征在于,所述石墨烯层包括1-5层。
5.如权利要求1所述的石墨烯掺杂材料,其特征在于,所述掺杂层包括1-4层。
6.如权利要求1所述的石墨烯掺杂材料,其特征在于,所述掺杂层和所述石墨烯层间隔分布。
7.一种如权利要求1-6任一项所述石墨烯掺杂材料的制备方法,其特征在于,包括真空蒸镀的步骤:
将待掺杂材料置于真空蒸镀装置内;
将所述待掺杂基片置于蒸镀腔室中,对所述待掺杂材料进行加热,将待掺杂材料蒸镀于待掺杂基片。
8.如权利要求7所述的石墨烯掺杂材料的制备方法,其特征在于,所述真空蒸镀是在300-400℃下,真空度大于等于10-4托的条件下进行的。
9.一种电极,其特征在于,所述电极包括如权利要求1-6任一项所述的石墨烯掺杂材料。
10.一种像素结构,包括像素电极和/或公共电极,其特征在于,所述像素电极和/或所述公共电极包括如权利要求9所述的电极。
11.一种显示装置,其特征在于,包括如权利要求10所述的像素结构。
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