CN104467826A - Delta-sigma fractional frequency synthesizer with dithering shaping function - Google Patents
Delta-sigma fractional frequency synthesizer with dithering shaping function Download PDFInfo
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- CN104467826A CN104467826A CN201410787737.2A CN201410787737A CN104467826A CN 104467826 A CN104467826 A CN 104467826A CN 201410787737 A CN201410787737 A CN 201410787737A CN 104467826 A CN104467826 A CN 104467826A
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Abstract
The invention discloses a delta-sigma fractional frequency synthesizer with a dithering shaping function. The delta-sigma fractional frequency synthesizer comprises a basic circuit and further comprises a frequency signal control circuit, wherein the basic circuit is composed of a phase frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, a multi-modulus frequency divider and an automatic frequency calibration circuit, the frequency signal control circuit is composed of a delta-sigma modulator, a dithering shaping circuit and an LFSR dithering circuit, a phase-locked loop is formed by the phase frequency detector, the charge pump, the loop filter, the voltage-controlled oscillator and the multi-modulus frequency divider, the dithering shaping circuit for restraining the loop noise floor of the phase-locked loop is arranged between the pseudorandom sequence input end of the delta-sigma modulator and the LFSR dithering circuit, the output end of the frequency signal control circuit is connected with the multi-modulus frequency divider, and the dithering shaping circuit is composed of step-controllable multi-step differentiators. By means of the delta-sigma fractional frequency synthesizer, low-frequency noise can be effectively filtered out while dithering and stray eliminating are achieved, and the frequency output characteristic of the frequency synthesizer is actually ensured.
Description
Technical field
The present invention relates to a kind of microcircuit structures, particularly relate to one and can add and tremble, eliminate spuious, there is again noise shaping function, cycle of phase-locked loop can not be increased and to make an uproar the Δ Σ fractional frequency synthesizer at the end.
Background technology
Δ Σ decimal type frequency synthesizer is the one in phase-locked loop frequency integrator, its basic structure and phase-locked loop frequency integrator are substantially identical, but in frequency divider, add Deltasigma modulator to realize fractional frequency division, its basic structure as shown in Figure 1, the random sequence produced by Deltasigma modulator goes the change controlling the instantaneous frequency dividing ratio of frequency divider, achieves the function of fractional frequency division ratio.Deltasigma modulator can carry out random process to frequency dividing ratio simultaneously, and can push quantizing noise to high frequency, plays a significant role the optimization of fractional stray.
The register of digital Deltasigma modulator remains limited, and output sequence still cannot avoid periodic existence, and especially when being input as some periodic decimals, the periodicity of output sequence can be stronger, thus can cause some decimal output factors.In order to eliminate the periodicity of output sequence, common solution inputs at the input of Deltasigma modulator the pseudo random sequence that a linear feedback shift register (LFSR) produces, as shown in Figure 2.This pseudo random sequence is approximately white Gaussian noise, only can destroy the periodicity of output sequence, can't have an impact to the modulation function of Deltasigma modulator.
But this LFSR adds the solution imperfection of trembling: LFSR add LFSR in the Δ Σ frequency synthesizer trembled add tremble module energy curve as shown in a in Fig. 3, in whole frequency spectrum, Energy distribution is uniform, the filter energy curve of cycle of phase-locked loop is as shown in c in Fig. 3, there is low-pass characteristic, this frequency synthesizer operationally has a very serious problem like this, because the low-pass characteristic of cycle of phase-locked loop filter can not add the noise trembled module and bring by filtering LFSR completely, making an uproar at the end of whole cycle of phase-locked loop can be raised like this, run counter to desire, affect the overall performance of phase-locked loop.
Summary of the invention
Object of the present invention is intended to propose a kind of band and adds the Δ Σ fractional frequency synthesizer trembling shaping, solves the problem that in prior art, PLL noise is higher, and the present invention can effectively filtering low-frequency noise, the conscientiously frequency output characteristics of guarantee frequency synthesizer.
Technical solution of the present invention is for achieving the above object: a kind of band adds the Δ Σ fractional frequency synthesizer trembling shaping, comprise by phase frequency detector 1, charge pump 2, loop filter 3, voltage controlled oscillator 4, multi-modulus frequency divider 5, automatic frequency calibration circuit 6, Deltasigma modulator 7 and LFSR add the basic circuit that twitter circuit 9 forms, wherein said phase frequency detector 1, charge pump 2, loop filter 3, voltage controlled oscillator 4, multi-modulus frequency divider 5 forms phase-locked loop, it is characterized in that: add to be provided with between twitter circuit 9 at Deltasigma modulator 7 pseudo random sequence input and LFSR and suppress cycle of phase-locked loop adding of the end of making an uproar to tremble shaping circuit 8, Deltasigma modulator 7, add and tremble shaping circuit 8 and LFSR and add twitter circuit 9 and form frequency signal control circuit, the output of frequency signal control circuit connects multi-modulus frequency divider 5.
Wherein, described adding, trembles shaping circuit 8 and is made up of one or more levels differentiator that progression is controlled.
The advantage that the present invention compares background technology is:
The Δ Σ fractional frequency synthesizer that the present invention develops is after adding the improvement of trembling shaping and dropping into application, compare to this type of frequency synthesizer of tradition, operationally can add tremble eliminate spuious, can significantly press down except low-frequency noise again, reduce making an uproar at the end of cycle of phase-locked loop, conscientiously ensure the good frequency output characteristics of frequency synthesizer.
Accompanying drawing explanation
Fig. 1 is existing common Δ Σ frequency synthesizer electrical block diagram;
Fig. 2 does to add the Δ Σ frequency synthesizer electrical block diagram trembling improvement to Fig. 1;
Fig. 3 is that in circuit shown in Fig. 2, LFSR adds the energy curve figure trembled;
Fig. 4 is that band of the present invention adds the Δ Σ fractional frequency synthesizer circuit structural representation trembling shaping;
Fig. 5 is that the present invention adds the preferred enforcement schematic diagram trembling shaping circuit.
Embodiment
Below in conjunction with drawings and Examples, the present invention will be further described in detail.
The present invention is directed to tradition and add the Δ Σ fractional frequency synthesizer trembled in actual applications, phase-locked loop low frequency noise is difficult to be inhibited, and makes the problem that the overall output performance of frequency synthesizer is deteriorated, and innovation proposes and a kind ofly adds the similar synthesizer trembling shaping.
As shown in Figure 4 and Figure 5, be that the present invention innovates the Δ Σ fractional frequency synthesizer circuit structural representation of improvement and adds the preferred enforcement schematic diagram trembling shaping circuit.Traditional Δ Σ fractional frequency synthesizer shown in composition graphs 1 to Fig. 3, its by phase frequency detector 1, charge pump 2, loop filter 3, voltage controlled oscillator 4, multi-modulus frequency divider 5, automatic frequency calibration circuit 6, Deltasigma modulator 7, add and tremble shaping circuit 8 and LFSR and add twitter circuit 9 and form, frequency synthesizer circuit shown in its operation principle with Fig. 2 is substantially identical, and be those skilled in the art institute easy to understand, therefore will not describe in detail.And as the character of innovation of this creation, add to add to add between twitter circuit 9 at Deltasigma modulator 7 pseudo random sequence input and LFSR and tremble shaping circuit 8, be different from traditional LFSR to add and tremble, the program can add trembles, eliminate spuious, the function of noise shaping can be had again, making an uproar at the end of cycle of phase-locked loop can not be increased.
As shown in Figure 4, LFSR adds and trembles 9 and add and tremble shaping circuit 8 and form of the present invention adding and tremble Shaping Module, this add tremble Shaping Module energy curve as shown in b in Fig. 3, in whole frequency spectrum, Energy distribution is that low frequency is very low, increase gradually in high frequency direction, namely noise is shaped in high-frequency band, the filter energy curve low-pass characteristic of such cycle of phase-locked loop can the noise of effective filtering high frequency, thus this noise shaping module operationally can add tremble eliminate spuious, more noise can not be brought again to phase-locked loop, effectively can ensure the frequency output characteristics of frequency synthesizer.
Add tremble shaping circuit 8 concrete methods of realizing as shown in Figure 5, this adds trembles shaping circuit 8 and is made up of a differentiator.LFSR is added the pseudo random sequence that twitter circuit 9 produces and carries out differential by this differentiator, thus realizes the energy curve of b in Fig. 3; And the progression of this differentiator is controlled, the steep of adjusting energy curve can be carried out by the progression controlling differentiator, arrange in pairs or groups mutually with the filter energy curve of cycle of phase-locked loop, realize causing filtration result preferably, conscientiously ensure the good frequency output characteristics of frequency synthesizer.
In addition, this differentiator can be realized by digital code, no matter connects at functional realiey or interface, all embodies and have good compatibility feature with other digital module of phase-locked loop.
Below embodiment by reference to the accompanying drawings describes, and is intended to be convenient to understand innovation essence of the present invention, but not limits the execution mode of its versatility and the claims of requirement with this.In every case understand the present invention, and change or component replacement according to the equivalent structure that above-described embodiment carries out, the design of identical object and effect can be realized, the infringement to present patent application protection content all should be considered as.
Claims (2)
1. a band adds the Δ Σ fractional frequency synthesizer trembling shaping, comprise by phase frequency detector (1), charge pump (2), loop filter (3), voltage controlled oscillator (4), multi-modulus frequency divider (5), automatic frequency calibration circuit (6), Deltasigma modulator (7) and LFSR add the basic circuit that twitter circuit (9) forms, wherein said phase frequency detector (1), charge pump (2), loop filter (3), voltage controlled oscillator (4), multi-modulus frequency divider (5) forms phase-locked loop, it is characterized in that: add to be provided with between twitter circuit (9) at Deltasigma modulator (7) pseudo random sequence input and LFSR and suppress cycle of phase-locked loop adding of the end of making an uproar to tremble shaping circuit (8), described Deltasigma modulator (7), add and tremble shaping circuit (8) and LFSR and add twitter circuit (9) and form frequency signal control circuit, the output of frequency signal control circuit connects multi-modulus frequency divider (5).
2. a kind of band according to claim 1 adds the Δ Σ fractional frequency synthesizer trembling shaping, it is characterized in that: described adding is trembled shaping circuit (8) and be made up of one or more levels differentiator that progression is controlled.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410787737.2A CN104467826B (en) | 2014-12-18 | 2014-12-18 | A kind of △ ∑ fractional frequency synthesizers of the jittered shaping of band |
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| CN201410787737.2A CN104467826B (en) | 2014-12-18 | 2014-12-18 | A kind of △ ∑ fractional frequency synthesizers of the jittered shaping of band |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105049039A (en) * | 2015-07-08 | 2015-11-11 | 中国电子科技集团公司第四十一研究所 | Fractional frequency division circuit for spur suppression |
| CN106849946A (en) * | 2016-12-13 | 2017-06-13 | 航天恒星科技有限公司 | A kind of fractional frequency division frequency synthesizer and decimal frequency dividing method |
| CN108566200A (en) * | 2018-04-27 | 2018-09-21 | 上海顺久电子科技有限公司 | A kind of divider controller circuit, phaselocked loop and chip |
| CN110113048A (en) * | 2019-05-17 | 2019-08-09 | 芯翼信息科技(南京)有限公司 | Clock calibration circuit and clock correcting method based on phaselocked loop |
| CN110190847A (en) * | 2019-04-26 | 2019-08-30 | 西安邮电大学 | A kind of fractional-N divide circuit and method applied to frequency synthesizer |
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| US8664989B1 (en) * | 2013-02-07 | 2014-03-04 | Cirrus Logic, Inc. | Method to increase frequency resolution of a fractional phase-locked loop |
| CN104038215A (en) * | 2014-06-13 | 2014-09-10 | 南京邮电大学 | Automatic frequency calibration circuit for sigma-delta fractional frequency synthesizer |
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| US7250886B1 (en) * | 2006-03-20 | 2007-07-31 | Dialog Semiconductor Gmbh | Sigma-delta modulator |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105049039A (en) * | 2015-07-08 | 2015-11-11 | 中国电子科技集团公司第四十一研究所 | Fractional frequency division circuit for spur suppression |
| CN105049039B (en) * | 2015-07-08 | 2017-12-01 | 中国电子科技集团公司第四十一研究所 | A kind of fractional frequency division circuit for spurious reduction |
| CN106849946A (en) * | 2016-12-13 | 2017-06-13 | 航天恒星科技有限公司 | A kind of fractional frequency division frequency synthesizer and decimal frequency dividing method |
| CN108566200A (en) * | 2018-04-27 | 2018-09-21 | 上海顺久电子科技有限公司 | A kind of divider controller circuit, phaselocked loop and chip |
| CN110190847A (en) * | 2019-04-26 | 2019-08-30 | 西安邮电大学 | A kind of fractional-N divide circuit and method applied to frequency synthesizer |
| CN110113048A (en) * | 2019-05-17 | 2019-08-09 | 芯翼信息科技(南京)有限公司 | Clock calibration circuit and clock correcting method based on phaselocked loop |
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| CN104467826B (en) | 2018-01-30 |
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