CN104393053B - 薄膜晶体管及其制作方法，薄膜晶体管组件、阵列基板及显示装置 - Google Patents

薄膜晶体管及其制作方法，薄膜晶体管组件、阵列基板及显示装置 Download PDF

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CN104393053B
CN104393053B CN201410796010.0A CN201410796010A CN104393053B CN 104393053 B CN104393053 B CN 104393053B CN 201410796010 A CN201410796010 A CN 201410796010A CN 104393053 B CN104393053 B CN 104393053B
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source electrode
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electrode
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CN104393053A (zh
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周庆高
李鹏
冯忠
孟盼盼
刘祖宏
吴代吾
侯智
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BOE Technology Group Co Ltd
Hefei BOE Optoelectronics Technology Co Ltd
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Hefei BOE Optoelectronics Technology Co Ltd
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Abstract

薄膜晶体管及其制作方法，薄膜晶体管组件、阵列基板及显示装置，一种薄膜晶体管，包括：基板；设置在基板上的栅极、栅极绝缘部、半导体部、源极和漏极，半导体部与栅极之间利用栅极绝缘部隔开，源极和漏极与半导体部连接，其中：栅极和半导体部在基板上的投影彼此不重叠。栅极、栅极绝缘部、半导体部、源极和漏极可同层布置。或者，栅极绝缘部的一部分设置在半导体部和源、漏极所在层与基板之间；且栅极直接设置在基板上。或者，半导体部和源、漏极同层直接布置在基板上；且栅极绝缘部的一部分设置在栅极所在层与基板之间。

Description

薄膜晶体管及其制作方法，薄膜晶体管组件、阵列基板及显示 装置
技术领域
本发明的实施例涉及显示技术领域，尤其涉及薄膜晶体管及其制作方法，薄膜晶体管组件、阵列基板和显示装置。
背景技术
在TFT-LCD中，需要使用薄膜晶体管场效应管(TFT)。TFT由栅极、源极、漏极、有源层等形成，通过栅极控制TFT以使得TFT起到开关作用，通过外接输入的数据电信号产生电容的电势变化，从而驱动液晶偏转，在屏幕上呈现出图像或者画面。
现有技术中TFT-LCD的制造工艺一般包括如下流程：在基板上形成栅极层(金属层)、然后形成栅极绝缘层、在栅极绝缘层上形成半导体层(例如使用a-Si)、在半导体层上形成源漏极层(金属层)、在源漏极层上形成钝化层、最后形成像素电极层。
基于上述工艺制造的TFT中，其膜层的数量最多处可达6层，最少处可至2层，段差比较大，很容易产生断线。
发明内容
本发明的目的是减少TFT的膜层数，从而降低TFT制造过程中由于段差较大而造成的断线不良率。
为达到上述目的，本发明的技术解决方案如下：
根据本发明的实施例的一个方面，提出了一种薄膜晶体管，包括：基板；设置在基板上的栅极、栅极绝缘部、半导体部、源极和漏极，半导体部与栅极之间利用栅极绝缘部隔开，源极和漏极与半导体部连接，其中：栅极和半导体部在基板上的投影彼此不重叠。
在一个可选的实施例中，源极、漏极、栅极分别具有露出到钝化层外侧的部分；源极连接部、漏极连接部和栅极连接部在钝化层外侧分别与源极、漏极和栅极电连接。
可选地，栅极、栅极绝缘部、半导体部、源极和漏极同层布置。
或者可选地，栅极绝缘部的一部分设置在半导体部和源、漏极所在层与基板之间；且栅极直接设置在基板上。
或者可选地，半导体部和源、漏极同层直接布置在基板上；且栅极绝缘部的一部分设置在栅极所在层与基板之间。
可选地，上述薄膜晶体管还包括钝化层，栅极、源极、漏极、栅极绝缘部和半导体部设置在基板与钝化层之间。
根据本发明的实施例的另一方面，提出了一种薄膜晶体管组件，包括：上述的具有钝化层的薄膜晶体管；和分开设置的源极连接部、漏极连接部和栅极连接部，源极连接部、漏极连接部和栅极连接部分别与源极、漏极和栅极电连接。
可选地，源极、漏极、栅极分别具有露出到钝化层外侧的部分；源极连接部、漏极连接部和栅极连接部在钝化层外侧分别与源极、漏极和栅极电连接。
或者可选地，钝化层的边缘设置有三个凹口，分别露出源极、漏极、栅极；源极连接部、漏极连接部和栅极连接部经由所述三个凹口分别与源极、漏极和栅极电连接。
或者可选地，钝化层设置有三个过孔，分别露出源极、漏极、栅极；源极连接部、漏极连接部和栅极连接部经由所述三个过孔分别与源极、漏极和栅极电连接，源极连接部、漏极连接部和栅极连接部中的每一个至少部分位于钝化层上。
根据本发明的实施例的再一方面，提出了一种薄膜晶体管的制造方法，包括步骤：提供基板；和在基板上设置栅极、栅极绝缘部、半导体部、源极和漏极，使得半导体部与栅极之间利用栅极绝缘部隔开，源极和漏极与半导体部连接，且栅极和半导体部在基板上的投影彼此不重叠。
可选地，在上述方法中，栅极、栅极绝缘部、半导体部、源极和漏极同层布置，且“在基板上设置栅极、栅极绝缘部、半导体部、源极和漏极”包括：通过一次构图工艺在基板上形成源极、漏极和栅极。
可选地，在上述方法中，“在基板上设置栅极、栅极绝缘部、半导体部、源极和漏极”包括：同层设置源极、漏极和半导体部。进一步地，“在基板上设置栅极、栅极绝缘部、半导体部、源极和漏极”包括：将栅极直接设置在基板上；和将栅极绝缘部的一部分设置在半导体部和源、漏极所在层与基板之间。或者，“在基板上设置栅极、栅极绝缘部、半导体部、源极和漏极”包括：将半导体部和源、漏极同层直接布置在基板上；和将栅极绝缘部的一部分设置在栅极所在层与基板之间。
可选地，上述方法还包括步骤：设置钝化层，以将栅极、源极、漏极、栅极绝缘部和半导体部设置在基板与钝化层之间。进一步地，该方法还包括步骤：在钝化层上设置用于分别露出源极、漏极、栅极的凹口或过孔。
根据本发明的实施例的还一方面，提出了一种阵列基板，包括：上述的薄膜晶体管组件；数据线和栅极线；以及像素电极，其中：所述数据线和栅极线分别与对应的源极和栅极电连接；所述像素电极与对应的漏极电连接。
根据本发明的实施例的又一方面，提出了一种显示装置，包括上述的阵列基板。
附图说明
图1-6为根据本发明的一个示例性实施例的薄膜晶体管的制作方法的过程示意图；
图7为图3中A-A向的部分截面示意图；
图8为图4中B-B向的部分截面示意图；
图9为图6中C-C向的部分截面示意图；
图10为根据本发明的另一个示例性实施例的薄膜晶体管的结构示意图；
图11为根据本发明的再一个示例性实施例的薄膜晶体管的结构示意图；
图12为根据本发明的还一个示例性实施例的薄膜晶体管的结构示意图；
图13为根据本发明的又一个示例性实施例的薄膜晶体管的结构示意图。
具体实施方式
下面详细描述本发明的实例性的实施例，实施例的示例在附图中示出，其中相同或相似的标号表示相同或相似的元件。下面参考附图描述的实施例是示例性的，旨在解释本发明，而不能解释为对本发明的限制。
在现有技术中，栅极4上设置栅极绝缘部，而栅极绝缘部上再设置半导体层，半导体层需要与栅极相对，这样，栅极、栅极绝缘部和半导体层就已经形成了三个膜层。不过，通过使得栅极和半导体层在基板上的投影彼此不重叠，就可以减少TFT的膜层数。
下面参照图1-9描述根据本发明的一个示例性实施例的薄膜晶体管的制作方法。
如图1-9中所示，根据本发明的一个示例性实施例的薄膜晶体管的制造方法包括步骤：
提供基板1；
通过构图工艺在基板1上形成源极2、漏极3和栅极4，如图1所示，源极2、漏极3和栅极4同层布置；
如图2所示，在源极2、漏极3和栅极4所在的层中形成栅极绝缘部5，栅极绝缘部5使得源、漏极与栅极之间电绝缘；
如图3所示，在源极、漏极、栅极和栅极绝缘部5所在的层中形成半导体部6，其中，半导体部6与栅极4之间利用栅极绝缘部5隔开，如图7中所示，栅极4和源极2之间设置有栅极绝缘部5和半导体部6；
如图4所示，在源极2、漏极3、栅极4、栅极绝缘部5和半导体部6所在的层上形成钝化层7，如图8所示，半导体部6连接在源极2与漏极3之间而将源极2和漏极3间隔开，且钝化层7直接形成在源极2、漏极3、栅极4、栅极绝缘部5和半导体部6所在的层上而形成两层结构；
如图5所示，通过构图工艺在钝化层7中形成三个过孔71、72、73，三个过孔分别露出源极2、漏极3、栅极4。
如图6所示，通过构图工艺形成源极连接部81、漏极连接部82和栅极连接部83，使得源极连接部81、漏极连接部82和栅极连接部83分别与源极2、漏极3和栅极4电连接，如图9所示，漏极连接部82形成在钝化层7上从而形成三层结构。在图6中，漏极连接部82对应于像素电极。
在上述方法中，设置半导体部和栅极绝缘部的步骤可以颠倒，只要半导体部、栅极绝缘部、栅极、源极、漏极之间的相对位置符合要求即可。
可以通过一次构图工艺在基板上形成源极、漏极和栅极的图形。
在上述方法中，钝化层7中形成三个过孔71、72、73以便于连接源极2、漏极3、栅极4。但是，在钝化层并未完全覆盖所有的源极、漏极和栅极，即漏极、源极和栅极具有露出到钝化层外侧的部分的情况下，源极连接部、漏极连接部和栅极连接部均可设置在钝化层的外侧，即源极连接部、漏极连接部和栅极连接部不存在设置在钝化层上的部分。可选地，虽然没有示出，形成钝化层的步骤还包括利用构图工艺在钝化层的边缘形成三个凹口，三个凹口分别露出源极、漏极、栅极；且提供源极连接部、漏极连接部和栅极连接部包括使得源极连接部、漏极连接部和栅极连接部分别通过所述三个凹口与源极、漏极和栅极电连接，类似地，此时，源极连接部、漏极连接部和栅极连接部可以不存在设置在钝化层上的部分。
在以上具体的实施例中，栅极4、栅极绝缘部5、半导体部6、源极2和漏极3同层布置。在不设置钝化层7的情况下，TFT仅仅存在一个膜层。即使设置钝化层7，TFT也仅仅存在两个膜层。相较于现有技术中的TFT，形成TFT的膜层数减少。
栅极4、栅极绝缘部5、半导体部6、源极2和漏极3也可以不是都设置在一层上。
参见图10，半导体部6、源极2和漏极3同层设置。半导体部6、源极2和漏极3所在层与基板1之间设置了栅极绝缘部5的一部分，栅极4直接设置在基板1上。在图10中，栅极绝缘部5还覆盖了栅极4。不过，栅极绝缘部5可以不覆盖栅极4。
在本发明中，直接设置在基板上表示与基板的表面直接面接触，该基板的表面可以经过了处理。
图11与图10的不同在于增加了钝化层7。栅极4、源极2、漏极3、栅极绝缘部5和半导体部6设置在基板1与钝化层7之间。
参见图12，半导体部6、源极2和漏极3同层直接布置在基板1上。栅极绝缘部5的一部分设置在栅极4所在层与基板之间。在图12中，栅极绝缘部5还覆盖了半导体部6、源极2和漏极3。不过，栅极绝缘部5可以不覆盖半导体部6、源极2和漏极3。
图13与图12的不同在于增加了钝化层7。栅极4、源极2、漏极3、栅极绝缘部5和半导体部6设置在基板1与钝化层7之间。
综上，本发明提出了一种薄膜晶体管，包括：基板1；设置在基板2上的栅极4、栅极绝缘部5、半导体部6、源极2和漏极3，半导体部6与栅极4之间利用栅极绝缘部5隔开，源极2和漏极3与半导体部6连接，其中：栅极4和半导体部6在基板1上的投影彼此不重叠。
可选地，如图3所示，栅极4、栅极绝缘部5、半导体部6、源极2和漏极3同层布置。
可选地，如图10所示，栅极绝缘部5的一部分设置在半导体部6和源、漏极所在层与基板1之间；且栅极4直接设置在基板1上。
可选地，如图12所示，半导体部6和源、漏极同层直接布置在基板1上；且栅极绝缘部的一部分设置在栅极所在层与基板之间。
可选地，如图8-9、11、13所示，薄膜晶体管还包括钝化层7，栅极4、源极2、漏极3、栅极绝缘部5和半导体部6设置在基板1与钝化层7之间。
例如，如图6所示，本发明也提出了一种薄膜晶体管组件，包括：上述的具有钝化层7的薄膜晶体管；和分开设置的源极连接部81、漏极连接部82和栅极连接部83，源极连接部81、漏极连接部82和栅极连接部83分别与源极2、漏极3和栅极4电连接。
需要指出的是，在本发明中，所谓的源极连接部81、漏极连接部82和栅极连接部83仅仅起到将源极、漏极和栅极与TFT外部电连接的作用，任何起到该作用的部件可以作为该连接部。例如，当栅极与栅线直接连接时，栅线本身可作为栅极连接部。再如，栅线可以通过过孔与栅极电连接，此时，该过孔中的连接体即构成栅极连接部。
本发明还提出了一种薄膜晶体管的制造方法，包括步骤：提供基板1；和在基板1上设置栅极4、栅极绝缘部5、半导体部6、源极2和漏极3，使得半导体部6与栅极4之间利用栅极绝缘部5隔开，源极2和漏极3与半导体部6连接，且栅极4和半导体部6在基板1上的投影彼此不重叠。
可选地，上述方法中，如图3所示，栅极4、栅极绝缘部5、半导体部6、源极2和漏极3同层布置，且“在基板上设置栅极、栅极绝缘部、半导体部、源极和漏极”包括：通过一次构图工艺在基板上形成源极、漏极和栅极。
可选地，在上述方法中，如图10-13所示，“在基板上设置栅极4、栅极绝缘部5、半导体部6、源极2和漏极3”包括：同层设置源极2、漏极3和半导体部6。进一步地，如图10所示，“在基板上设置栅极4、栅极绝缘部5、半导体部6、源极2和漏极3”包括：将栅极4直接设置在基板1上；和将栅极绝缘部5的一部分设置在半导体部6和源、漏极所在层与基板1之间。或者，如图12所示，“在基板上设置栅极4、栅极绝缘部5、半导体部6、源极2和漏极3”包括：将半导体部6和源、漏极同层直接布置在基板1上；和将栅极绝缘部5的一部分设置在栅极4所在层与基板1之间。
可选地，上述方法还包括步骤：设置钝化层7，如图11、13所示，以将栅极4、源极2、漏极3、栅极绝缘部5和半导体部6设置在基板1与钝化层7之间。进一步地，该方法还包括步骤：在钝化层7上设置用于分别露出源极、漏极、栅极的凹口或过孔。
根据本发明的TFT能够以最多3层、最少2层膜层的工艺制程来实现其功能，从而减少由于段差较大而造成的断线不良率。
在本发明中，需要指出的是，为了保证需要面接触的两个构件之间的良好接触，还可以通过形成凹凸配合的接触面来提高接触面积。
根据本发明的TFT可以应用于LCD、LED、AMOLED、TN、ADS等显示领域。
根据本发明的实施例的还一方面，提出了一种阵列基板，包括：上述的薄膜晶体管组件；数据线和栅极线；以及像素电极，其中：所述数据线和栅极线分别与对应的源极和栅极电连接；所述像素电极与对应的漏极电连接。
根据本发明的实施例的又一方面，提出了一种显示装置，包括上述的阵列基板。显示装置可以是任何可以显示图像的装置，例如液晶面板、
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行变化。本发明的适用范围由所附权利要求及其等同物限定。

Claims (11)

1.一种薄膜晶体管，包括：
基板；
设置在基板上的栅极、栅极绝缘部、半导体部、源极和漏极，半导体部与栅极之间利用栅极绝缘部隔开，源极和漏极与半导体部连接，
栅极和半导体部在基板上的投影彼此不重叠，且栅极、栅极绝缘部、半导体部、源极和漏极同层布置，
其中，薄膜晶体管的远离基板的表面为平坦表面，且源极、漏极和栅极通过一次构图工艺在基板上形成。
2.根据权利要求1所述的薄膜晶体管，还包括：
钝化层，栅极、源极、漏极、栅极绝缘部和半导体部设置在基板与钝化层之间。
3.一种薄膜晶体管组件，包括：
根据权利要求2所述的薄膜晶体管；和
分开设置的源极连接部、漏极连接部和栅极连接部，源极连接部、漏极连接部和栅极连接部分别与源极、漏极和栅极电连接。
4.根据权利要求3所述的薄膜晶体管组件，其中：
源极、漏极、栅极分别具有露出到钝化层外侧的部分；
源极连接部、漏极连接部和栅极连接部在钝化层外侧分别与源极、漏极和栅极电连接。
5.根据权利要求3所述的薄膜晶体管组件，其中：
钝化层的边缘设置有三个凹口，分别露出源极、漏极、栅极；
源极连接部、漏极连接部和栅极连接部经由所述三个凹口分别与源极、漏极和栅极电连接。
6.根据权利要求3所述的薄膜晶体管组件，其中：
钝化层设置有三个过孔，分别露出源极、漏极、栅极；
源极连接部、漏极连接部和栅极连接部经由所述三个过孔分别与源极、漏极和栅极电连接，源极连接部、漏极连接部和栅极连接部中的每一个至少部分位于钝化层上。
7.一种薄膜晶体管的制造方法，包括步骤：
提供基板；和
在基板上设置栅极、栅极绝缘部、半导体部、源极和漏极，使得半导体部与栅极之间利用栅极绝缘部隔开，源极和漏极与半导体部连接，且栅极和半导体部在基板上的投影彼此不重叠，且栅极、栅极绝缘部、半导体部、源极和漏极同层布置，
其中，“在基板上设置栅极、栅极绝缘部、半导体部、源极和漏极”包括：使薄膜晶体管的远离基板的表面为平坦表面以及通过一次构图工艺在基板上形成源极、漏极和栅极。
8.根据权利要求7所述的方法，还包括步骤：
设置钝化层，以将栅极、源极、漏极、栅极绝缘部和半导体部设置在基板与钝化层之间。
9.根据权利要求8所述的方法，还包括步骤：
在钝化层上设置用于分别露出源极、漏极、栅极的凹口或过孔。
10.一种阵列基板，包括：
根据权利要求3-6中任一项所述的薄膜晶体管组件；
数据线和栅极线；以及
像素电极，
其中：
所述数据线和栅极线分别与对应的源极和栅极电连接；
所述像素电极与对应的漏极电连接。
11.一种显示装置，包括根据权利要求10所述的阵列基板。
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