CN104362211B - A kind of heterojunction solar battery and preparation method thereof - Google Patents

A kind of heterojunction solar battery and preparation method thereof Download PDF

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CN104362211B
CN104362211B CN201410586357.2A CN201410586357A CN104362211B CN 104362211 B CN104362211 B CN 104362211B CN 201410586357 A CN201410586357 A CN 201410586357A CN 104362211 B CN104362211 B CN 104362211B
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film
amorphous silicon
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thin film
metallic film
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CN104362211A (en
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张�林
王进
任明冲
谷士斌
何延如
杨荣
李立伟
郭铁
孟原
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ENN Solar Energy Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • H01L31/077Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type the devices comprising monocrystalline or polycrystalline materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1884Manufacture of transparent electrodes, e.g. TCO, ITO
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a kind of heterojunction solar battery and preparation method thereof, by forming specific metallic film on p-type amorphous silicon membrane surface, and form the second conductive film at described metal film surfaces, make the heterojunction solar battery of P-type non-crystalline silicon/metal film layer/TCO interfacial structure, making the interface in TCO/ metal film layer/P-type non-crystalline silicon structure is Ohmic contact, compared with the heterojunction solar battery of tradition P-type non-crystalline silicon/TCO interfacial structure, reduce the bigger contact resistance existed between TCO and P-type non-crystalline silicon thin film, thus reduce cell series resistance, be conducive to promoting the fill factor, curve factor of battery.

Description

A kind of heterojunction solar battery and preparation method thereof
Technical field
The present invention relates to technical field of solar batteries, particularly relate to a kind of heterojunction solar battery and system thereof Make method.
Background technology
Along with solaode BOS (system balancing parts) cost ratio increases, improve battery conversion efficiency Become particularly important.At silicon/crystalline silicon heterojunction solar battery because there is low temperature preparing, low-temperature coefficient and high turn Change the feature of efficiency it is considered to be the most competitive high performance solar batteries.
Silicon/crystalline silicon heterojunction solar battery is to be made up of multiple film layer, also exists multiple heterogeneous between multiple film layer Material interface, such as P-type non-crystalline silicon/TCO (Transparent Conductive Oxide, electrically conducting transparent oxygen Compound), the interface such as TCO/Ag and p-type non-crystalline silicon/i type intrinsic amorphous silicon, these Bimaterial in terface shadows Ring battery efficiency.P-type non-crystalline silicon/TCO refers to the interface of P-type non-crystalline silicon and TCO bi-material composition. Particularly P-type non-crystalline silicon/ITO (Indium Tin Oxides, tin-doped indium oxide) interface, owing to p-type is non- The Effective Doping of crystal silicon is too low, causes forming bigger transmission potential barrier in P-type non-crystalline silicon/ITO interface, from And adding the interface resistance of silicon/crystalline silicon heterojunction solar battery structure, this interface resistance makes crystal silicon different compared with conference The fill factor, curve factor of matter joint solar cell reduces.
In order to reduce the transmission potential barrier at TCO/P type non-crystalline silicon interface in battery structure, main in prior art There is a solution below:
A. the Effective Doping of P-type non-crystalline silicon is improved.The doped chemical of P-type non-crystalline silicon is boron, but often exists During doping, substantial amounts of boron atom is present in P-type non-crystalline silicon thin film as foreign atom.In prior art In by doping process parameter is adjusted, make P-type non-crystalline silicon thin film reach the transformation of amorphous state and crystalline state Point, can improve the Effective Doping rate of boron.But this process window is the narrowest, and technology stability is poor.
B. P-type non-crystalline silicon is fabricated to p-type microcrystal silicon emitter structure.Preparation p-type microcrystal silicon is conducive to Reduce the contact resistance of itself and TCO, increase the electrical conductivity of emitter stage.But battery structure is to p-type crystallite The requirement of silicon is the highest, in order to utilize the defect of amorphous silicon passivation grain surface, and makes the p-type of preparation micro- The electrical conductivity of crystal silicon layer is higher, and the thickness of p-type microcrystal silicon layer should be 5-10nm, this P prepared by requirement The crystal grain diameter of type microcrystal silicon meets < 1nm, and Discrete Distribution is between non-crystalline silicon.But this process window is relatively Narrow, it is difficult to stability contorting, if microcrystal silicon crystallization rate is too high, crystallite dimension is excessive, and boundary defect can be caused close Degree is relatively big, the serious fill factor, curve factor reducing battery and open-circuit voltage.Therefore, above two scheme all can not have The transmission potential barrier at TCO/P type non-crystalline silicon interface in the reduction battery structure of effect,
To sum up, the transmission potential barrier that the TCO/P type non-crystalline silicon interface of heterojunction solar battery structure exists, The interface series resistance making TCO/P type non-crystalline silicon interface is relatively big, is unfavorable for promoting the filling of solaode The factor.
Summary of the invention
The embodiment of the present invention provides a kind of heterojunction solar battery and preparation method thereof, in order to solve existing skill The transmission potential barrier that present in art, the TCO/P type non-crystalline silicon interface of heterojunction solar battery structure exists, The interface series resistance making TCO/P type non-crystalline silicon interface is relatively big, is unfavorable for promoting the filling of solaode Because of subproblem.
The embodiment of the present invention provides a kind of heterojunction solar battery, and this battery includes:
The i type intrinsic amorphous silicon thin film that sequentially forms at the back side of silicon substrate, N-shaped amorphous silicon membrane, First conductive film and back metal electrode;
The 2nd i type intrinsic amorphous silicon thin film, the p-type non-crystalline silicon that sequentially form in the front of described silicon substrate are thin Film, the metallic film formed on described p-type amorphous silicon membrane surface, and in described metal film surfaces shape Front metal electrode on the second conductive film become and described second conductive film.With tradition P-type non-crystalline silicon / TCO interfacial structure is compared, and the embodiment of the present invention provides heterojunction solar battery to reduce TCO and p-type The bigger contact resistance existed between amorphous silicon membrane, then reduce the series resistance of battery, is conducive to promoting The fill factor, curve factor of battery.
Further, the work function of described metallic film is more than described p-type amorphous silicon membrane.Described metal foil The work function of film is more than described p-type amorphous silicon membrane, makes metallic film thin with p-type non-crystalline silicon at metal electrode The interface formation anti-drag barrier of film or tunnel layer, reduction interface transmission resistance, and the second conductive film/ Film interface in metal film layer/P-type non-crystalline silicon structure is Ohmic contact, reduces the series electrical of battery Resistance.
Further, described metallic film is to use magnetron sputtering, thermal evaporation deposition or the side of molecular beam epitaxy Formula is formed.The metallic film using magnetron sputtering to prepare compares even compact, is more beneficial for reducing metal foil The transmission potential barrier at film/p-type amorphous silicon membrane interface, to reduce the interface series resistance of battery.
Further, the thickness of described metallic film is 0.1-10nm.Owing to metallic film is in incidence surface, In order to reduce the metallic film absorption to light, more light is made to enter p-type amorphous silicon membrane, metallic film Preferred thickness be 2nm.
Further, described metallic film is that aluminum metal thin film, thin nickel metal film, chromium metallic film or silicon close Gold metallic film.The most described metallic film is aluminum thin film, and when thickness is 2nm, aluminum thin film/p-type amorphous Silicon thin film interface is Ohmic contact, reduces the transmission potential barrier at aluminum thin film/p-type amorphous silicon membrane interface, to subtract The interface series resistance of baby battery.
Further, the back side at described silicon substrate sequentially forms an i type intrinsic amorphous silicon thin film, n Type amorphous silicon membrane is that the mode of using plasma chemical gaseous phase deposition PECVD is formed.
Further, the front at described silicon substrate sequentially forms the 2nd i type intrinsic amorphous silicon thin film, p Type amorphous silicon membrane is that the mode of using plasma chemical gaseous phase deposition PECVD is formed.
The embodiment of the present invention also provides for the manufacture method of a kind of heterojunction solar battery, including:
An i type intrinsic amorphous silicon thin film is formed at the back side of silicon substrate, thin at described i type intrinsic amorphous silicon Film surface forms N-shaped amorphous silicon membrane;
The 2nd i type intrinsic amorphous silicon thin film is formed, in described 2nd i type intrinsic in the front of described silicon substrate Amorphous silicon membrane surface forms p-type amorphous silicon membrane;
The first conductive film is formed and at described first conductive film on described N-shaped amorphous silicon membrane surface Surface forms back metal electrode;
Form metallic film on described p-type amorphous silicon membrane surface, form second at described metal film surfaces Conductive film, and form front metal electrode on described second conductive film surface.Prepared by the method Film interface in the TCO/ metal film layer/P-type non-crystalline silicon structure of battery knot is Ohmic contact, with tradition P-type non-crystalline silicon/TCO interfacial structure is compared, and reduces and exists relatively between TCO and P-type non-crystalline silicon thin film Big contact resistance, then reduce the series resistance of battery, is conducive to promoting the fill factor, curve factor of battery.
Further, the work function of the described metallic film formed on described p-type amorphous silicon membrane surface is more than Described p-type amorphous silicon membrane.The work function of the metallic film formed is more than p-type amorphous silicon membrane so that it is Metal electrode forms anti-drag barrier or tunnel layer with the interface of p-type amorphous silicon membrane, reduces interface transmission electricity Resistance, and the film interface in the second conductive film/metal film layer/P-type non-crystalline silicon structure is Ohmic contact, Reduce the series resistance of battery.
Further, use magnetron sputtering, heated filament hydatogenesis or molecular beam epitaxy mode non-in described p-type Polycrystal silicon film surface forms described metallic film.Use metallic film prepared by magnetron sputtering than more uniform cause Close, it is more beneficial for reducing the transmission potential barrier at metallic film/p-type amorphous silicon membrane interface, to reduce battery Interface series resistance.
Further, the thickness of described metallic film is 0.1-10nm.Owing to aluminum thin film is in incidence surface, In order to reduce the absorption to light of the aluminum thin film, more light is made to enter p-type amorphous silicon membrane, Al thin film Preferred thickness is 2nm.
Further, described metallic film is aluminum metal thin film, thin nickel metal film, chromium metallic film or silicon Alloy metal film.The most described metallic film is aluminum thin film, and when thickness is 2nm, aluminum thin film/p-type Amorphous silicon membrane interface is Ohmic contact, reduces the transmission gesture at aluminum thin film/p-type amorphous silicon membrane interface Build, to reduce the interface series resistance of battery.
Further, the mode of using plasma chemical gaseous phase deposition PECVD is at the described silicon substrate back side Form a described i type intrinsic amorphous silicon thin film and in a described i type intrinsic amorphous silicon film surface shape Become described N-shaped amorphous silicon membrane.
Further, the mode of using plasma chemical gaseous phase deposition PECVD is in described silicon substrate front Form described 2nd i type intrinsic amorphous silicon thin film and in described 2nd i type intrinsic amorphous silicon film surface shape Become described p-type amorphous silicon membrane.
In above-described embodiment, utilize the interface ohmic contact performance of metallic film/P-type non-crystalline silicon, and metal The Ohmic contact at thin film/ITO conductive film interface, forms metallic film on p-type amorphous silicon membrane surface, And form the second conductive film at metal film surfaces, make P-type non-crystalline silicon/metal film layer/ITO Conductive film interfacial structure, makes thin film circle in ITO conductive film/metal film layer/P-type non-crystalline silicon structure Face is Ohmic contact, compared with tradition P-type non-crystalline silicon/ITO conductive film interfacial structure, reduces ITO The bigger contact resistance existed between conductive film and P-type non-crystalline silicon thin film, reduces tradition p-type non-simultaneously The interface series resistance of crystal silicon/ITO interfacial structure, is conducive to promoting the fill factor, curve factor of battery.
Accompanying drawing explanation
For the technical scheme being illustrated more clearly that in the embodiment of the present invention, institute in embodiment being described below The accompanying drawing used is needed to briefly introduce, it should be apparent that, the accompanying drawing in describing below is only the present invention's Some embodiments, from the point of view of those of ordinary skill in the art, in the premise not paying creative work Under, it is also possible to other accompanying drawing is obtained according to these accompanying drawings.
The structural representation of a kind of heterojunction solar battery that Fig. 1 provides for the embodiment of the present invention;
The reality of the series impedance of the two types heterojunction solar battery that Fig. 2 provides for the embodiment of the present invention Test the schematic diagram of result;
The manufacture method flow chart of a kind of heterojunction solar battery that Fig. 3 provides for the embodiment of the present invention;
The structural representation of a kind of heterojunction solar battery that Fig. 4 provides for the embodiment of the present invention;
The structural representation of a kind of heterojunction solar battery that Fig. 5 provides for the embodiment of the present invention;
The structural representation of a kind of heterojunction solar battery that Fig. 6 provides for the embodiment of the present invention;
The structural representation of a kind of heterojunction solar battery that Fig. 7 provides for the embodiment of the present invention;
The structural representation of a kind of heterojunction solar battery that Fig. 8 provides for the embodiment of the present invention.
Detailed description of the invention
In order to make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to this Bright it is described in further detail, it is clear that described embodiment is only some embodiments of the present invention, Rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art are not doing Go out all other embodiments obtained under creative work premise, broadly fall into the scope of protection of the invention.
The structural representation of a kind of heterojunction solar battery that the embodiment of the present invention as shown in Figure 1 provides, This solaode includes:
The i type intrinsic amorphous silicon thin film 2 that sequentially forms at the back side of silicon substrate 1, N-shaped amorphous silicon membrane 3, the first conductive film 7 and back metal electrode 8;
The 2nd i type intrinsic amorphous silicon thin film 4 that sequentially forms in the front of silicon substrate, p-type amorphous silicon membrane 5, The metallic film 6 formed on p-type amorphous silicon membrane surface, and second formed on metallic film 6 surface Front metal electrode 10 on conductive film 9 and the second conductive film 9.
Wherein, the front of silicon substrate 1 refers to that incident light plane, the back side of silicon substrate 1 refer to shady face, and silicon serves as a contrast The end 1 is N-type, and silicon substrate 1 is monocrystalline substrate or multicrystalline silicon substrate, and its thickness is 60-200 μm, its Resistivity is 0.5-5 Ω cm, and its lattice direction is (100).
The thickness of the oneth i type intrinsic amorphous silicon thin film 2 is 3-10nm, it is preferred that an i type of formation is originally The thickness of intrinsic amorphous silicon film 2 is 6nm, the N-shaped amorphous on i type intrinsic amorphous silicon thin film 2 surface The thickness of silicon thin film 3 is 3-10nm, it is preferred that the thickness of the N-shaped amorphous silicon membrane 3 of formation is 8nm. It is preferred that the i type intrinsic amorphous silicon thin film sequentially formed at the back side of silicon substrate, N-shaped non-crystalline silicon are thin Film is that the mode of using plasma chemical gaseous phase deposition PECVD is formed.
The thickness of the 2nd i type intrinsic amorphous silicon thin film 4 is 3-10nm, it is preferred that the 2nd i type of formation is originally The thickness of intrinsic amorphous silicon film 4 is 6nm, the p-type that the 2nd i type intrinsic amorphous silicon thin film 4 surface is formed The thickness of amorphous silicon membrane 5 is 3-10nm, it is preferred that the thickness of the p-type amorphous silicon membrane 5 of formation is 6nm.It is preferred that the 2nd i type intrinsic amorphous silicon thin film 4 sequentially formed in the front of silicon substrate, p-type is non- Polycrystal silicon film 5 is that the mode of using plasma chemical gaseous phase deposition PECVD is formed.P-type non-crystalline silicon Thin film 5 can be amorphous silicon membrane or microcrystalline silicon film, and the i type intrinsic amorphous silicon thin film in embodiment is Passivation film layer on silicon substrate.
It is preferred that the work function of the metallic film 6 formed on p-type amorphous silicon membrane 5 surface is non-more than p-type Polycrystal silicon film 5, makes metal foil 6 be formed instead at the interface of front metal electrode 10 with p-type amorphous silicon membrane 5 Barrier layer or tunnel layer, reduction interface transmission resistance, and the second conductive film 9/ metallic film 6/P type Film interface in non-crystalline silicon 5 structure is Ohmic contact, reduces the series resistance of battery.In embodiment Work function refers to an electronics just to move on to the minimum energy needed for this body surface, merit from solid interior Function is the important attribute of metal.
It is preferred that metallic film 6 is to use magnetron sputtering, thermal evaporation deposition or the mode shape of molecular beam epitaxy Become.The metallic film 6 using magnetron sputtering to prepare compares even compact, is more beneficial for reducing metallic film The transmission potential barrier at/p-type amorphous silicon membrane interface, to reduce the interface series resistance of battery.
It is preferred that the thickness of metallic film 6 is 0.1-10nm.Owing to aluminum thin film is in incidence surface, in order to drop The low absorption to aluminum thin film to light, makes more light enter p-type amorphous silicon membrane, the preferred thickness of Al thin film For 2nm.
It is preferred that metallic film 6 is aluminum metal thin film, thin nickel metal film, chromium metallic film or silicon alloy gold Belong to thin film.Especially metallic film 6 is aluminum thin film, and when thickness is 2nm, aluminum thin film/p-type amorphous silicon membrane Interface is Ohmic contact, reduces the transmission potential barrier at aluminum thin film/p-type amorphous silicon membrane interface, to reduce battery Interface series resistance.
First conductive film 7 is the TCO conductive thin formed on the surface of N-shaped amorphous silicon membrane 3 overleaf Film, the thickness of the first conductive film 7 is 50--200nm, it is preferred that the first conductive film 7 is led for ITO Conductive film, its thickness is 90nm, and its resistivity is 1E-4--6E-4 Ω cm, and its light transmittance is about 79--85%, It is typically with what the mode of magnetron sputtering was formed.First conductive film, it is possible to increase infrared portion wavelength anti- Penetrate rate, improve battery short circuit electric current.
Back metal electrode 8 is Ag metal electrode.
The second conductive film 9 usually ITO conductive film that metallic film 6 surface is formed, thickness is 60-100nm, it is preferred that the thickness of the second conductive film 9 is 80nm, its resistivity be 1E-4 extremely 6E-4 Ω cm, its light transmittance is about 79% to 85%, it is common that use the mode of magnetron sputtering to be formed. The high transmission rate of the second conductive film 9 can increase battery incident illumination subnumber, thus improves battery short circuit electric current.
Front metal electrode 10 on second conductive film 9 is to be formed by front electrode silk-screen printing technique , it is common that silver electrode.
The present embodiment offer is included the hetero-junctions sun of ITO/ metallic film/p-type non-crystalline silicon interfacial structure What energy battery (sample 1-8) and employing same process made includes tradition ITO/p type non-crystalline silicon interfacial structure Heterojunction solar battery (sample 9-16) carry out series resistance test experiments respectively, two types is heterogeneous The experimental result of the series impedance of joint solar cell is as in figure 2 it is shown, can obtain this according to experimental result The string of the heterojunction solar battery including ITO/ metallic film/p-type non-crystalline silicon interfacial structure in embodiment The meansigma methods of connection resistance is 1.8 Ω cm2, and use what same process made to include tradition ITO/p type amorphous The meansigma methods of the series resistance of the heterojunction solar battery of silicon interface structure is 1.3 Ω cm2
To sum up, what the embodiment of the present invention provided includes the heterogeneous of ITO/ metallic film/p-type non-crystalline silicon interfacial structure Joint solar cell transmission gesture compared with the battery of traditional P-type non-crystalline silicon/ITO interfacial structure, between interface Base decreases, and the interface series resistance of battery is less.This is because at traditional P-type non-crystalline silicon/ITO circle In the battery of face structure, ITO conductive film has different work functions from p-type non-crystalline silicon, and ITO is metal Oxide, p-type non-crystalline silicon is silicon compound, and the difference in band gap of bi-material is relatively big, P-type non-crystalline silicon/ITO circle There is Schottky barrier in face, result in big interface resistance.And ITO conductive film and p-type non-crystalline silicon it Between prepare metallic film as transition zone after, the resistance value at ITO/ metallic film interface is the least, is considered as ITO/ metallic film interface is Ohmic contact, owing to the work function of metallic film is higher than p-type amorphous silicon membrane, Therefore metallic film/p-type non-crystalline silicon interface is also Ohmic contact, therefore ITO/ metallic film/p-type non-crystalline silicon interface Interface resistance the least.
In an embodiment, the interface ohmic contact performance of metallic film/P-type non-crystalline silicon, and metal foil are utilized The Ohmic contact at film/ITO conductive film interface, forms metallic film on p-type amorphous silicon membrane surface, with And form the second conductive film at metal film surfaces, make P-type non-crystalline silicon/metal film layer/ITO and led Conductive film interfacial structure, makes the film interface in ITO conductive film/metal film layer/P-type non-crystalline silicon structure For Ohmic contact, compared with tradition P-type non-crystalline silicon/ITO conductive film interfacial structure, reduce ITO and lead The bigger contact resistance existed between conductive film and P-type non-crystalline silicon thin film, reduces tradition p-type amorphous simultaneously The interface series resistance of silicon/ITO interfacial structure, is conducive to promoting the fill factor, curve factor of battery.
Based on identical technology design, the embodiment of the present invention also provides for the system of a kind of heterojunction solar battery Making method, the particular content of these preparation methoies can refer to said method embodiment, does not repeats them here.
The manufacture method of a kind of heterojunction solar battery that the embodiment of the present invention provides, as it is shown on figure 3, bag Include:
Step 301, forms an i type intrinsic amorphous silicon thin film, at i type intrinsic amorphous at the back side of silicon substrate Silicon film surface forms N-shaped amorphous silicon membrane;
Step 302, forms the 2nd i type intrinsic amorphous silicon thin film, in the 2nd i type intrinsic in the front of silicon substrate Amorphous silicon membrane surface forms p-type amorphous silicon membrane;
Step 303, forms metallic film on p-type amorphous silicon membrane surface;
Step 304, forms the first conductive film and at the first conductive film on N-shaped amorphous silicon membrane surface Surface formed back metal electrode;
Step 305, forms the second conductive film at metal film surfaces, and on the second conductive film surface Form front metal electrode.
In enforcement, silicon substrate is N-type silicon chip, before step 301, N-type silicon chip is carried out making herbs into wool and Cleaning treatment, detailed process is:
Making herbs into wool processes: the aqueous slkali of configuration 20L, and solution ratio is: NaOH (0.2% < wt < 2%), IPA (5% < Vol < 15%), Na2SiO3 (0.8% < wt < 6%), solution temperature is 75-85 DEG C, the making herbs into wool time For 25-40min.
Cleaning treatment: use the RCA solution of standard, at temperature is 65-80 DEG C, silicon chip is carried out, Scavenging period is 15min.
It is preferred that in step 301, the mode of using plasma chemical gaseous phase deposition PECVD serves as a contrast at silicon Bottom back side forms an i type intrinsic amorphous silicon thin film and forms n at an i type intrinsic amorphous silicon film surface Type amorphous silicon membrane, the battery structure of formation is as shown in Figure 4.
Concrete, silicon chip is sent into PECVD vacuum chamber by silicon chip, the back side making silicon chip is exposed in vacuum In chamber, chamber is carried out hydrogen purge 2-3 time, after temperature stabilization, carry out plasma glow start deposition first I type intrinsic amorphous silicon thin film.Depositing operation is: temperature is 150-200 DEG C, pressure 1-2.5Torr, hydrogen silicon ratio 4%-15%, an i type intrinsic amorphous silicon film thickness of formation is 3-10nm, it is preferred that the of formation The thickness of one i type intrinsic amorphous silicon thin film is 6nm.The most again chamber is carried out hydrogen purge 2-3 time, treat Plasma glow start is carried out, at an i type intrinsic amorphous silicon film surface depositing n-type amorphous after temperature stabilization Silicon thin film.Depositing operation is: temperature is 150-200 DEG C, pressure 1-2.5Torr, and hydrogen silicon is than 4%-15%, n The doped chemical of type amorphous silicon membrane is phosphorus, and P/Si ratio is 1:5 to 1:1, the N-shaped non-crystalline silicon of formation The thickness of thin film is 3-10nm, it is preferred that the thickness of the N-shaped amorphous silicon membrane of formation is 8nm.
It is preferred that in step 302, the mode of using plasma chemical gaseous phase deposition PECVD serves as a contrast at silicon Front, the end forms the 2nd i type intrinsic amorphous silicon thin film and forms p at the 2nd i type intrinsic amorphous silicon film surface Type amorphous silicon membrane, the battery structure of formation is as shown in Figure 5.
Concrete, silicon chip is sent into PECVD vacuum chamber by silicon chip, the front making silicon chip is exposed in vacuum In chamber, chamber is carried out hydrogen purge 2-3 time, after temperature stabilization, carry out plasma glow start deposition second I type intrinsic amorphous silicon thin film.Depositing operation is: temperature is 150-200 DEG C, pressure 1-2.5Torr, hydrogen silicon ratio 4%-15%, the thickness of the 2nd i type intrinsic amorphous silicon thin film is 3-10nm, it is preferred that the 2nd i of formation The thickness of type intrinsic amorphous silicon thin film is 6nm;Then chamber is carried out hydrogen purge 2-3 time, treat that temperature is steady Carry out plasma glow start after Ding, deposit P-type non-crystalline silicon thin film at the 2nd i type intrinsic amorphous silicon film surface. Depositing operation is: temperature is 150-200 DEG C, pressure 1-2.5Torr, and hydrogen silicon is than 4%-15%, P-type non-crystalline silicon The doped chemical of thin film is boron, and B/Si ratio is 1:5 to 1:1, and the thickness of P-type non-crystalline silicon thin film is 3-10nm, Preferably, the thickness of the P-type non-crystalline silicon thin film of formation is 6nm.
In step 303, use the modes such as magnetron sputtering, heated filament hydatogenesis, molecular beam epitaxy non-in p-type The battery structure that polycrystal silicon film surface is formed after forming metallic film is as shown in Figure 6.
It is preferred that the work function of the metallic film formed on p-type amorphous silicon membrane surface is more than p-type non-crystalline silicon Thin film.The work function of the metallic film formed is more than p-type amorphous silicon membrane so that it is in metal electrode and p-type The interface of amorphous silicon membrane forms anti-drag barrier or tunnel layer, reduces interface transmission resistance, and second leads Film interface in conductive film/metal film layer/P-type non-crystalline silicon structure is Ohmic contact, reduces battery Series resistance.
It is preferred that use magnetron sputtering, heated filament hydatogenesis or molecular beam epitaxy mode thin at p-type non-crystalline silicon Film surface forms metallic film.Preferably, magnetron sputtering method is utilized to deposit metal foil on P-type non-crystalline silicon surface Film, then when requiring its sputtering or deposit, ion energy is less, it is to avoid cause amorphous silicon membrane or interface Damage.The metallic film using magnetron sputtering to prepare compares even compact, is more beneficial for reducing metallic film/p The transmission potential barrier at type amorphous silicon membrane interface, to reduce the interface series resistance of battery.
It is preferred that the thickness of metallic film is 0.1-10nm.Owing to aluminum thin film is in incidence surface, in order to reduce To the absorption to light of the aluminum thin film, making more light enter p-type amorphous silicon membrane, the preferred thickness of Al thin film is 2nm。
It is preferred that metallic film is aluminum metal thin film, thin nickel metal film, chromium metallic film or silicon alloy metal Thin film.Especially metallic film is aluminum thin film, and when thickness is 2nm, aluminum thin film/p-type amorphous silicon membrane interface For Ohmic contact, reduce the transmission potential barrier at aluminum thin film/p-type amorphous silicon membrane interface, to reduce the boundary of battery Face series resistance.
Preferably, depositing layer of metal aluminum thin film on P-type non-crystalline silicon surface, its structure is crystalline state, so that Aluminum thin film/p-type amorphous silicon thin-film materials interface, by Al atoms permeating, forms a kind of metallic compound, Make it form anti-drag barrier at aluminum thin film/p-type amorphous silicon membrane interface or tunnel layer, i.e. aluminum thin film/p-type are non- Polycrystal silicon film interface is Ohmic contact, reduces the transmission potential barrier at aluminum thin film/p-type amorphous silicon membrane interface, with Reduce the interface series resistance of battery.
In step 304, the mode of magnetron sputtering is used to form the first conductive thin on N-shaped amorphous silicon membrane surface Film, the first conductive film is typically ITO conductive film, and the thickness of ITO conductive film is 90nm, its electricity Resistance rate is 1.2E-4 Ω cm, and its light transmittance is about 81%, and the battery structure that this step is formed is as shown in Figure 7.
The mode using magnetron sputtering in step 305 forms the second conductive thin on p-type amorphous silicon membrane surface Film, the second conductive film is typically ITO conductive film, and the thickness of ITO conductive film is 80nm, its electricity Resistance rate is 1.2E-4 Ω cm, and its light transmittance is about 82%;Front metal electrode on second conductive film is Formed by front electrode silk-screen printing technique, it is common that silver electrode, the battery structure of formation such as Fig. 8 institute Show.
In above-described embodiment, between step 301 and step 302, and between step 304 and step 305 There is no strict timing requirements.
In an embodiment, the interface ohmic contact performance of metallic film/P-type non-crystalline silicon, and metal foil are utilized The Ohmic contact at film/ITO conductive film interface, forms metallic film on p-type amorphous silicon membrane surface, with And form the second conductive film at metal film surfaces, make P-type non-crystalline silicon/metal film layer/ITO and led Conductive film interfacial structure, makes the film interface in ITO conductive film/metal film layer/P-type non-crystalline silicon structure For Ohmic contact, compared with tradition P-type non-crystalline silicon/ITO conductive film interfacial structure, reduce ITO and lead The bigger contact resistance existed between conductive film and P-type non-crystalline silicon thin film, reduces tradition p-type amorphous simultaneously The interface series resistance of silicon/ITO interfacial structure, is conducive to promoting the fill factor, curve factor of battery.
Although preferred embodiments of the present invention have been described, but those skilled in the art once know base This creativeness concept, then can make other change and amendment to these embodiments.So, appended right is wanted Ask and be intended to be construed to include preferred embodiment and fall into all changes and the amendment of the scope of the invention.
Obviously, those skilled in the art can carry out various change and modification without deviating from this to the present invention Bright spirit and scope.So, if the present invention these amendment and modification belong to the claims in the present invention and Within the scope of its equivalent technologies, then the present invention is also intended to comprise these change and modification.

Claims (14)

1. a heterojunction solar battery, it is characterised in that including:
The i type intrinsic amorphous silicon thin film that sequentially forms at the back side of silicon substrate, N-shaped amorphous silicon membrane, First conductive film and back metal electrode;
The 2nd i type intrinsic amorphous silicon thin film, the p-type non-crystalline silicon that sequentially form in the front of described silicon substrate are thin Film, the metallic film formed on described p-type amorphous silicon membrane surface, and in described metal film surfaces shape Front metal electrode on the second conductive film become and described second conductive film, wherein, the second conductive thin Film is transparent conductive oxide TCO thin film.
2. solaode as claimed in claim 1, it is characterised in that the work content of described metallic film Number is more than described p-type amorphous silicon membrane.
3. solaode as claimed in claim 2, it is characterised in that described metallic film is to use The mode of magnetron sputtering, thermal evaporation deposition or molecular beam epitaxy is formed.
4. solaode as claimed in claim 3, it is characterised in that the thickness of described metallic film For 0.1-10nm.
5. the solaode as described in any one of claim 1-4, it is characterised in that described metal foil Film is aluminum metal thin film, thin nickel metal film, chromium metallic film or silicon alloy metallic film.
6. solaode as claimed in claim 1, it is characterised in that at the back side of described silicon substrate The described i type intrinsic amorphous silicon thin film sequentially formed, described N-shaped amorphous silicon membrane are to use plasma The mode of body chemical vapor phase growing PECVD is formed.
7. solaode as claimed in claim 1, it is characterised in that in the front of described silicon substrate The described 2nd i type intrinsic amorphous silicon thin film sequentially formed, described p-type amorphous silicon membrane are to use plasma The mode of body chemical vapor phase growing PECVD is formed.
8. the manufacture method of a heterojunction solar battery, it is characterised in that including:
An i type intrinsic amorphous silicon thin film is formed at the back side of silicon substrate, thin at described i type intrinsic amorphous silicon Film surface forms N-shaped amorphous silicon membrane;
The 2nd i type intrinsic amorphous silicon thin film is formed, in described 2nd i type intrinsic in the front of described silicon substrate Amorphous silicon membrane surface forms p-type amorphous silicon membrane;
The first conductive film is formed and at described first conductive film on described N-shaped amorphous silicon membrane surface Surface forms back metal electrode;
Form metallic film on described p-type amorphous silicon membrane surface, form second at described metal film surfaces Conductive film, and front metal electrode, wherein, the second conduction is formed on described second conductive film surface Thin film is transparent conductive oxide TCO thin film.
9. method as claimed in claim 8, it is characterised in that on described p-type amorphous silicon membrane surface The work function of the described metallic film formed is more than described p-type amorphous silicon membrane.
10. method as claimed in claim 9, it is characterised in that use the evaporation of magnetron sputtering, heated filament heavy Long-pending or molecular beam epitaxy mode forms described metallic film on described p-type amorphous silicon membrane surface.
11. methods as claimed in claim 10, it is characterised in that the thickness of described metallic film is 0.1-10nm。
12. methods as described in any one of claim 8-11, it is characterised in that described metallic film is aluminum Metallic film, thin nickel metal film, chromium metallic film or silicon alloy metallic film.
13. methods as claimed in claim 8, it is characterised in that using plasma chemical gaseous phase deposits The mode of PECVD forms a described i type intrinsic amorphous silicon thin film and in institute at the described silicon substrate back side State an i type intrinsic amorphous silicon film surface and form described N-shaped amorphous silicon membrane.
14. methods as claimed in claim 8, it is characterised in that using plasma chemical gaseous phase deposits The mode of PECVD forms described 2nd i type intrinsic amorphous silicon thin film and in institute in described silicon substrate front State the 2nd i type intrinsic amorphous silicon film surface and form described p-type amorphous silicon membrane.
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