CN110797428A - Heterojunction solar cell - Google Patents
Heterojunction solar cell Download PDFInfo
- Publication number
- CN110797428A CN110797428A CN201810873405.4A CN201810873405A CN110797428A CN 110797428 A CN110797428 A CN 110797428A CN 201810873405 A CN201810873405 A CN 201810873405A CN 110797428 A CN110797428 A CN 110797428A
- Authority
- CN
- China
- Prior art keywords
- layer
- conductive layer
- transparent
- metal
- transparent conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052751 metal Inorganic materials 0.000 claims abstract description 129
- 239000002184 metal Substances 0.000 claims abstract description 129
- 239000000463 material Substances 0.000 claims abstract description 15
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 50
- 229910052709 silver Inorganic materials 0.000 claims description 12
- 239000004332 silver Substances 0.000 claims description 12
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical group [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 10
- 229910052698 phosphorus Inorganic materials 0.000 claims description 10
- 239000011574 phosphorus Substances 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 8
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910021424 microcrystalline silicon Inorganic materials 0.000 claims description 4
- 238000002834 transmittance Methods 0.000 abstract description 10
- 230000003287 optical effect Effects 0.000 abstract description 3
- 238000002161 passivation Methods 0.000 description 22
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 16
- 238000000151 deposition Methods 0.000 description 16
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 16
- 239000010409 thin film Substances 0.000 description 15
- 230000008021 deposition Effects 0.000 description 12
- 238000000034 method Methods 0.000 description 12
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 11
- 239000007789 gas Substances 0.000 description 9
- 238000005240 physical vapour deposition Methods 0.000 description 9
- 229910052786 argon Inorganic materials 0.000 description 8
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 8
- 239000001301 oxygen Substances 0.000 description 8
- 229910052760 oxygen Inorganic materials 0.000 description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 7
- 229910052796 boron Inorganic materials 0.000 description 7
- 238000012216 screening Methods 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 6
- 239000001257 hydrogen Substances 0.000 description 6
- 229910052739 hydrogen Inorganic materials 0.000 description 6
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 5
- 229910000077 silane Inorganic materials 0.000 description 5
- 239000010408 film Substances 0.000 description 4
- 238000001755 magnetron sputter deposition Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 238000010790 dilution Methods 0.000 description 3
- 239000012895 dilution Substances 0.000 description 3
- 150000002431 hydrogen Chemical class 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 239000005922 Phosphane Substances 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910000064 phosphane Inorganic materials 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022466—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Energy (AREA)
- Photovoltaic Devices (AREA)
Abstract
The application provides a heterojunction solar cell, include: a chip intermediate comprising a first doped layer; the first transparent conducting layer is formed on the first doping layer; the first metal conducting layer is formed on the first transparent conducting layer; the second transparent conducting layer is arranged on the first metal conducting layer, so that the first metal conducting layer is completely coated by the first transparent conducting layer and the second transparent conducting layer; and the second metal conducting layer is formed on the second transparent conducting layer. The heterojunction solar cell structure can enable the carrier collecting capacity of the transparent conducting layer to be still unaffected when the optical transmittance is high. According to the structure, cheap materials such as AZO, BZO and the like can be used to replace ITO as the transparent electrode, and meanwhile, the performance of the battery is not affected.
Description
Technical Field
The invention belongs to the technical field of photovoltaics, and particularly relates to a heterojunction solar cell.
Background
A heterojunction (SHJ) solar cell is a high-efficiency crystalline silicon solar cell at present, and has many advantages of high open-circuit voltage, high conversion efficiency, low temperature coefficient, and the like. Fig. 1 is a schematic structural diagram of a conventional crystalline silicon heterojunction solar cell. The SHJ battery sequentially comprises a first metal electrode 8, a first Transparent Conductive (TCO) layer 6, a phosphorus-doped a-Si H layer (N-type doped layer) 3, a first intrinsic amorphous silicon passivation layer 2, an N-type monocrystalline silicon wafer 1, a second intrinsic amorphous silicon passivation layer 4, a boron-doped a-Si H layer (P-type doped layer) 5, a second transparent conductive layer 7 and a second metal electrode 8' from top to bottom. The first metal electrode 8, the first transparent conducting layer 6, the phosphorus-doped a-Si, the H layer (N-type doped layer) 3 and the first intrinsic amorphous silicon passivation layer 2 form a first surface of the cell; the second intrinsic amorphous silicon passivation layer 4, the boron doped a-Si H layer (P-doped layer) 5, the second transparent conductive layer 7, and the second metal electrode 8' constitute the second surface of the cell.
The transparent conducting layer is an important part of the SHJ battery, and common TCO materials include ITO, AZO, BZO and the like. They are not only the light trapping and reflection reducing layer of the cell, but also responsible for collecting the charge carriers of the cell. The total thickness of the TCO layer deposited on the surface of the SHJ battery is 70-90 nm. If only from the aspect of optical requirements, the higher the light transmittance of the TCO layer is, the better the TCO layer is; the higher the conductivity (conductivity) of the TCO layer, the better if only from an electrical point of view. Generally, the transmittance and conductivity (conductivity) of the TCO layer are a pair of spears, and the increase in conductivity is often dependent on the increase in carrier concentration in the bulk of the TCO layer material, but the pursuit of the increase in carrier concentration causes the decrease in light transmittance. This is because the increase of the carrier concentration increases the absorption of the transparent conductive oxide film to long-wavelength band photons, which causes the transmittance of the TCO layer to decrease, and further causes the decrease of the short-circuit current of the cell. The SHJ battery is a high-efficiency battery, the current ratio of the battery is large, and in order to meet the photoelectric performance requirement of the TCO layer, the TCO material which is most commonly used at present is an ITO transparent conductive layer. The ITO film has better photoelectric property, and the cost is higher because the material contains a large amount of rare metal indium. When the ITO transparent conductive layer is selected as the SHJ cell electrode, since the transmittance and conductivity (conductivity) of the thin film are a pair of spears, the designer needs to fully consider the balance problem of the "contradiction" of the photoelectric properties of the material when designing the cell parameters. There are other types of materials with slightly poor performance, such as AZO, BZO, etc., which have a certain difference between photoelectric performance and ITO, and ITO materials cannot be replaced on a large scale without changing the cell structure.
Disclosure of Invention
The invention provides a heterojunction solar cell and a preparation method thereof, aiming at solving the contradiction between the light transmittance and the electric conductivity of a transparent conducting layer in the prior art.
In one aspect, the present invention provides a heterojunction solar cell, comprising: a chip intermediate comprising a first doped layer; the first transparent conducting layer is formed on the first doping layer; the first metal conducting layer is formed on the first transparent conducting layer; the second transparent conducting layer is arranged on the first metal conducting layer, so that the first metal conducting layer is completely coated by the first transparent conducting layer and the second transparent conducting layer; and the second metal conducting layer is formed on the second transparent conducting layer.
According to an embodiment of the present invention, the first metal conductive layer and the second metal conductive layer overlap each other in a projection in a thickness direction of the transparent conductive layer.
According to another embodiment of the present invention, the material of the metal conductive layer includes at least one of silver and aluminum.
According to another embodiment of the present invention, the thickness of the first metal conductive layer and the second metal conductive layer is 5-20 μm.
According to another embodiment of the present invention, the material of the transparent conductive layer includes at least one of ITO, AZO, and BZO.
According to another embodiment of the present invention, the total thickness of the first transparent conductive layer and the second transparent conductive layer is 70 to 90 nm.
According to another embodiment of the present invention, the solar cell further comprises: the third transparent conducting layer is formed on the second metal conducting layer, so that the second metal conducting layer is completely coated by the second transparent conducting layer and the third transparent conducting layer; and the third metal conducting layer is formed on the third transparent conducting layer.
The heterojunction solar cell further comprises:
according to another embodiment of the present invention, the solar cell further comprises: the fourth transparent conducting layer is formed on the third metal conducting layer, so that the third metal conducting layer is completely coated by the third transparent conducting layer and the fourth transparent conducting layer; and the fourth metal conducting layer is formed on the fourth transparent conducting layer.
According to another embodiment of the present invention, the chip intermediate further includes a first intrinsic layer, a crystalline silicon substrate, a second intrinsic layer, and a second doped layer; the first doping layer, the first intrinsic layer, the crystalline silicon substrate, the second intrinsic layer and the second doping layer are sequentially stacked; and the doping types of the first doping layer and the second doping layer are different.
According to another embodiment of the present invention, the N-type doped layer is a phosphorus doped amorphous silicon or microcrystalline silicon layer; the P-type doped layer is a boron-doped amorphous silicon or microcrystalline silicon layer.
According to another embodiment of the invention, the heterojunction solar cell further comprises: a first' transparent conductive layer formed on the second doped layer; a first 'metal conductive layer formed on the first' transparent conductive layer; a second ' transparent conductive layer disposed on the first ' metal conductive layer such that the first ' metal conductive layer is completely covered by the first ' transparent conductive layer and the second ' transparent conductive layer; a second 'metallic conductive layer formed on the second' transparent conductive layer.
According to another embodiment of the invention, the heterojunction solar cell further comprises: a third ' transparent conductive layer formed on the second ' metal conductive layer such that the second ' metal conductive layer is completely covered by the second ' transparent conductive layer and the third ' transparent conductive layer; and a third 'metal conductive layer formed on the third' transparent conductive layer.
According to another embodiment of the invention, the heterojunction solar cell further comprises: a fourth ' transparent conductive layer formed on the third ' metal conductive layer such that the third ' metal conductive layer is completely covered by the third ' transparent conductive layer and the fourth ' transparent conductive layer; and a fourth 'metal conductive layer formed on the fourth' transparent conductive layer.
The heterojunction solar cell structure can enable the capacity of collecting carriers (the filling factor of the cell) to be still unaffected when the optical transmittance of the transparent conducting layer is high (the short-circuit current of the cell is large). According to the structure, cheap materials such as AZO, BZO and the like can be used to replace ITO as the transparent electrode, and meanwhile, the performance of the battery is not affected.
Drawings
The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
Fig. 1 is a schematic structural view of a conventional SHJ battery;
fig. 2 is a schematic structural diagram of an SHJ battery according to an embodiment of the present invention;
fig. 3 is a schematic structural view of an SHJ battery according to yet another embodiment of the present invention; and
fig. 4 is a schematic structural view of an SHJ battery according to still another embodiment of the present invention.
Wherein the reference numerals are as follows:
1: n-type monocrystalline silicon piece
2: a first intrinsic amorphous silicon passivation layer
3: phosphorus doped a-Si H layer (N-type doped layer)
4: a second intrinsic amorphous silicon passivation layer
5: boron doped a-Si H layer (P-type doped layer)
6: a first transparent electrode
61: a first transparent conductive layer
62: second transparent conductive layer
63: third transparent conductive layer
64: a fourth transparent conductive layer
7: a second transparent electrode
71: first' transparent conductive layer
72: second' transparent conductive layer
73: third' transparent conductive layer
74: fourth' transparent conductive layer
8: a first metal electrode
8': second screen printed silver electrode
81: first metal conductive layer
82: second metal conductive layer
83: third metal conductive layer
84: a fourth metal conductive layer
9: second metal electrode
91: first metal conductive layer
92: second metal conductive layer
93: third' Metal conductive layer
94: fourth' Metal conductive layer
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. In the drawings, the thickness of regions and layers are exaggerated for clarity. The same reference numerals denote the same or similar structures in the drawings, and thus detailed descriptions thereof will be omitted.
In the present invention, terms such as upper and lower are merely relative concepts, and should not be considered as limiting.
The heterojunction solar cell provided by the embodiment of the invention comprises a chip intermediate, a transparent electrode and a metal electrode. The chip intermediate comprises a first doping layer, a first intrinsic layer, a crystalline silicon substrate, a second intrinsic layer and a second doping layer which are sequentially stacked, wherein the doping types of the first doping layer and the second doping layer are different. The method for forming the transparent electrode and the metal electrode includes the steps of: forming a first transparent conductive layer on the first doping layer of the chip intermediate; forming a first metal conductive layer on the first transparent conductive layer; forming a second transparent conducting layer on the first metal conducting layer, so that the first metal conducting layer is completely coated by the first transparent conducting layer and the second transparent conducting layer; and forming a second metal conductive layer on the second transparent conductive layer. .
As shown in fig. 2, a chip intermediate is first formed, for example, a first intrinsic passivation layer 2 and a phosphorus-doped a-Si: H layer (N-type doped layer) 3 are sequentially Chemical Vapor Deposited (CVD) on a first surface of a single crystal silicon wafer, for example, an N-type single crystal silicon wafer 1, and a second intrinsic passivation layer 4 and a boron-doped a-Si: H layer (P-type doped layer) 5 are sequentially chemical vapor deposited on a second surface of the N-type single crystal silicon wafer 1.
A first transparent conductive layer is then formed, for example PVD, on the first doped layer of the chip intermediate to form a first transparent conductive layer 61. A first 'transparent conductive layer is formed, for example PVD, on the second doped layer of the chip intermediate forming a first' transparent conductive layer 71. The transparent conductive layer 61 and the first' transparent conductive layer 71 may be ITO, AZO, or BZO thin films.
A first metal conductive layer 81 is then formed, for example screen printed, on the first transparent conductive layer 61. A first 'metallic conductive layer 91 is formed, for example screen printed, on the first' transparent conductive layer 71. The metal used for the first metal conductive layer 81 and the first' metal conductive layer 91 may be silver, aluminum, or the like. The thickness of the first metal conductive layer 81 and the first' metal conductive layer 91 may be 5-20 μm.
Subsequently, a second transparent conductive layer 62 is formed on the first metal conductive layer 81; a second 'transparent conductive layer 72 is formed on the first' metallic conductive layer 91. The process of forming the second transparent conductive layer 62 and the second 'transparent conductive layer 72 may be the same as the process of forming the first transparent conductive layer 61 and the first' transparent conductive layer 71.
Finally, a second metal conductive layer 82 is formed on the second transparent conductive layer 62; a second 'metallic conductive layer 92 is formed on the second' transparent conductive layer 72. The process of forming the second metal conductive layer 82 and the second 'metal conductive layer 92 may be the same as the process of forming the second metal conductive layer 81 and the first' metal conductive layer 91.
The embodiment shown in fig. 2 is exemplified by including 2 transparent conductive layers and 2 metal conductive layers, but the invention can also include 3 or 4 transparent conductive layers, 3 or 4 metal conductive layers. Finally, the total thickness of the multiple transparent conductive layers meets the requirements of the SHJ battery (the total thickness of the transparent conductive layers of the SHJ battery is 70-90nm generally). The first and first 'transparent conductive layers 61,71 and the second and second' transparent conductive layers 62,72 may be the same or different. The first and first 'metal conductive layers 81,91 and the second and second' metal conductive layers 82,92 may be the same or different. The metal used for the metal conductive layers 81,82,91 and 92 may be silver, aluminum, or the like. The thickness of the metal conductive layers 81,82,91,92 may be 5-20 μm.
As shown in fig. 2, the SHJ battery prepared according to the embodiment of the present invention sequentially includes, from top to bottom: the second metal conductive layer 82, the second transparent conductive layer 62, the first metal conductive layer 81, the first transparent conductive layer 61, the N-type doped layer 3, the first intrinsic amorphous silicon passivation layer 2, the N-type monocrystalline silicon wafer 1, the second intrinsic amorphous silicon passivation layer 4, the P-type doped layer 5, the second 'transparent conductive layer 71, the first' metal conductive layer 91, the second 'transparent conductive layer 72, and the second' metal conductive layer 92.
The first transparent conductive layer 61 and the second transparent conductive layer 62 in the first surface together constitute a transparent electrode.
The first and second' transparent conductive layers 71,72 in the second surface together constitute a transparent electrode.
In the final formed cell, the first screen printed metal conductive layer 81 is wrapped in the transparent conductive layers 71, 72. The metal conductive layer 91 of the first screen printing on the second surface is wrapped in the transparent conductive layers 91 and 92.
In fig. 2, the transparent electrode formed of the transparent conductive layers 61,62,71,72 and the metal electrode formed of the metal conductive layers 81,82,91,92 are formed in the N-type doped layer 3 and the P-type doped layer 5 in the same manner as described above, however, it is understood by those skilled in the art that the transparent electrode and the metal electrode formed in the above manner may be formed only in the N-type doped layer 3 or the P-type doped layer 5 to implement the present invention. As shown in fig. 3, the transparent electrode formed of the transparent conductive layers 61,62,63,64 and the metal electrode formed of the metal conductive layers 81,82,83,84 are formed on the N-type doped layer 3 by the above-described method. The P-doped layer 5 side forms a conventional transparent electrode 7 and a metal electrode 9.
According to the heterojunction solar cell, the conductivity of the metal conducting layer is far better than that of the transparent conducting layer, and the metal conducting layer is coated in the transparent conducting material, so that the transverse transmission of the transparent conducting layer can be greatly increased, and the conductivity is improved. The cell structure can enhance the conductivity of the transparent conductive electrode, and if the transparent electrode of the SHJ cell is an ITO film, the cell structure can further improve the transmittance of the ITO film and increase the cell current, and meanwhile, as the compensation of the metal electrode is realized, the carrier collection is not influenced, and the Filling Factor (FF) of the cell can be kept unchanged or even improved. In contrast to the conventional battery structure (shown in fig. 1), if the ITO thin film is required to have a high transmittance, the carrier concentration of the ITO thin film is reduced, and although the current of the battery is somewhat increased, the conductivity of the ITO is affected, and the FF of the battery is lowered, so that the conversion efficiency is irreparable. In addition, the battery structure of the invention can allow the battery to use cheap transparent conductive materials, such as AZO, BZO and the like to replace ITO materials, thereby saving the cost of the battery.
Example 1
The heterojunction solar cell of this embodiment is shown in fig. 2.
And a first intrinsic amorphous silicon passivation layer 2 and a phosphorus-doped a-Si H layer 3 are sequentially deposited on the first surface of the N-type monocrystalline silicon wafer 1 by adopting a chemical vapor deposition method, and a second intrinsic amorphous silicon passivation layer 4 and a boron-doped a-Si H layer 5 are sequentially deposited on the second surface of the N-type monocrystalline silicon wafer 1. The deposition conditions of the first intrinsic amorphous silicon passivation layer 2 or the second intrinsic amorphous silicon passivation layer 4 are as follows: the power of the power supply is 330W, and the gas flow ratio (hydrogen dilution ratio) of hydrogen to silane is 7: 1, pressure 0.65pa, substrate temperature at deposition 210 ℃. Deposition conditions for the phosphorus doped a-Si H layer 3 were: the power of the power supply is 300W, the gas flow ratio of hydrogen to silane (hydrogen dilution ratio) is 5:1, the gas flow ratio of phosphane to silane (phosphorus to silicon ratio) is 3:100, the pressure is 0.65pa, and the temperature of the substrate during deposition is 215 ℃. Deposition conditions for the boron doped a-Si: H layer 5 were: the power of the power supply was 250W, the gas flow ratio of hydrogen to silane (hydrogen dilution ratio) was 2.5:1, the gas flow ratio of phosphane to silane (phosphorus to silicon ratio) was 3:97, the pressure was 0.65pa, and the substrate temperature during deposition was 215 ℃.
Introducing argon and oxygen at room temperature, setting the gas flow ratio of argon to oxygen at 75:1, maintaining the pressure of the cavity at 0.25Pa, turning on the sputtering power supply, and controlling the power density of the power supply at 1.8W/cm2And depositing a first transparent conducting layer 61 on the upper surface of the cell on the phosphorus-doped a-Si/H layer 3 on the first surface of the cell by adopting a magnetron sputtering method, wherein the thickness of the deposited first transparent conducting layer 61 is 40 nm.
And (3) silk-screening a first metal conductive layer 81 on the first transparent conductive layer 61 on the first surface of the battery, wherein the thickness of the printed first metal conductive layer 81 is 6 mu m, and baking the battery at a low temperature of 120 ℃ for 3 min.
Placing the cell into a PVD cavity again, introducing argon and oxygen at room temperature, setting the gas flow ratio of argon to oxygen at 75:1, keeping the pressure of the cavity at 0.25Pa, turning on a sputtering power supply with power density of 1.8W/cm2And depositing the second transparent conducting layer 62 by adopting a magnetron sputtering method, wherein the thickness of the deposited second transparent conducting layer 62 is 40 nm.
And (3) silk-screening a second metal conductive layer 82 on the second transparent conductive layer 62 on the first surface of the battery, wherein the thickness of the printed second metal conductive layer 82 is 6 mu m, and baking the battery at a low temperature of 120 ℃ for 3 min.
The respective transparent conductive layers 71,72 and the metal conductive layers 91,92 are formed symmetrically on the second surface in the same manner as the transparent conductive layers 61,62 and the metal conductive layers 81,82 formed on the first surface.
Finally, the battery is put into an oven and baked at 200 ℃ for 50 min.
In this embodiment, the transparent conductive layers 61,62,71, and 72 are ITO thin films, and the metal conductive layers 81,82,91, and 92 are silver layers.
Example 2
The heterojunction solar cell of this embodiment is shown in fig. 4.
A first intrinsic amorphous silicon passivation layer 2 and a phosphorus doped layer 3 were sequentially deposited on the first surface of an N-type single crystal silicon wafer 1, and a second intrinsic amorphous silicon passivation layer 4 and a boron doped a-Si: H layer 5 were sequentially deposited on the second surface of the N-type single crystal silicon wafer 1 in the same manner as in example 1.
Introducing argon and oxygen at room temperature, setting the gas flow ratio of argon to oxygen at 25:1, maintaining the pressure of the cavity at 0.25Pa, turning on the sputtering power supply, and controlling the power density of the power supply at 1.8W/cm2And depositing a first transparent conducting layer 61 on the upper surface of the cell on the phosphorus-doped a-Si/H layer 3 on the first surface of the cell by adopting a magnetron sputtering method, wherein the thickness of the deposited first transparent conducting layer 61 is 20 nm.
A first metallic conductive layer 81 was screen-printed on the first transparent conductive layer 61 of the first surface of the cell in the same manner as in example 1, and the thickness of the printed first metallic electrical layer 81 was 3 μm.
The cell was again placed in a PVD chamber and deposition of a second transparent conductive layer 62 was continued under the same conditions as for the formation of the first transparent conductive layer 61, the second transparent conductive layer deposited having a thickness of 20 nm.
A second metallic conductive layer 82 was screen-printed again on the second transparent conductive layer 62 of the first surface of the cell in the same manner as in example 1, the thickness of the printed second metallic conductive layer 82 being 3 μm.
The cell was again placed in a PVD chamber and deposition of a third transparent conductive layer 63 was continued on the first surface of the cell under the same conditions as for the formation of the first transparent conductive layer 61, the thickness of the deposited third transparent conductive layer 63 being 20 nm.
And (3) silk-screening a third metal conductive layer 83 on the third transparent conductive layer 63 on the first surface of the battery, wherein the thickness of the printed third metal conductive layer 83 is 3 mu m, and baking the battery at a low temperature of 120 ℃ for 3 min.
The cell was again placed in a PVD chamber and deposition of the fourth transparent conductive layer 64 was continued under the same conditions as for the formation of the first transparent conductive layer 61, the thickness of the deposited fourth transparent conductive layer being 20 nm.
And (3) silk-screening a fourth metal conductive layer 84 on the fourth transparent conductive layer 64 on the first surface of the battery, wherein the thickness of the printed fourth metal conductive layer 84 is 3 microns, and baking the battery at a low temperature of 120 ℃ for 3 min.
The respective transparent conductive layers 71,72,73,74 and the metal conductive layers 91,92,93,94 are symmetrically formed on the second surface in the same manner as the transparent conductive layers 61,62,63,64 and the metal conductive layers 81,82,83,84 formed on the first surface.
Finally, the battery is put into an oven and baked at 200 ℃ for 50 min.
In this embodiment, the transparent conductive layers 61,62,63,64,71,72,73, and 74 are ITO thin films, and the metal conductive layers 81,82,83,84,91,92,93, and 94 are silver layers.
Example 3
The structure of the heterojunction solar cell of this example is the same as that of the solar cell of example 3, i.e., as shown in fig. 4. However, in this embodiment, the transparent conductive layers 61,62,63,64,71,72,73, and 74 are AZO thin films.
A first intrinsic amorphous silicon passivation layer 2 and a phosphorus doped a-Si: H layer 3 were sequentially deposited on the first surface of the N-type single crystal silicon wafer in the same manner as in example 1, and a second intrinsic amorphous silicon passivation layer 4 and a boron doped a-Si: H layer 5 were sequentially deposited on the second surface of the N-type single crystal silicon wafer.
Introducing argon and oxygen at room temperature, setting the gas flow ratio of argon to oxygen at 250:1, maintaining the pressure of the cavity at 0.4Pa, turning on the sputtering power supply, and controlling the power density of the power supply at 2.5W/cm2And depositing a first transparent conducting layer 61 on the upper surface of the cell on the phosphorus-doped a-Si/H layer 3 on the first surface of the cell by adopting a magnetron sputtering method, wherein the thickness of the deposited first transparent conducting layer 61 is 20 nm.
And (3) silk-screening a first metal conductive layer 81 on the first transparent conductive layer 61 on the first surface of the battery, wherein the thickness of the printed first metal conductive layer 81 is 3 mu m, and baking the battery at a low temperature of 120 ℃ for 3 min.
The cell was again placed in a PVD chamber and deposition of a second transparent conductive layer 62 was continued on the first surface of the cell under the same conditions as for the formation of the first transparent conductive layer 61, the second transparent conductive layer 62 being deposited with a thickness of 20 nm.
Silk-screen printing a second metal conductive layer 82 on the second transparent conductive layer 62 on the first surface of the battery, wherein the thickness of the printed second metal conductive layer 82 is 3 micrometers, and baking the battery at a low temperature of 120 ℃ for 3 min;
the cell was again placed in a PVD chamber and deposition of a third transparent conductive layer 63 was continued on the first surface of the cell under the same conditions as for the formation of the first transparent conductive layer 61, the thickness of the deposited third transparent conductive layer 63 being 20 nm.
And (3) silk-screening a third metal conductive layer 83 on the third transparent conductive layer 63 on the first surface of the battery, wherein the thickness of the printed third metal conductive layer 83 is 3 mu m, and baking the battery at a low temperature of 120 ℃ for 3 min.
The cell was again placed in a PVD chamber and the deposition of a fourth transparent conductive layer 64 was continued on the first surface of the cell under the same conditions as for the formation of the first transparent conductive layer 61, the thickness of the deposited fourth transparent conductive layer 64 being 20 nm.
And (3) silk-screening a fourth metal conductive layer 84 on the fourth transparent conductive layer 64 on the first surface of the battery, wherein the thickness of the printed fourth metal conductive layer 84 is 3 microns, and baking the battery at a low temperature of 120 ℃ for 3 min.
The respective transparent conductive layers 71,72,73,74 and the metal conductive layers 91,92,93,94 are symmetrically formed on the second surface in the same manner as the transparent conductive layers 61,62,63,64 and the metal conductive layers 81,82,83,84 formed on the first surface.
Finally, the battery is put into an oven and baked at 200 ℃ for 50 min.
In this embodiment, the metal conductive layers 81,82,83,84,91,92,93 and 94 are silver layers.
Comparative example 1
A first intrinsic amorphous silicon passivation layer and a phosphorus-doped a-Si: H layer were sequentially deposited on the first surface of the N-type single crystal silicon wafer in the same manner as in example 1, and a second intrinsic amorphous silicon passivation layer and a boron-doped a-Si: H layer were sequentially deposited on the second surface of the N-type single crystal silicon wafer.
An ITO thin film with a thickness of 80nm was deposited on the phosphorus doped a-Si: H layer of the first surface of the cell in the same manner as in example 1.
A silver electrode having a thickness of 12 μm was screen-printed on the ITO thin film of the first surface of the cell in the same manner as in example 1.
An ITO thin film with a thickness of 80nm was deposited on the boron doped a-Si: H layer of the second surface of the cell in the same manner as in example 1.
A silver electrode having a thickness of 12 μm was screen-printed on the ITO thin film of the second surface of the cell in the same manner as in example 1.
Finally, the battery is put into an oven and baked at 200 ℃ for 50 min.
Comparative example 2
A first intrinsic amorphous silicon passivation layer and a phosphorus-doped a-Si: H layer were sequentially deposited on the first surface of the N-type monocrystalline silicon wafer in the same manner as in example 1, and a second intrinsic amorphous silicon passivation layer and a boron-doped a-Si: H layer (P-type doped layer) were sequentially deposited on the second surface of the N-type monocrystalline silicon wafer.
An AZO thin film with a thickness of 80nm was deposited on the phosphorus doped a-Si: H layer of the first surface of the cell in the same manner as in example 3.
A silver electrode having a thickness of 12 μm was screen-printed on the AZO thin film of the first surface of the battery in the same manner as in example 1.
An AZO thin film with a thickness of 80nm was deposited on the boron doped a-Si: H layer of the second surface of the cell in the same manner as in example 3.
A silver electrode having a thickness of 12 μm was screen-printed on the AZO thin film of the second surface of the battery in the same manner as in example 1.
Finally, the battery is put into an oven and baked at 200 ℃ for 50 min.
The batteries of examples 1 to 3 and comparative examples 1 to 2 were subjected to performance tests under the following test conditions: AM1.5, 1000W/m225 ℃. The test results were normalized according to comparative example 1, i.e., the results obtained by calculating the parameters in the other examples with the parameters in comparative example 1 as 100%. The test results are shown in Table 1.
Table 1: the results of the batteries of examples 1-3 were compared with those of comparative examples 1-2.
It can be seen from the data in table 1 that the cell efficiency is improved in both examples 1 and 2 compared to comparative example 1. Example 3 demonstrates that by using the method of the present invention to replace ITO with inexpensive AZO materials, cell efficiency is not affected and is improved. Comparative example 2 is a battery in which ITO was replaced with inexpensive AZO and the structure was not adjusted, and the battery efficiency was significantly low, which indicates that ITO could not be replaced with AZO when the battery structure was not optimized.
The present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof, and it should be understood that various changes and modifications can be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (14)
1. A heterojunction solar cell, comprising:
a chip intermediate comprising a first doped layer;
the first transparent conducting layer is formed on the first doping layer;
the first metal conducting layer is formed on the first transparent conducting layer;
the second transparent conducting layer is arranged on the first metal conducting layer, so that the first metal conducting layer is completely coated by the first transparent conducting layer and the second transparent conducting layer;
and the second metal conducting layer is formed on the second transparent conducting layer.
2. The heterojunction solar cell of claim 1, wherein the first and second metal conductive layers coincide in projection along the thickness direction of the transparent conductive layer.
3. The heterojunction solar cell of claim 1, wherein the material of the metallic conductive layer comprises at least one of silver and aluminum.
4. The heterojunction solar cell of claim 1, wherein the thickness of the first and second metal conductive layers is 5-20 μ ι η.
5. The heterojunction solar cell of claim 1, wherein the material of the transparent conductive layer comprises at least one of ITO, AZO, and BZO.
6. The heterojunction solar cell of claim 1, wherein the total thickness of the first and second transparent conductive layers is 70-90 nm.
7. The heterojunction solar cell of claim 1, further comprising:
the third transparent conducting layer is formed on the second metal conducting layer, so that the second metal conducting layer is completely coated by the second transparent conducting layer and the third transparent conducting layer;
and the third metal conducting layer is formed on the third transparent conducting layer.
8. The heterojunction solar cell of claim 7, further comprising:
the fourth transparent conducting layer is formed on the third metal conducting layer, so that the third metal conducting layer is completely coated by the third transparent conducting layer and the fourth transparent conducting layer;
and the fourth metal conducting layer is formed on the fourth transparent conducting layer.
9. The heterojunction solar cell of claim 1, wherein the chip intermediate further comprises a first intrinsic layer, a crystalline silicon substrate, a second intrinsic layer, and a second doped layer; the first doping layer, the first intrinsic layer, the crystalline silicon substrate, the second intrinsic layer and the second doping layer are sequentially stacked; and the doping types of the first doping layer and the second doping layer are different.
10. The heterojunction solar cell of claim 9, wherein the first or second doped layer is selected from an N-type doped silicon layer and/or a P-type doped silicon layer.
11. The heterojunction solar cell of claim 10, wherein the N-type doped silicon layer is a phosphorus doped amorphous silicon or microcrystalline silicon layer; the P-type doped silicon layer is a boron-doped amorphous silicon or microcrystalline silicon layer.
12. The heterojunction solar cell of any of claims 9-11, further comprising:
a first' transparent conductive layer formed on the second doped layer;
a first 'metal conductive layer formed on the first' transparent conductive layer;
a second ' transparent conductive layer formed on the first ' metal conductive layer such that the first ' metal conductive layer is completely covered by the first ' transparent conductive layer and the second ' transparent conductive layer;
a second 'metallic conductive layer formed on the second' transparent conductive layer.
13. The heterojunction solar cell of claim 12, further comprising:
a third ' transparent conductive layer formed on the second ' metal conductive layer such that the second ' metal conductive layer is completely covered by the second ' transparent conductive layer and the third ' transparent conductive layer;
and a third 'metal conductive layer formed on the third' transparent conductive layer.
14. The heterojunction solar cell of claim 13, further comprising:
a fourth ' transparent conductive layer formed on the third ' metal conductive layer such that the third ' metal conductive layer is completely covered by the third ' transparent conductive layer and the fourth ' transparent conductive layer;
and a fourth 'metal conductive layer formed on the fourth' transparent conductive layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810873405.4A CN110797428A (en) | 2018-08-02 | 2018-08-02 | Heterojunction solar cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810873405.4A CN110797428A (en) | 2018-08-02 | 2018-08-02 | Heterojunction solar cell |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110797428A true CN110797428A (en) | 2020-02-14 |
Family
ID=69425232
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810873405.4A Pending CN110797428A (en) | 2018-08-02 | 2018-08-02 | Heterojunction solar cell |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110797428A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114975669A (en) * | 2022-05-30 | 2022-08-30 | 通威太阳能(金堂)有限公司 | Solar cell, preparation method and power generation device |
-
2018
- 2018-08-02 CN CN201810873405.4A patent/CN110797428A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114975669A (en) * | 2022-05-30 | 2022-08-30 | 通威太阳能(金堂)有限公司 | Solar cell, preparation method and power generation device |
| WO2023231434A1 (en) * | 2022-05-30 | 2023-12-07 | 通威太阳能(金堂)有限公司 | Solar cell and preparation method, and power generation device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP2095429B1 (en) | Solar cell and method for manufacturing the same | |
| EP3503210A1 (en) | Heterojunction solar cell and fabrication method thereof | |
| US20110259395A1 (en) | Single Junction CIGS/CIS Solar Module | |
| CN211376648U (en) | Heterojunction solar cell structure with double-layer TCO conductive film | |
| CN106784041A (en) | A kind of silicon based hetero-junction solar cell and preparation method thereof | |
| TWI463682B (en) | Heterojunction solar cell having intrinsic amorphous silicon film | |
| US20140261660A1 (en) | TCOs for Heterojunction Solar Cells | |
| US20100126569A1 (en) | Solar cell and method of fabricating the same | |
| CN104733557B (en) | HIT solar energy battery and method for improving short-circuit current density of HIT battery | |
| CN218788382U (en) | High-efficiency heterojunction solar cell | |
| CN108735828A (en) | Heterojunction back contact solar cell and preparation method thereof | |
| EP4345914A1 (en) | Heterojunction cell, and photovoltaic module cell string and manufacturing method therefor | |
| CN217280794U (en) | Photovoltaic cell | |
| CN208655672U (en) | Heterojunction solar battery | |
| CN114203851B (en) | Heterojunction solar cell and method for manufacturing heterojunction solar cell | |
| CN101393942B (en) | Polycrystalline-silicon carbide lamination thin-film solar cell | |
| CN114361281A (en) | Double-sided heterojunction solar cell and photovoltaic module | |
| CN115172602B (en) | Doped metal oxide composite layer structure | |
| CN110797428A (en) | Heterojunction solar cell | |
| CN114171632A (en) | Heterojunction solar cell and photovoltaic module | |
| CN212848450U (en) | Heterojunction solar cell and photovoltaic module | |
| KR101529232B1 (en) | Thin-film solar cell and method of fabricating the same | |
| CN114744063B (en) | Solar cell, production method and photovoltaic module | |
| CN212648257U (en) | Heterojunction solar cell | |
| CN209496888U (en) | A kind of solar battery |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20210119 Address after: 101102 102-lq307, 1-3 / F, building 26, 17 huanke Middle Road, Jinqiao Science and technology industrial base, Tongzhou Park, Zhongguancun Science and Technology Park, Tongzhou District, Beijing Applicant after: Deyun Chuangxin (Beijing) Technology Co.,Ltd. Address before: 100176 10th floor, building 2, yard 9, Ronghua South Road, Yizhuang Economic and Technological Development Zone, Daxing District, Beijing Applicant before: Juntai innovation (Beijing) Technology Co.,Ltd. |