CN104252435A - Structure-variable intelligent interface based on dynamical reconfigurable FAGA and configuration method thereof - Google Patents
Structure-variable intelligent interface based on dynamical reconfigurable FAGA and configuration method thereof Download PDFInfo
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Abstract
The invention provides a structure-variable intelligent interface based on a dynamical reconfigurable FAGA and a configuration method thereof. The interface comprises a dynamical reconfigurable unit, two or multiple varieties of interface drive circuits and analog switch matrix. The dynamical reconfigurable unit is used for switching interface controllers and controlling the analog switch matrix to switch circuits correspondingly according to the variety of the interface of foreign controlled equipment; the interface drive circuits are used for completing voltage conversion of digital level and differential level; the analog switch matrix is used for connecting the drive circuits with a physical interface according to the control signals output by the dynamical reconfigurable unit. According to the interface, focusing on different mission requirements, according to the variety of the interface of the foreign controlled equipment, the dynamical switching of the interface controllers is implemented, communication between one physical interface and different bus interface equipment can be implemented, fast integration of a flight control computer and foreign controlled equipment with multiple interface varieties can be implemented conveniently, and the universality of the aircraft flight control computer can be improved effectively.
Description
Technical field
The present invention is specifically related to varistructure intelligent interface based on dynamic reconfigurable FPGA and collocation method thereof, belongs to electric interfaces field.
Background technology
Flight control system is the core of aircraft, and it is control core with flight control computer, is aided with the outside controlled device such as sensor device, topworks's equipment, realizes the Navigation, Guidance and Control to aircraft.
The interface type of the outside controlled device of flight control system has multiple, and conventional comprises RS232, RS422, CAN, 1553B etc.At present, traditional method of production be every class aircraft when conceptual design, all can according to the outside controlled device interface selected to flight control computer carry out customization design produce.This traditional method of production brings two problems: one is that flight control computer redesign production adds time cost, is unfavorable for the fast verification of aircraft scheme; Two is only because interface type difference just may cause flight control computer again to go into operation, and causes cost waste to a certain extent.In addition, because the outside controlled device interface type selected is different, unified test platform cannot be provided, quick Acceptance Test can not be carried out to the outside controlled device that cooperation unit provides.
If flight control computer and outside controlled device all follow same plug and play standards and norms, and the compatible multiple bus interface form of flight control computer, when the outside controlled device access flight control computer of different bus interface shape, flight control computer dynamic changes the hardware configuration of interface, make it to match with outside controlled device, then same a set of flight control computer, through the combination from different outside controlled device, just energy fast assembling flight control system prototype machine, thus meet the demand of control system in rapid development and test better.
Summary of the invention
Technology of the present invention is dealt with problems and is: overcome the deficiencies in the prior art, a kind of varistructure intelligent interface based on dynamic reconfigurable FPGA and collocation method thereof are provided, this interface can according to external apparatus interface type, realize on-line loaded and the switching at runtime of interface controller, to solve the compatibling problem of flight control system main control equipment to the outside controlled device of multiple interfaces type.
Technical solution of the present invention is:
Varistructure intelligent interface based on dynamic reconfigurable FPGA comprises dynamic reconfigurable unit, two or more multiple interfaces driving circuit and analog switch matrix; Described dynamic reconfigurable unit comprises reconfigurable controller, dynamic reconfigurable FPGA and restructural resources bank; Dynamic reconfigurable FPGA comprises interface type identification module, the interface controller of dynamic reconstruct, reconstruct configuration interface, inner configuration access interface ICAP (Internal Configuration Access Port);
Restructural resources bank, stores multiple interfaces controller IP kernel;
Reconfigurable controller, according to the equipment interface information that interface type identification module is sent here, finds out from restructural resources bank and reads the interface controller IP kernel corresponding with equipment interface information; Reconfigurable controller is by expanding peripherals component interconnection STD bus (PCIe, Peripheral Component Interconnect Express) the interface controller IP kernel corresponding with equipment interface information is delivered to the reconstruct configuration interface of dynamic reconfigurable FPGA, reconfigurable controller produces switch matrix control signal and delivers to analog switch matrix simultaneously;
The interface controller IP kernel corresponding with equipment interface information that reconstruct configuration interface is sent here reconfigurable controller and outside controlled device steering order judge, if reconfigurable controller sends here is the interface controller IP kernel corresponding with equipment interface information, then this IP kernel is carried out format conversion become ICAP interface can configuration data stream, this configuration data flow through ICAP interface and the interface controller that dynamic reconstructs be configured to the interface controller corresponding with outside controlled device; If what reconfigurable controller was sent here is outside controlled device steering order, then this steering order is issued the interface controller of dynamic reconstruct;
The measurement data that the outside controlled device that the interface controller that reconstruct configuration interface receives dynamic reconstruct sends is sent here, is sent to reconfigurable controller after this measurement data is carried out format conversion according to PCIe agreement;
The interface controller of dynamic reconstruct is by an interface driving circuit in two or more multiple interfaces driving circuit, convert outside controlled device steering order to steering order differential signal and be sent to analog switch matrix, analog switch matrix is under the control of switch matrix control signal, the driving circuit that conducting is corresponding with outside controlled device, is sent to outside controlled device by differential signal;
The measurement data differential signal that outside controlled device gathers by outside controlled device delivers to an interface driving circuit in multiple interfaces driving circuit by analog switch matrix, the measurement data differential signal that outside controlled device gathers by this interface driving circuit converts the interface controller that measurement data that outside controlled device sends here delivers to dynamic reconstruct to;
Interface type identification module is from outside controlled device receiving interface type identification signal, and interface type identification signal, by interface type identification signal level value, is changed into equipment interface information and delivers to reconfigurable controller by interface type identification module.
It is as follows that collocation method based on the varistructure intelligent interface of dynamic reconfigurable FPGA comprises step:
(1) FPGA interface type identification module receives the interface type identification signal of outside controlled device;
(2) according to connection status and the physical interface type of the outside controlled device of the level value identification of step (1) interface type identification signal; Carry out step (3) and step (5) after outside controlled device is identified simultaneously
(3) the equipment interface information of outside controlled device is passed to reconfigurable controller by FPGA interface type identification module, reconfigurable controller, according to the equipment interface information of outside controlled device, is found out from restructural resources bank and reads the interface controller IP kernel corresponding with equipment interface information; The interface controller IP kernel corresponding with equipment interface information is delivered to the reconstruct configuration interface of dynamic reconfigurable FPGA by reconfigurable controller by PCIe bus;
(4) the interface controller IP kernel corresponding with equipment interface information of step (3) is carried out format conversion become ICAP interface can configuration data stream, this configuration data flow through ICAP interface and the interface controller that dynamic reconstructs be configured to the interface controller corresponding with outside controlled device, this interface controller driving circuit corresponding with outside controlled device connects;
(5) reconfigurable controller produces switch matrix control signal, is controlled, be connected by outside controlled device with the driving circuit corresponding with this outside controlled device in multiple interfaces driving circuit by this signal to analog switch matrix;
(6), after step (4) and step (5) terminate, this configuration based on the varistructure intelligent interface of dynamic reconfigurable FPGA is completed.
Described multiple interfaces driving circuit is universal serial bus driving circuit, comprises CAN driving circuit, RS422 driving circuit, RS232 driving circuit, RS485 driving circuit and 1553B driving circuit.
The present invention compared with prior art beneficial effect is:
(1) the present invention achieves the compatibility of multiple interfaces by the technical scheme that dynamic reconfigurable FPGA and analog switch matrix combine, and makes to support that the outside controlled device of different bus can be connected on main control equipment easily.
(2) the present invention is in docking port type recognition procedure, utilizes interface type identification signal level value, automatically detects interface type, complete interface and reshuffle, and without the need to artificial participation, has extremely strong independence.
(3) the present invention is by the Partial Reconfiguration of dynamic reconfigurable FPGA, and what make certain interface reshuffles the normal work not affecting other interfaces.
Accompanying drawing explanation
Fig. 1 is that the present invention forms structural representation;
Fig. 2 is interface configuration flow process schematic diagram of the present invention.
Embodiment
Basic ideas of the present invention: the present invention proposes a kind of configurable intelligent interface based on dynamic reconfigurable FPGA and collocation method thereof, realize the compatibility of main control equipment interface to multibus type by the autonomous switching of circuit, auxiliary main control equipment completes and detects the plug of outside controlled device simultaneously.
Just in conjunction with the drawings and the specific embodiments the present invention is described further below.
As shown in Figure 1, the varistructure intelligent interface based on dynamic reconfigurable FPGA comprises dynamic reconfigurable unit, two or more multiple interfaces driving circuit and analog switch matrix; Dynamic reconfigurable unit comprises reconfigurable controller, dynamic reconfigurable FPGA and restructural resources bank; Dynamic reconfigurable FPGA comprises interface type identification module, the interface controller of dynamic reconstruct, reconstruct configuration interface, inner configuration access interface ICAP;
Restructural resources bank, stores multiple interfaces controller IP kernel;
Reconfigurable controller, according to the equipment interface information that interface type identification module is sent here, finds out from restructural resources bank and reads the interface controller IP kernel corresponding with equipment interface information; The interface controller IP kernel corresponding with equipment interface information is delivered to the reconstruct configuration interface of dynamic reconfigurable FPGA by reconfigurable controller by PCIe bus, reconfigurable controller produces switch matrix control signal and delivers to analog switch matrix simultaneously;
The interface controller IP kernel corresponding with equipment interface information that reconstruct configuration interface is sent here reconfigurable controller and outside controlled device steering order judge, if reconfigurable controller sends here is the interface controller IP kernel corresponding with equipment interface information, then this IP kernel is carried out format conversion become ICAP interface can configuration data stream, this configuration data flow through ICAP interface and the interface controller that dynamic reconstructs be configured to the interface controller corresponding with outside controlled device; If what reconfigurable controller was sent here is outside controlled device steering order, then this steering order is issued the interface controller of dynamic reconstruct;
The measurement data that the outside controlled device that the interface controller that reconstruct configuration interface receives dynamic reconstruct sends is sent here, is sent to reconfigurable controller after this measurement data is carried out format conversion according to PCIe agreement;
The interface controller of dynamic reconstruct is by an interface driving circuit in two or more multiple interfaces driving circuit, convert outside controlled device steering order to steering order differential signal and be sent to analog switch matrix, analog switch matrix is under the control of switch matrix control signal, the driving circuit that conducting is corresponding with outside controlled device, is sent to outside controlled device by differential signal;
The measurement data differential signal that outside controlled device gathers by outside controlled device delivers to an interface driving circuit in multiple interfaces driving circuit by analog switch matrix, the measurement data differential signal that outside controlled device gathers by this interface driving circuit converts the interface controller that measurement data that outside controlled device sends here delivers to dynamic reconstruct to.
Interface type identification module is from outside controlled device receiving interface type identification signal, and interface type identification signal, by interface type identification signal level value, is changed into equipment interface information and delivers to reconfigurable controller by interface type identification module;
In the present embodiment, dynamic reconfigurable FPGA selects Xilinx company virtex5 family chip XC5VLX50T, reconfigurable controller selects the arm processor with PCIe interface, driving circuit comprises 1 road CAN interface driving circuit, 1 road RS422 interface driving circuit, realizes the switching to CAN and RS422 interface.
As shown in Figure 2, a kind of collocation method of the varistructure intelligent interface based on dynamic reconfigurable FPGA is implemented as follows:
(1) for realizing interface type identification, increase by 2 root interface type identification signal lines, called after: ID_0, ID_1, ID_0 and ID_1 two signal wires are connected to FPGA interface type identification module.
The unified DB-9 connector that uses of outside controlled device is connected with opertaing device by varistructure intelligent interface of the present invention.Usually, RS422 interface needs 5 signal wires, respectively: TX+, TX-, RX+, RX-, GND; CAN interface needs 3 signal wires, respectively: CAN_H, CAN_L, GND; Unified for realizing physics connector, physics connector pin assignments is as shown in table 1.
Table 1 interface physical connector pin assignments
| Number of pins | Connection signal line |
| 1 | GND (multiplexing) |
| 2 | TX+ |
| 3 | RX+ |
| 4 | CAN_H |
| 5 | ID_0 |
| 6 | TX- |
| 7 | RX- |
| 8 | CAN_L |
| 9 | ID_1 |
(2) interface type identification module passes through connection status and the physical interface type of the outside controlled device of level value identification of interface type identification signal;
When varistructure intelligent interface connects without outside controlled device, interface type identification line level acquiescence is drop-down is " 00 "; The interface type identification signal line level value of the outside controlled device of regulation RS422 interface is " 01 ", and the interface type identification signal line level value of the outside controlled device of CAN interface is " 10 ".Like this, if there is the outside controlled device access of RS422 interface, interface type identification line level is set to " 01 "; If there is the outside controlled device access of CAN interface, interface type identification line level is set to " 10 ".
Interface type identification module in varistructure intelligent interface FPGA, by the level change on interface type identification line, completes outside controlled device and accesses/pull out detection and the judgement of outside controlled device interface type.Be specially:
00 → 01: connect RS422 equipment
01 → 00: remove RS422 equipment
00 → 10: connect CAN equipment
10 → 00: remove CAN equipment
(3) such as outside for RS422 interface controlled device is connected on varistructure intelligent interface, interface type identification module detects that interface type identification line level value is become " 01 " from " 00 ", specification interface is connected to the outside controlled device of RS422, equipment interface information is passed to reconfigurable controller ARM by interface type identification module, ARM learns and interface has accessed the outside controlled device of RS422, then in restructural resources bank FLASH chip, corresponding configuration data are read according to the memory address of RS422 interface controller IP kernel, and by PCIe interface, RS422 interface controller IP kernel configuration data is sent to the reconstruct configuration interface of dynamic reconfigurable FPGA.
(4) reconstruct configuration interface and receive RS422 interface controller IP kernel configuration data, and it is resolved, discovery is FPGA configuration data, then after carrying out format conversion to it, be sent to ICAP interface, the interface controller that dynamic reconstructs is configured to RS422 interface controller;
(5) reconfigurable controller ARM produces switch matrix control signal, make the TX of RS422 driving circuit ±, RX ± signal is connected with 2,6,3,7 pins of interface.
(6) so far, complete the configuration of the varistructure intelligent interface based on dynamic reconfigurable FPGA, form the data path between ARM-FPGA interface controller-driving circuit-outside controlled device.
If need the outside controlled device changing CAN interface, then interface type identification line level value is become " 10 " from " 00 ", specification interface is connected to the outside controlled device of CAN interface, equipment interface information is passed to reconfigurable controller ARM by interface type identification module, ARM reads corresponding configuration data according to the memory address of CAN interface controller IP kernel in restructural resources bank FLASH chip, and by PCIe interface, CAN interface controller IP kernel configuration data is sent to dynamic reconfigurable FPGA, the interface controller that dynamic reconstructs is configured to RS422 interface controller; Meanwhile, produce switch matrix control signal, CAN_H, CAN_L signal of CAN driving circuit is connected with 4,8 pins of interface.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.
Claims (4)
1. based on the varistructure intelligent interface of dynamic reconfigurable FPGA, it is characterized in that: comprise dynamic reconfigurable unit, two or more multiple interfaces driving circuit and analog switch matrix; Described dynamic reconfigurable unit comprises reconfigurable controller, dynamic reconfigurable FPGA and restructural resources bank; Dynamic reconfigurable FPGA comprises interface type identification module, the interface controller of dynamic reconstruct, reconstruct configuration interface, inner configuration access interface ICAP;
Restructural resources bank, stores multiple interfaces controller IP kernel;
Reconfigurable controller, according to the equipment interface information that interface type identification module is sent here, finds out from restructural resources bank and reads the interface controller IP kernel corresponding with equipment interface information; The interface controller IP kernel corresponding with equipment interface information is delivered to the reconstruct configuration interface of dynamic reconfigurable FPGA by reconfigurable controller by expanding peripherals component interconnection STD bus PCIe, reconfigurable controller produces switch matrix control signal and delivers to analog switch matrix simultaneously;
The interface controller IP kernel corresponding with equipment interface information that reconstruct configuration interface is sent here reconfigurable controller and outside controlled device steering order judge, if reconfigurable controller sends here is the interface controller IP kernel corresponding with equipment interface information, then this IP kernel is carried out format conversion become ICAP interface can configuration data stream, this configuration data flow through ICAP interface and the interface controller that dynamic reconstructs be configured to the interface controller corresponding with outside controlled device; If what reconfigurable controller was sent here is outside controlled device steering order, then this steering order is issued the interface controller of dynamic reconstruct;
The measurement data that the outside controlled device that the interface controller that reconstruct configuration interface receives dynamic reconstruct sends is sent here, is sent to reconfigurable controller after this measurement data is carried out format conversion according to PCIe agreement;
The interface controller of dynamic reconstruct is by an interface driving circuit in two or more multiple interfaces driving circuit, convert outside controlled device steering order to steering order differential signal and be sent to analog switch matrix, analog switch matrix is under the control of switch matrix control signal, the driving circuit that conducting is corresponding with outside controlled device, is sent to outside controlled device by differential signal;
The measurement data differential signal that outside controlled device gathers by outside controlled device delivers to an interface driving circuit in multiple interfaces driving circuit by analog switch matrix, the measurement data differential signal that outside controlled device gathers by this interface driving circuit converts the interface controller that measurement data that outside controlled device sends here delivers to dynamic reconstruct to;
Interface type identification module is from outside controlled device receiving interface type identification signal, and interface type identification signal, by interface type identification signal level value, is changed into equipment interface information and delivers to reconfigurable controller by interface type identification module.
2., based on the collocation method of the varistructure intelligent interface of dynamic reconfigurable FPGA, it is characterized in that comprising step as follows:
(1) FPGA interface type identification module receives the interface type identification signal of outside controlled device;
(2) according to connection status and the physical interface type of the outside controlled device of the level value identification of step (1) interface type identification signal; Carry out step (3) and step (5) after outside controlled device is identified simultaneously;
(3) the equipment interface information of outside controlled device is passed to reconfigurable controller by FPGA interface type identification module, reconfigurable controller, according to the equipment interface information of outside controlled device, is found out from restructural resources bank and reads the interface controller IP kernel corresponding with equipment interface information; The interface controller IP kernel corresponding with equipment interface information is delivered to the reconstruct configuration interface of dynamic reconfigurable FPGA by reconfigurable controller by PCIe bus;
(4) the interface controller IP kernel corresponding with equipment interface information of step (3) is carried out format conversion become ICAP interface can configuration data stream, this configuration data flow through ICAP interface and the interface controller that dynamic reconstructs be configured to the interface controller corresponding with outside controlled device, this interface controller driving circuit corresponding with outside controlled device connects;
(5) reconfigurable controller produces switch matrix control signal, is controlled, be connected by outside controlled device with the driving circuit corresponding with this outside controlled device in multiple interfaces driving circuit by this signal to analog switch matrix;
(6), after step (4) and step (5) terminate, this configuration based on the varistructure intelligent interface of dynamic reconfigurable FPGA is completed.
3. the varistructure intelligent interface based on dynamic reconfigurable FPGA according to claim 1, it is characterized in that: described multiple interfaces driving circuit is universal serial bus driving circuit, comprise CAN driving circuit, RS422 driving circuit, RS232 driving circuit, RS485 driving circuit and 1553B driving circuit.
4. the collocation method of the varistructure intelligent interface based on dynamic reconfigurable FPGA according to claim 2, it is characterized in that: described multiple interfaces driving circuit is universal serial bus driving circuit, comprise CAN driving circuit, RS422 driving circuit, RS232 driving circuit, RS485 driving circuit and 1553B driving circuit.
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| WO2022052161A1 (en) * | 2020-09-09 | 2022-03-17 | 国微集团(深圳)有限公司 | Chip debugging system and debugger |
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| CN113138779B (en) * | 2021-04-21 | 2024-03-15 | 中科亿海微电子科技（苏州）有限公司 | FPGA (field programmable Gate array) online program updating device and method based on multifunctional interface |
| CN113391589A (en) * | 2021-06-29 | 2021-09-14 | 西北工业大学 | Unified access and protocol conversion integrated circuit board for heterogeneous equipment of unmanned aerial vehicle |
| CN113391589B (en) * | 2021-06-29 | 2022-12-27 | 西北工业大学 | Unified access and protocol conversion integrated circuit board for heterogeneous equipment of unmanned aerial vehicle |
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