CN111897762B - Terminal equipment, line connection method and device and storage medium - Google Patents
Terminal equipment, line connection method and device and storage medium Download PDFInfo
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- CN111897762B CN111897762B CN202010784640.1A CN202010784640A CN111897762B CN 111897762 B CN111897762 B CN 111897762B CN 202010784640 A CN202010784640 A CN 202010784640A CN 111897762 B CN111897762 B CN 111897762B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Abstract
The application discloses a terminal device, a line connection method and device and a computer readable storage medium, wherein the terminal device comprises a main control chip and an analog switch module, and the analog switch module at least comprises an analog switch matrix; the main control chip is connected with the analog switch module through a signal wire and sends a control signal to the analog switch module through the signal wire, and the control signal is used for controlling the on-off state of at least one analog switch in the analog switch module; the main control chip of the terminal equipment is connected with the column pins of the analog switch module, and the row pins of the analog switch module are connected with the PCIE interface of the terminal equipment. The application provides a terminal equipment, wherein set up analog switch module, control signal is arranged in controlling analog switch's in the analog switch module state, has realized the custom of signal pin and has matchd between terminal equipment.
Description
Technical Field
The present application relates to the field of computer technologies, and in particular, to a terminal device, a line connection method and apparatus, and a computer-readable storage medium.
Background
The Mini-PCIE interface is an interface based on a PCIE (peripheral component interconnect express, a high-speed serial computer expansion bus standard) bus, and is mainly used for a notebook and a digital device. In the related art, the Mini-PCIE interface is designed to be fixed, each signal pin is connected to a specific signal interface of the main control chip through a PCB trace, and software cannot be changed. As shown in fig. 1 and 2, the MCU of the board module is connected to the MPU of the host through a Mini-PCIE interface. In the current market products with Mini-PCIE interfaces, each family uses different standards to design the interfaces, and for a host, only board card modules which are completely matched with signal pin definitions in the market can be supported; for the board card module, the customer must consider whether the pin definitions of the host are compatible when choosing. This brings the compatibility problem for using each family's integrated circuit board module, leads to a lot of integrated circuit board modules to use, and the product is difficult to promote. In addition, after the board card modules on the market are upgraded, the pin definitions cannot be continuously compatible after being changed. The use of the board card modules on the market is very limited, and the board card modules matched with the definition of the signal pins of the host can be screened out to be used with a great deal of effort.
Therefore, how to implement the custom matching of the signal pins of the host and the board card module is a technical problem to be solved by those skilled in the art.
Disclosure of Invention
The application aims to provide a terminal device, a line connection method and device and a computer readable storage medium, and the user-defined matching of signal pins between the terminal devices is realized.
In order to achieve the above object, the present application provides a terminal device, including a main control chip and an analog switch module, where the analog switch module includes at least one analog switch matrix;
the main control chip is connected with the analog switch module through a signal wire and sends a control signal to the analog switch module through the signal wire, wherein the control signal is used for controlling the on-off state of at least one analog switch in the analog switch module;
and the main control chip of the terminal equipment is connected with the column pins of the analog switch module, and the row pins of the analog switch module are connected with the PCIE interface of the terminal equipment.
In order to achieve the above object, the present application provides a line connection method, which is applied to a first device, where the first device is the above terminal device, and the method includes:
acquiring a signal pin definition of second equipment, and determining a signal connection path based on the signal pin definition of the second equipment and the signal pin definition of the second equipment; the second device is the terminal device;
determining the states of all analog switches in the analog switch module according to the signal connection path, and generating a control signal;
and sending the control signal to the analog switch module through a signal line so as to configure the state of an analog switch in the analog switch module.
In order to achieve the above object, the present application provides a line connection apparatus, which is applied to a first device, where the first device is a terminal device as described above, and the apparatus includes:
the determining module is used for acquiring the signal pin definition of the second equipment and determining a signal connection path based on the signal pin definition of the determining module and the signal pin definition of the second equipment; the second device is the terminal device;
the generation module is used for determining the states of all analog switches in the analog switch module according to the signal connection path and generating a control signal;
and the sending module is used for sending the control signal to the analog switch module through a signal line so as to configure the state of an analog switch in the analog switch module.
To achieve the above object, the present application provides a computer-readable storage medium, on which a computer program is stored, and the computer program realizes the steps of the above line connection method when executed by a main control chip.
According to the scheme, the terminal equipment comprises a main control chip and an analog switch module, wherein the analog switch module at least comprises an analog switch matrix; the main control chip is connected with the analog switch module through a signal wire, and sends a control signal to the analog switch module through the signal wire, wherein the control signal is used for controlling the on-off state of at least one analog switch in the analog switch module; the main control chip of the terminal equipment is connected with the column pins of the analog switch module, and the row pins of the analog switch module are connected with the PCIE interface of the terminal equipment.
The terminal device provided by the application is provided with the analog switch module, the analog switch module comprises one or more analog switch matrixes, row pins and column pins in the analog switch matrixes are vertically crossed, each cross point is an analog switch, and any row pin can be connected to any column pin. The column pins of the analog switch module are connected with the main control chip of the terminal equipment, the row pins are connected with the PCIE interface, and other equipment can be connected through the PCIE interface, namely the analog switch module can realize that any pin of the main control chip of the terminal equipment is connected with any pin of the main control chip of other equipment, and the control signal is used for controlling the state of the analog switch in the analog switch module, so that the custom matching of signal pins among the terminal equipment is realized. The application also discloses a line connection method, a line connection device and a computer readable storage medium, which can also achieve the technical effects.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts. The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure, but do not constitute a limitation of the disclosure. In the drawings:
fig. 1 is a structural diagram of a PCIE system provided in the related art;
fig. 2 is a structural view of a card module provided in the related art;
FIG. 3 is a block diagram of a terminal device according to an exemplary embodiment;
FIG. 4 is a schematic diagram illustrating a 4 × 4 analog switch matrix in accordance with an exemplary embodiment;
FIG. 5 is an equivalent circuit diagram of the analog switch matrix of FIG. 4;
FIG. 6 is a circuit diagram showing the connection of X1 and Y2 in FIG. 4 in the ON state;
FIG. 7 is a schematic diagram of an 8 × 8 analog switch module in accordance with an exemplary embodiment;
FIG. 8 is an equivalent circuit diagram of the analog switch module of FIG. 7;
fig. 9 is a block diagram of a PCIE system shown in accordance with an exemplary embodiment;
FIG. 10 is a block diagram of a card module according to an exemplary embodiment;
FIG. 11 is a schematic diagram illustrating a 16 × 16 analog switch matrix in accordance with an exemplary embodiment;
FIG. 12 is a diagram illustrating circuit connections within a terminal device in accordance with an exemplary embodiment;
FIG. 13 is a diagram illustrating circuit connections within another terminal device in accordance with an illustrative embodiment;
FIG. 14 is a schematic diagram of an 8 × 16 analog switch matrix in accordance with an exemplary embodiment;
FIG. 15 is a diagram illustrating circuit connections within yet another terminal device in accordance with an illustrative embodiment;
FIG. 16 is a flow chart illustrating a method of line connection in accordance with an exemplary embodiment;
fig. 17 is an equivalent circuit diagram in a host according to an embodiment of the present application;
FIG. 18 is a diagram illustrating an equivalent circuit in a host configured according to an embodiment of the present application;
FIG. 19 is a block diagram illustrating a wire connecting device in accordance with an exemplary embodiment;
fig. 20 is a block diagram illustrating another terminal device according to an example embodiment.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application discloses a terminal device, as shown in fig. 3, including a main control chip 100 and an analog switch module 200, where the analog switch module 200 includes at least one analog switch matrix;
the main control chip 100 is connected to the analog switch module 200 through a signal line 11, and sends a control signal to the analog switch module 200 through the signal line 11, where the control signal is used to control the on-off state of at least one analog switch in the analog switch module 200;
the main control chip 100 of the terminal device is connected to the column pins of the analog switch module 200, and the row pins of the analog switch module 200 are connected to the PCIE interface of the terminal device 100.
In a specific implementation, an analog switch module is arranged in the terminal device, wherein the analog switch module includes one or more analog switch matrixes, the analog switch matrix is a special analog switch device, also called a cross analog switch, and includes a plurality of analog switch pins, which can be divided into row pins and column pins, the row pins and the column pins are perpendicularly crossed, and each cross point is an analog switch. The analog switch mainly completes the signal switching function in the signal link, adopts the analog switch mode of the MOS tube to realize the turn-off or turn-on of the signal link, and is called as the analog switch because the function is similar to the switch and the characteristic of the analog device is adopted. That is, the analog switch matrix may implement any row pin connected to any column pin therein. For example, fig. 4 is a 4 × 4 analog switch matrix, an internal equivalent circuit diagram of the analog switch matrix is shown in fig. 5, each dot is equivalent to a switch, there are 16 configurable switches in total, for example, dots connected by X1 and Y2 are equivalent to a single-pole single-throw switch, and the switch can be controlled to be turned on and off through software configuration, that is, a control signal is sent to the analog switch module through the main control chip to control the switch to be turned on or off. By controlling each switch, connection of X1-X4 to any one of Y1-Y4 pins can be achieved. When it is necessary to connect X1 and Y2, as shown in fig. 6, the connection switches of X1 and Y2 are configured to be turned on, i.e., the connection of X1 and Y2 is completed. It will be appreciated that the analog switch matrix may be expanded by splicing to form an analog switch module. The analog switch module at least comprises one analog switch matrix in each row, at least comprises one analog switch matrix in each column, row pins of adjacent analog switch matrices in each row are correspondingly connected, the sum of the number of column pins of all analog switch matrices in each row is equal to the number of pins of a main control chip of the terminal equipment, column pins of adjacent analog switch matrices in each column are correspondingly connected, and the sum of the number of row pins of all analog switch matrices in each column is equal to the number of pins of a PCIE interface of the terminal equipment. For example, a 4-slice 4 × 4 analog switch matrix is used: u1, U2, U3, and U4, as shown in fig. 7, the row pins of U1 and U2 are correspondingly connected, the row pins of U3 and U4 are correspondingly connected, the column pins of U1 and U3 are correspondingly connected, and the column pins of U2 and U4 are correspondingly connected, so as to form an 8 × 8 analog switch module, whose internal equivalent circuit diagram is shown in fig. 8.
The main control chip of the terminal equipment is connected with the column pins of the analog switch module, the row pins of the analog switch module are connected with the PCIE interfaces of the terminal equipment, and the PCIE interfaces of the terminal equipment are connected with the PCIE interfaces of other terminal equipment through a data line, so that the row pins of the analog switch module in the terminal equipment are connected with the main control chips of other equipment, and the main control chip of the terminal equipment is connected with the main control chips of other equipment. The PCIE interface here may be a Mini-PCIE interface. Because the state of each switch in the analog switch module can be configured through the control signal, any pin of the main control chip of the terminal equipment can be connected with any pin of the main control chip of other equipment, namely the self-defined connection of the pins between the terminal equipment is realized.
As a possible implementation, the terminal device includes a host or a board. It should be noted that the analog switch module may be disposed in the host, may also be disposed in the board module, or both may be disposed with the analog switch module. If the analog switch module is disposed in the host, as shown in fig. 9, the main control chip of the host is connected to the analog switch module through a signal line, and the main control chip can send a control signal to the analog switch module through the signal line to control the state of the analog switch in the analog switch module, so that any row pin is connected to any column pin, and the signal line here includes an I2C signal line or an SPI signal line. The column pins of the analog switch module are connected with the signal pins of the main control chip of the host, the row pins of the analog switch module are correspondingly connected with the signal pins of the PCIE interface of the host, namely, the signal pins of the main control chip of the host are indirectly connected with the PCIE interface through the analog switch module, and the main control chip of the host is directly connected with the power pins of the PCIE interface of the host.
If the analog switch module is disposed in the board module, as shown in fig. 10, the main control chip of the board module is connected to the analog switch module through a signal line, and the main control chip can send a control signal to the analog switch module through the signal line to control a state of an analog switch in the analog switch module, so that any row pin is connected to any column pin, where the signal line includes an I2C (Inter-Integrated Circuit) signal line or an SPI (Serial Peripheral Interface) signal line. The row pins of the analog switch module are connected with the signal pins of the main control chip of the board card module, the column pins of the analog switch module are correspondingly connected with the signal pins of the PCIE interface of the board card module, namely, the signal pins of the main control chip of the board card module are indirectly connected with the PCIE interface through the analog switch module, and the main control chip of the board card module is directly connected with the power supply pins of the PCIE interface of the host.
It can be understood that the specification and the model of the analog switch matrix in the analog switch module can be set according to the number of the signal pins of the host and the board card module. For example, the main control chips of the host and the board card module each include 32 signal pins, the analog switch module may be disposed in the host, and includes a first analog switch matrix (U1), a second analog switch matrix (U2), a third analog switch matrix (U3), and a fourth analog switch matrix (U4), which are all 16 × 16 analog switch matrices as shown in fig. 11, as shown in fig. 12, the column pins of the analog switch module are connected to a main control chip (MPU, microprocessor Unit, microprocessor) of the host, and the row pins are connected to a Mini-PCIE interface of the host. And the MPU is connected with the analog switch module through an I2C signal line or an SPI signal line and used for sending a control signal to the analog switch module so as to control the state of an analog switch in the analog switch module.
If the main control chip of the host includes 16 signal pins and the main control chip of the board module includes 32 signal pins, as shown in fig. 13, the analog switch module includes two 16 × 16 analog switch matrixes, and the column pins thereof are connected correspondingly. If the main control chip of the host includes 8 signal pins and the main control chips of the board modules include 32 signal pins, the analog switch module includes two 8 × 16 analog switch matrixes as shown in fig. 14, and as shown in fig. 15, the column pins of the analog switch matrixes are correspondingly connected.
The terminal device provided by the embodiment of the application is provided with the analog switch module, the analog switch module comprises one or more analog switch matrixes, row pins and column pins in the analog switch matrixes are vertically crossed, each cross point is an analog switch, and any row pin can be connected to any column pin. The column pins of the analog switch module are connected with the main control chip of the terminal equipment, the row pins are connected with the PCIE interface, other equipment can be connected through the PCIE, namely, any pin of the main control chip of the terminal equipment can be connected with any pin of the main control chips of other equipment by the analog switch module, the control signal is used for controlling the state of the analog switch in the analog switch module, and the self-defined matching of signal pins among the terminal equipment is realized.
The embodiment of the application discloses a line connection method, which realizes the custom matching of signal pins between terminal devices.
Referring to fig. 16, a flowchart illustrating a method of connecting lines according to an exemplary embodiment, as shown in fig. 16, includes:
s101: acquiring a signal pin definition of second equipment, and determining a signal connection path based on the signal pin definition of the second equipment and the signal pin definition of the second equipment;
the execution main body of the embodiment is the first device, and the purpose is to realize the customized matching of the signal pins between the first device and the second device, the first device and the second device are both the terminal devices, and the analog switch module is arranged in the first device. In specific implementation, the first device determines a signal connection path based on the definition of the first device and the signal pin of the second device, where one signal connection path includes a first signal pin in the first device and a second signal pin of the second device, and the first signal pin needs to be connected with the second signal pin.
S102: determining the states of all analog switches in the analog switch module according to the signal connection path, and generating a control signal;
in this step, a column pin connected to the first signal pin and a row pin connected to the second signal pin in the analog switch module are determined, the analog switch at an intersection of the column pin and the row pin in the analog switch module is in a conducting state, and the other analog switches are in a disconnecting state. A control signal is generated based on the state of each analog switch.
S103: and sending the control signal to the analog switch module through a signal line so as to configure the state of an analog switch in the analog switch module.
In a specific implementation, the main control chip of the first device is connected to the analog switch module through a signal line, and the main control chip sends a control signal to the analog switch module through the signal line, so as to configure the analog switch in the analog switch module in a corresponding state.
As a preferred embodiment, if the default states of all analog switches in the analog switch module are off states, the determining the states of all analog switches in the analog switch module according to the signal connection path and generating the control signal includes: determining a target analog switch needing to be configured in the analog switch module according to the signal connection path, and generating a control signal; correspondingly, the sending the control signal to the analog switch module through a signal line so as to configure the state of an analog switch in the analog switch module includes: and sending the control signal to the analog switch module through a signal line so as to configure the target analog switch in the analog switch module to be in a conducting state. In specific implementation, the default states of all analog switches of the analog switch module can be off states, and only the analog switches needing to be turned on need to be determined according to the signal connection paths.
According to the line connection method, the state of the analog switch in the analog switch module can be controlled through the control signal, and the customized matching of signal pins among terminal equipment is achieved.
An application embodiment provided by the present application is described below, specifically, the analog switch module may be disposed in the host, and includes four 16 × 16 analog switch matrices U1, U2, U3, and U4, where a column pin of the analog switch module is connected to an MPU of the host, a row pin of the analog switch module is connected to a Mini-PCIE interface of the host, and an equivalent circuit diagram is shown in fig. 17. The analog switch module comprises 1024 analog switches, and arbitrary connection of 32 row pins and 32 column pins can be realized by controlling the analog switches.
Determining signal connection paths to be X1-Y5, X3-Y8 and X12-Y4 based on the signal pin definition of the host and the signal pin definition of the board card module, and determining that an analog switch needing to be configured in the analog switch module is as follows: and (3) configuring all the switches to be in a conducting state by the analog switch at the cross point of X1 and Y5, the analog switch at the cross point of X3 and Y8, and the analog switch at the cross point of X12 and Y4, and configuring all the other analog switches to be in a disconnecting state, namely completing the custom connection of the row pin and the column pin. As shown in fig. 18, the black filled dots in the figure indicate switches in the on state, and the unfilled dots indicate switches in the off state.
In the following, a circuit connecting device provided by an embodiment of the present application is introduced, and a circuit connecting device described below and a circuit connecting method described above may be referred to each other.
Referring to fig. 19, a block diagram of a wire connecting device according to an exemplary embodiment is shown, as shown in fig. 19, including:
a determining module 1901, configured to obtain a signal pin definition of a second device, and determine a signal connection path based on the signal pin definition of the second device and the signal pin definition of the second device;
a generating module 1902, configured to determine states of all analog switches in the analog switch module according to the signal connection path, and generate a control signal;
a sending module 1903, configured to send the control signal to the analog switch module through a signal line, so as to configure the state of an analog switch in the analog switch module.
On the basis of the foregoing embodiment, as a preferred implementation manner, if the default states of all analog switches of the analog switch module are off states, the generating module 1902 is a module that determines a target analog switch that needs to be configured in the analog switch module according to the signal connection path and generates a control signal; correspondingly, the sending module 1903 is a module that sends the control signal to the analog switch module through a signal line so as to configure the target analog switch in the analog switch module to be in a conducting state.
The circuit connecting device provided by the application can control the state of the analog switch in the analog switch module through the control signal, and realizes the custom matching of the signal pins of the host and the board card module.
With regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.
Referring to fig. 20, a structure diagram of a terminal device according to an embodiment of the present disclosure, as shown in fig. 20, may include a main control chip 11, a memory 12, and an analog switch module 13. The terminal device may also include one or more of a multimedia component 14, an input/output (I/O) interface 15, and a communication component 16.
The main control chip 11 is configured to control the overall operation of the terminal device, so as to complete all or part of the steps in the above-mentioned line connection method. The memory 12 is used to store various types of data to support operation at the terminal device, and these data may include, for example, instructions for any application or method operating on the terminal device, as well as application-related data. The Memory 12 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as Static Random Access Memory (SRAM), electrically Erasable Programmable Read-Only Memory (EEPROM), erasable Programmable Read-Only Memory (EPROM), programmable Read-Only Memory (PROM), read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk or optical disk. The multimedia component 14 may include a screen and an audio component. Wherein the screen may be, for example, a touch screen and the audio component is used for outputting and/or inputting audio signals. For example, the audio component may include a microphone for receiving an external audio signal. The received audio signals may further be stored in the memory 12 or transmitted through the communication component 16. The audio assembly further comprises at least one speaker for outputting audio signals. The I/O interface 15 provides an interface between the main control chip 11 and other interface modules, such as a keyboard, a mouse, buttons, and the like. These buttons may be virtual buttons or physical buttons. The communication component 16 is used for wired or wireless communication between the terminal device and other devices. For wired Communication, the Communication component 16 includes a PCIE interface, and for wireless Communication, such as Wi-Fi, bluetooth, near Field Communication (NFC), 2G, 3G, or 4G, or a combination of one or more of them, so the corresponding Communication component 16 may include: wi-Fi module, bluetooth module, NFC module.
In an exemplary embodiment, the terminal Device may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing the above-described wire connection method.
In another exemplary embodiment, there is also provided a computer readable storage medium including program instructions, which when executed by the main control chip, implement the steps of the above-described line connection method. For example, the computer readable storage medium may be the memory 12 including the program instructions, which are executable by the main control chip 11 of the terminal device to perform the line connection method.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
Claims (13)
1. The terminal equipment is characterized by comprising a main control chip and an analog switch module, wherein the analog switch module at least comprises an analog switch matrix;
the main control chip is connected with the analog switch module through a signal wire and sends a control signal to the analog switch module through the signal wire, wherein the control signal is used for controlling the on-off state of at least one analog switch in the analog switch module;
the main control chip of the terminal equipment is connected with the column pins of the analog switch module, the row pins of the analog switch module are connected with the PCIE interface of the terminal equipment, the analog switch module comprises a plurality of row pins and a plurality of column pins, the number of the column pins contained in the analog switch module is consistent with that of the main control chip of the terminal equipment, and the number of the row pins contained in the analog switch module is consistent with that of the PCIE interface.
2. The terminal device according to claim 1, wherein the PCIE interface of the terminal device is connected to PCIE interfaces of other terminal devices through a data line, so that the row pins of the analog switch module in the terminal device are connected to the main control chips of the other terminal devices.
3. The terminal device of claim 1, wherein the terminal device comprises a host or board module.
4. The terminal device according to claim 3, wherein if the terminal device is the host, the main control chip of the host is connected to the analog switch module through a signal line, the column pins of the analog switch module are connected to the signal pins of the main control chip of the host, and the row pins of the analog switch module are correspondingly connected to the signal pins of the PCIE interface of the host.
5. The terminal device according to claim 3, wherein if the terminal device is the board module, the main control chip of the board module is connected to the analog switch module through a signal line, the column pins of the analog switch module are connected to the signal pins of the main control chip of the board module, and the row pins of the analog switch module are correspondingly connected to the signal pins of the PCIE interface of the board module.
6. The terminal device of claim 4 or 5, wherein the main control chip of the host is directly connected to a power pin of the PCIE interface of the host.
7. The terminal device according to claim 4 or 5, wherein the main control chip of the board module is directly connected to a power pin of a PCIE interface of the board module.
8. The terminal device according to claim 1, wherein the analog switch module at least includes one analog switch matrix per row, at least one analog switch matrix per column, row pins of adjacent analog switch matrices per row are correspondingly connected, a sum of numbers of column pins of all analog switch matrices per row is equal to a number of pins of a main control chip of the terminal device, column pins of adjacent analog switch matrices per column are correspondingly connected, and a sum of numbers of row pins of all analog switch matrices per column is equal to a number of pins of a PCIE interface of the terminal device.
9. The terminal device of claim 1, wherein the signal line comprises an I2C signal line or an SPI signal line.
10. A line connection method applied to a first device, wherein the first device is a terminal device according to any one of claims 1 to 9, the method comprising:
acquiring a signal pin definition of second equipment, and determining a signal connection path based on the signal pin definition of the second equipment and the signal pin definition of the second equipment; wherein the second device is the terminal device according to any one of claims 1 to 9;
determining the states of all analog switches in the analog switch module according to the signal connection path, and generating a control signal;
and sending the control signal to the analog switch module through a signal line so as to configure the state of an analog switch in the analog switch module.
11. The line connection method according to claim 10, wherein if the default states of all analog switches in the analog switch module are off states, the determining the states of all analog switches in the analog switch module according to the signal connection path and generating the control signal comprises:
determining a target analog switch needing to be configured in the analog switch module according to the signal connection path, and generating a control signal;
correspondingly, the sending the control signal to the analog switch module through a signal line so as to configure the state of an analog switch in the analog switch module includes:
and sending the control signal to the analog switch module through a signal line so as to configure the target analog switch in the analog switch module to be in a conducting state.
12. A line connection apparatus, applied to a first device, the first device being a terminal device according to any one of claims 1 to 9, the apparatus comprising:
the determining module is used for acquiring the signal pin definition of the second equipment and determining a signal connection path based on the signal pin definition of the determining module and the signal pin definition of the second equipment; wherein the second device is the terminal device according to any one of claims 1 to 9;
the generating module is used for determining the states of all analog switches in the analog switch module according to the signal connection path and generating a control signal;
and the sending module is used for sending the control signal to the analog switch module through a signal line so as to configure the state of an analog switch in the analog switch module.
13. A computer-readable storage medium, on which a computer program is stored, which, when executed by a main control chip, implements the steps of the line connection method according to claim 10 or 11.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010784640.1A CN111897762B (en) | 2020-08-06 | 2020-08-06 | Terminal equipment, line connection method and device and storage medium |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101763327A (en) * | 2008-12-26 | 2010-06-30 | 研华股份有限公司 | Interface card with monitoring indication and interface extended functions and computer device |
| CN104252435A (en) * | 2014-08-29 | 2014-12-31 | 北京航天自动控制研究所 | Structure-variable intelligent interface based on dynamical reconfigurable FAGA and configuration method thereof |
| CN104750526A (en) * | 2015-03-26 | 2015-07-01 | 浪潮集团有限公司 | Deign method of communication of BIOS measurement board card and host |
| CN108496158A (en) * | 2017-01-19 | 2018-09-04 | 华为技术有限公司 | Terminal, debugging system and adjustment method |
| CN108489510A (en) * | 2018-02-06 | 2018-09-04 | 北京航天控制仪器研究所 | Expandable type platform circuitry case automatization test system based on PXI buses |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9256560B2 (en) * | 2009-07-29 | 2016-02-09 | Solarflare Communications, Inc. | Controller integration |
| CN104515949B (en) * | 2014-12-26 | 2017-07-07 | 北京航天测控技术有限公司 | Universal joint adapter combination and the signal path planing method based on the combination |
| CN106201929A (en) * | 2016-07-22 | 2016-12-07 | 恒宝股份有限公司 | A kind of USB interface multiplex circuit and using method |
| CN110687327A (en) * | 2018-07-05 | 2020-01-14 | 中国科学院苏州纳米技术与纳米仿生研究所 | Probe selection system and method |
-
2020
- 2020-08-06 CN CN202010784640.1A patent/CN111897762B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101763327A (en) * | 2008-12-26 | 2010-06-30 | 研华股份有限公司 | Interface card with monitoring indication and interface extended functions and computer device |
| CN104252435A (en) * | 2014-08-29 | 2014-12-31 | 北京航天自动控制研究所 | Structure-variable intelligent interface based on dynamical reconfigurable FAGA and configuration method thereof |
| CN104750526A (en) * | 2015-03-26 | 2015-07-01 | 浪潮集团有限公司 | Deign method of communication of BIOS measurement board card and host |
| CN108496158A (en) * | 2017-01-19 | 2018-09-04 | 华为技术有限公司 | Terminal, debugging system and adjustment method |
| CN108489510A (en) * | 2018-02-06 | 2018-09-04 | 北京航天控制仪器研究所 | Expandable type platform circuitry case automatization test system based on PXI buses |
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