CN113918219A - Chip internal signal output control method, chip and electronic equipment - Google Patents
Chip internal signal output control method, chip and electronic equipment Download PDFInfo
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- CN113918219A CN113918219A CN202111147133.8A CN202111147133A CN113918219A CN 113918219 A CN113918219 A CN 113918219A CN 202111147133 A CN202111147133 A CN 202111147133A CN 113918219 A CN113918219 A CN 113918219A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
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Abstract
The application provides an output control method of an internal signal of a chip, which is used for controlling and outputting the internal signal in the chip, and the method comprises the following steps: responding to an input operation to obtain selector configuration information; controlling a subsystem selector in the chip to select a target subsystem, controlling a module selector in the chip to select a target module, and controlling a bank selector in the chip to select a target bank, according to the selector configuration information, thereby establishing a signal path from the target bank to the target module, from the target module to the target subsystem, and from the target subsystem to an output element for outputting the target bank signal through the output element. The application also provides a chip and an electronic device comprising the chip. This application can export as required arbitrary internal signal in the chip satisfies the output and the acquisition demand to chip internal signal.
Description
Technical Field
The present disclosure relates to the field of chip technologies, and in particular, to a method for controlling output of internal signals of a chip, and an electronic device.
Background
At present, electronic devices (such as smart phones, tablet computers, and the like) have penetrated into various fields and are commonly used by people. A chip such as a processor is an indispensable part of an electronic device as a brain of the electronic device. Since a large number of functional modules are integrated into a general chip, it is often necessary to monitor the operating condition of the chip or perform fault detection by acquiring signals of the functional modules. However, the signals of the current chip are difficult to be effectively acquired.
Disclosure of Invention
The embodiment of the application provides an output control method of internal signals of a chip, the chip and electronic equipment, which can control specific signals in the chip to be output according to needs, and meet the requirements for outputting and acquiring the internal signals of the chip.
In a first aspect, an embodiment of the present application provides a method for controlling output of an internal signal in a chip, where the chip includes a plurality of subsystems, each subsystem includes a plurality of modules, each module includes a plurality of groups, and the chip further includes a subsystem selector for selecting between the plurality of subsystems, a module selector for selecting between the plurality of modules, and a group selector for selecting between the plurality of groups; the method comprises the following steps: responding to an input operation to obtain selector configuration information; in accordance with the selector configuration information, control the subsystem selector to select a target subsystem, control the module selector to select a target module, and control the group selector to select a target group, thereby establishing a signal path from the target group to the target module, from the target module to the target subsystem, and from the target subsystem to an output element for outputting the target group signal through the output element.
In a second aspect, an embodiment of the present application provides a chip, where the chip includes a plurality of subsystems, each subsystem includes a plurality of modules, and each module includes a plurality of groups; wherein the chip further comprises a subsystem selector for selecting a target subsystem among the plurality of subsystems, a module selector for selecting a target module among the plurality of modules, and a group selector for selecting a target group among the plurality of groups, thereby establishing a signal path from the target group to the target module, from the target module to the target subsystem, and from the target subsystem to an output element for outputting the target group signal through the output element.
In a third aspect, an embodiment of the present application provides an electronic device, which includes a chip. The chip comprises a plurality of subsystems, each subsystem comprising a plurality of modules, each module comprising a plurality of groups; wherein the chip further comprises a subsystem selector for selecting a target subsystem among the plurality of subsystems, a module selector for selecting a target module among the plurality of modules, and a group selector for selecting a target group among the plurality of groups, thereby establishing a signal path from the target group to the target module, from the target module to the target subsystem, and from the target subsystem to an output element for outputting the target group signal through the output element.
It can be seen that in the embodiments of the present application, by establishing signal paths from the target group to the target module, from the target module to the target subsystem, and from the target subsystem to the output element, signals of the target group can be output to the output element through the signal paths, and can be output through the output element. Therefore, any internal signal in the chip can be output as required, and the output and acquisition requirements of the internal signal of the chip are met.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of an internal structure of a chip according to an embodiment of the present application.
Fig. 2 is a flowchart of an output control method of an internal signal of a chip according to an embodiment of the present application.
FIG. 3 is a schematic diagram of signal paths from a target group to a target module, from the target module to a target subsystem, and from the target subsystem to an output element in one embodiment of the present application.
Fig. 4 is a schematic diagram of an internal structure of a subsystem selector according to an embodiment of the present application.
Fig. 5 is a schematic diagram of an internal structure of a chip according to some embodiments of the present disclosure.
Fig. 6 is a block diagram of an electronic device in an embodiment of the present application.
Detailed Description
The terminology used in the description of the embodiments section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application. The terms "first," "second," "third," and "fourth," etc. in the description and claims of this application and in the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions.
The electronic device in the present application may include a Mobile phone, a tablet computer, and other handheld devices, and may also include a vehicle-mounted device, a wearable device, a computing device, or other processing devices connected to a wireless modem, and various forms of User Equipment (UE), a Mobile Station (MS), a terminal device (terminal device), and the like.
Fig. 1 is a schematic diagram of an internal structure of a chip 1 according to an embodiment of the present application. As shown in fig. 1, the chip 1 comprises a plurality of subsystems 11, each subsystem comprising a plurality of modules 12, each module comprising a plurality of groups 13. That is, the chip 1 is regarded as a large functional module system in terms of architecture, and includes a multi-layer architecture below the chip, where the first layer is a subsystem layer including a plurality of subsystems 11, the second layer is a module layer including a plurality of modules 12 included in each subsystem 11, and the third layer is a functional group layer including a plurality of groups 13 included in each module 12.
Wherein the chip 1 further comprises a subsystem selector 21, a module selector 22 and a bank selector 23. Wherein the subsystem selector 21 is adapted to select between a plurality of subsystems 11, i.e. to select one subsystem 11 between a plurality of subsystems 11. The module selector 22 is configured to select between a plurality of modules 12, i.e., the module selector 22 is configured to select one module 12 among a plurality of modules 12.
Referring to fig. 2, fig. 2 is a flowchart illustrating a method for controlling output of chip internal signals according to an embodiment of the present disclosure. The method is used for controlling the output of internal signals in a chip, and particularly, the method is used for controlling the output of internal signals in the chip 1 shown in fig. 1. As mentioned before, the chip 1 comprises a plurality of subsystems 11, each subsystem 11 comprising a plurality of modules 12, each module 12 comprising a plurality of groups 13, the chip 1 further comprising a subsystem selector 21 for selecting between the plurality of subsystems 11, a module selector 22 for selecting between the plurality of modules 12 and a group selector 23 for selecting between the plurality of groups 13. In the present application, a group may be a minimum unit of the chip, and the present application controls an internal signal of the output chip 1, and is a certain group of signals that control the output chip 1. Wherein the method comprises the following steps:
step 201: in response to an input operation, selector configuration information is obtained.
The input operation may be an input operation performed through a user interface, and the user interface may be a user interface displayed by an electronic device. The electronic device may be an electronic device including the chip 1, that is, an electronic device where the chip 1 is located, and the electronic device may also be another device other than the electronic device where the chip 1 is located. The input operation can be an input operation executed through a user interface displayed by an electronic device, and is used for inputting target information of a target group signal required to be output. For example, the target information of the target group signal may be a name or a code of the target group signal, in an embodiment, the user interface displayed by the electronic device may include a pull-down menu, where the pull-down menu includes options of all group signals included in the chip 1 for the user to select the target group signal to be output, and since each group signal is displayed by a code or by a name, the user may select the target group signal to be output as desired, and may correspondingly input the target information including the corresponding code or name. In some embodiments, the user interface displayed by the electronic device may also include an input box for the user to directly input the name or code of the target group signal to input the target information.
Wherein, the corresponding relation between the information of each group of signals and the selector configuration information is preset. The step 201 "responding to an input operation to obtain a selector configuration information" may include: and responding to the input operation, acquiring target information of a target group of signals needing to be output, and determining selector configuration information corresponding to the target information according to the corresponding relation between the information of each group of signals and the selector configuration information to obtain the selector configuration information. The correspondence between the information of each group of signals and the selector configuration information may be stored in the chip 1 in advance.
Step 202: based on the selector configuration information, the subsystem selector 21 is controlled to select a target subsystem 11, the module selector 22 is controlled to select a target module 12, and the group selector 23 is controlled to select a target group 13, thereby establishing a signal path from the target group 13 to the target module 12, from the target module 12 to the target subsystem 11, and from the target subsystem 11 to an output element for outputting the target group signal via the output element.
That is, the subsystem selector 21 is configured to select a target subsystem 11 among the plurality of subsystems 11, the module selector 22 is configured to select a target module 12 among the plurality of modules 12, and the group selector 23 is configured to select a target group 13 among the plurality of groups 13, thereby establishing a signal path from the target group 13 to the target module 12, from the target module 12 to the target subsystem 11, and from the target subsystem 11 to an output element through which the target group signal is output.
In the present application, by establishing a signal path from the target group 13 to the target module 12, from the target module 12 to the target subsystem 11, and from the target subsystem 11 to the output element 30, the signal of the target group 13 can be output to the output element 30 through the signal path, and can be output through the output element 30. Therefore, in the application, any internal signal in the chip 1 can be output as required, and the requirements for outputting and acquiring the internal signal of the chip are met.
Wherein the output element is a structure in the chip 1. As shown in fig. 1, the chip 1 further includes an output element 30, wherein the output element 30 may be a pin of the chip 1, or may be a specific register in the chip 1, and the specific register may be a pre-designed register dedicated to temporarily store internal signals in the chip 1. As shown in fig. 1, the subsystem selector 21 is specifically connected between the output element 30 and a plurality of subsystems 11, and is used for selecting one subsystem 11 to be connected to the output element 30, wherein the number of the subsystem selectors 21 may be one. The number of the module selectors 22 is plural, and the number corresponds to the number of all the subsystems 11, and each module selector 22 is connected between a corresponding subsystem 11 and a plurality of modules 12 for selecting a module 12 to be connected to the corresponding subsystem 11. The number of the group selectors 23 is plural and corresponds to the number of all the modules 12, and each group selector 23 is connected between a corresponding module 12 and a plurality of groups 13 for selecting one group 13 to be connected to the corresponding module 12.
Wherein the step 202 of controlling the subsystem selector 21 to select a target subsystem 11, the module selector 22 to select a target module 12, and the group selector 23 to select a target group 13 may include: controlling the subsystem selector 21 to select the target subsystem 11 to be connected to the output element 30, thereby establishing a connection between the target subsystem 11 and the output element 30; a module selector 22 controlling connection with the target subsystem 11 selects the target module 12 for connection to the target subsystem 11 and establishes a connection between the target module 12 and the target subsystem 11, and a group selector 23 controlling connection with the target module 12 selects the target group 13 for connection to the target module 12 and establishes a connection between the target group 13 and the target module 12.
That is, specifically, the target module 12 is a module 12 under the target subsystem 11, the target group 13 is a group 13 under the target module 12, the subsystem selector 21 is configured to select, under control, connection of the target subsystem 11 to the output element 30 to establish connection between the target subsystem 11 and the output element 30, and the module selector 22 connected to the target subsystem 11 is configured to select, under control, connection of the target module 12 to the corresponding target subsystem 11 to establish connection between the target module 12 and the target subsystem 11; a group selector 23 connected to the target module 12 is arranged to establish a connection between the target group 13 and the target module 12 under control of selecting the target group 13 to be connected to the target module 12. Thus, a signal path is established from the target set 13 to the target module 12, from the target module 12 to the target subsystem 11, and from the target subsystem 11 to an output element through which the target set signal is output.
Wherein the selector configuration information comprises subsystem selector configuration information, module selector configuration information, and group selector configuration information. The subsystem selector configuration information defines the target subsystem 11 to which the subsystem selector needs to be connected, the module selector configuration information defines the identity of the module selector 22 and the target module 12 to which the module selector 22 needs to be connected, and the group selector configuration information defines the identity of the group selector 23 and the target group 13 to which the group selector 23 needs to be connected. Since the number of the subsystem selectors 21 is one, the subsystem selector configuration information does not need to define the identity of the subsystem selector 21, and only needs to define the target subsystem 11 to which the subsystem selector 21 needs to be connected.
The step 202 "controlling the subsystem selector 21 to select a target subsystem 11, the module selector 22 to select a target module 12, and the group selector 23 to select a target group 13 according to the selector configuration information" may specifically include: controlling the subsystem selector 21 to establish a connection between a target subsystem 11 and the output element 30 according to subsystem selector configuration information in the selector configuration information, determining a target module selector 22 according to an identity of a module selector 22 defined by the module selector configuration information, controlling the target module selector 22 to establish a connection between a corresponding target module 12 and a corresponding target subsystem 11 according to a target module 12 to be connected, determining a target group selector 23 according to an identity of the group selector 23 defined by the group selector configuration information, and controlling the target group selector 23 to establish a connection between a corresponding target group 11 and a corresponding target module 12 according to a target group 13 to be connected. The target module is a module under the target subsystem, and the target group is a group under the target module. Thus, signal paths are established from the target group 13 to the target module 12, from the target module 12 to the target subsystem 11, and from the target subsystem 11 to the output elements.
The selector configuration information corresponding to each group signal may be obtained in advance according to the path where each group signal is located, that is, in advance according to the group 13 where each group signal is located, the module 12 where the group 13 is located, and the subsystem 11 where the module 12 is located. For example, for the target group signal, since the target group signal is a signal of the target group 13 under the architecture of the chip 1, and the target group 13 is located under the target module 12, and the target module is located under the target subsystem, it is the signal path from the target group 13 to the target module 12, from the target module 12 to the target subsystem 11, and from the target subsystem 11 to the output element that needs to be established. Thus, for a target group signal, the identity of the module selector 22 is the module selector 22 connected to the target subsystem 11 and the identity of the group selector 23 is the group selector 22 connected to the target module 12, so that the subsystem selector configuration information defining the target subsystem 11 to which the subsystem selector needs to be connected, the module selector configuration information defining the identity of the module selector 22 and the target module 12 to which the module selector 22 needs to be connected, and the group selector configuration information defining the identity of the group selector 23 and the target group 13 to which the group selector 23 needs to be connected are available.
Fig. 3 is a schematic diagram of signal paths from the target group 13 to the target module 12, from the target module 12 to the target subsystem 11, and from the target subsystem 11 to the output device according to an embodiment of the present application. To illustrate the signal path more clearly, fig. 3 is taken as an example for further description.
As shown in fig. 3, it is assumed that a group of signals of the target group 13, which is also labeled a, needs to be output, and the target group 13 belongs to the module 12 labeled B, so that it can be concluded that the module 12 labeled B is the target module 12 to be connected, and the group selector 23 connected to the target module 12 is the group selector 23 to be controlled. Since the target module 12 belongs to the subsystem 11 labeled C, it can be found that the subsystem 11 labeled C is the target subsystem 11 to be connected, and the module selector 22 connected to the target subsystem 11 is the module selector 22 to be controlled. Thus, the connection between the target subsystem 11 and the output element 30 is established by controlling the subsystem selector 21 to select the target subsystem 11 to be connected to the output element 30; a module selector 22 controlling the connection with the target subsystem 11 selects the target module 12 to connect to the target subsystem 11 and establish a connection between the target module 12 and the target subsystem 11, and a group selector 23 controlling the connection with the target module 12 selects the target group 13 to connect to the target module 12 and establish a connection between the target group 13 and the target module 12, resulting in a signal path from the target group 13/a to the target module 12/B, from the target module 12/B to the target subsystem 11/C, and from the target subsystem 11/C to the output element 30.
In some embodiments, the controlling the subsystem selector 21 to establish the connection between the target subsystem 11 and the output element 30 according to the subsystem selector configuration information in the selector configuration information may include: a subsystem selection instruction is sent to the subsystem selector 21, wherein the subsystem selection instruction indicates a target subsystem that needs to be connected, and the subsystem selector 21 is controlled to establish a connection between the target subsystem 11 and the output element 30. The "the target module 12 connected as needed controls the target module selector 22 to establish the connection between the corresponding target module 12 and the corresponding target subsystem 11" may include: sending a module selection instruction to the module selector 22, wherein the module selection instruction indicates a target module that needs to be connected, and controlling the module selector 22 to establish a connection between the target module 12 and the corresponding subsystem 11. The "controlling the target group selector 23 to establish a connection between the corresponding target group 11 and the corresponding target module 12 according to the target group 13 requiring connection" may include: sending a group selection instruction to the target group selector 23, wherein the group selection instruction indicates a target group to be connected, and controlling the target group selector 23 to establish a connection between the target group 13 and the corresponding module 12.
In some embodiments, the aforementioned instruction may be generated by the microcontroller 40 (shown in fig. 5) in the chip 1, or may be generated by another controller located outside the chip 1 in the electronic device including the chip 1, or may be generated by a controller in another electronic device not including the chip 1, or the like. In other embodiments, the subsystem selector configuration information, the module selector configuration information, and the group selector configuration information included in the selector configuration information are configuration control instructions, where the configuration control instructions define objects to be transmitted, such as the subsystem selector 21, the module selector 22, and the group selector 23, and then transmit the objects to the corresponding subsystem selector 21, the module selector 22, and the group selector 23, where the corresponding subsystem selector 21 is triggered to establish a connection between the target subsystem 11 and the output element 30, the corresponding target module selector 22 is triggered to establish a connection between the corresponding target module 12 and the corresponding target subsystem 11, and the group selector 23 is triggered to establish a connection between the corresponding target group 13 and the corresponding target module 12. The instruction can be sent to the corresponding selector through a debugging interface or a system bus.
The subsystem selector 21, the module selector 22 and the group selector 23 may be single-pole multi-throw (spdt) selection switches, and have substantially the same structure, and the subsystem selector 21 is taken as an example for description.
Fig. 4 is a schematic diagram of the internal structure of the subsystem selector 21. As shown in fig. 4, the subsystem selector 21 may include a fixed end 211, a plurality of movable ends 212, the fixed end 211 is fixedly connected to the output element 30, the plurality of movable ends 212 are fixedly connected to the plurality of subsystems 12, and the fixed end 211 is selectively connected to one of the movable ends 212 to establish a connection between the corresponding subsystem 11 and the output element 30.
The module selector 22 and the bank selector 23 have substantially the same structure as the subsystem selector 21. For example, a fixed end of the module selector 22 may be connected to the corresponding subsystem 11, and a plurality of movable ends of the module selector 22 may be respectively fixedly connected to the corresponding modules 12, and the fixed end may be selectively connected to one of the movable ends to establish a connection between the corresponding module 12 and the corresponding subsystem 11. For another example, the fixed end of the group selector 23 may be connected to the corresponding module 12, the plurality of active ends of the group selector 23 may be respectively fixedly connected to the corresponding groups 13, and the fixed end may be selectively connected to one of the active ends to establish a connection between the corresponding group 13 and the corresponding module 12.
The subsystem selector 21, the module selector 22, and the group selector 23 are all digitally controlled switches, and for example, the functions of a single-pole multi-throw switch are realized by transistors and other structures.
In some embodiments, the subsystem selector 21, the module selector 22 and the group selector 23 are all single-pole 256-throw switches, i.e., each includes a fixed end and 256 active ends, so that 256 × 256 signal groups are supported, and the output requirement of the signals inside the chip 1 is greatly satisfied.
As mentioned above, the output element 30 may be a pin of the chip 1, or may be a specific register in the chip 1, wherein the specific register may be a pre-designed register dedicated to temporarily store internal signals in the chip 1. When the output element 30 is a pin of the chip 1, the pin of the chip 1 may be connected to a logic analyzer or an oscilloscope, and the logic analyzer or the oscilloscope performs display output, and displays an internal signal of the chip 1 in a waveform manner, that is, displays a target group signal of the chip 1, so as to perform display in a more intuitive manner. Moreover, even if the target group signal is changed at a high speed, the change of the target group signal can be clearly and completely seen in an intuitive manner by displaying in a waveform manner.
That is, when the output element 30 is a pin of the chip 1, the "outputting the target group signal through the output element" in the step 202 may include: and the output element outputs the data to a logic analyzer or an oscilloscope, and the logic analyzer or the oscilloscope outputs the data for display.
When the output element 30 is a specific register in the chip 1, the target group signal can be output to the specific register, and then the electronic device is connected to the chip 1 through a debug interface (JTAG), and the target group signal is obtained from the specific register through the debug interface (JTAG), and then is displayed and output through a display screen of the electronic device. The electronic device may be an electronic device including the chip 1, or may be a device other than the electronic device including the chip 1.
That is, when the output element 30 is a specific register in the chip 1, the "outputting the target group signal through the output element" in the foregoing step 202 may include: and after the target group signals are transmitted to the output specific register, the target group signals are acquired from the specific register and are displayed and output.
Fig. 5 is a schematic diagram of an internal structure of a chip 1 according to some embodiments of the present application. As shown in fig. 5, the chip 1 further includes a microcontroller 40 in addition to the subsystems 11 and the modules 12 under the subsystems, the groups 13 under the modules 12, and the subsystem selector 21, the module selector 22, and the group selector 23. The microcontroller 40 is connected to all the subsystem selectors 21, the module selectors 22, and the bank selector 23. The microcontroller 40 is used to call program instructions to perform the steps of the method shown in fig. 2 described above. That is, in fig. 6, the microcontroller 40 included in the chip 1 is used to generate control instructions to control the subsystem selector 21, the module selector 22, and the bank selector 23.
For example, the microcontroller 40 is configured to obtain selector configuration information in response to an input operation; based on the selector configuration information, the subsystem selector 21 is controlled to select a target subsystem 11, the module selector 22 is controlled to select a target module 12, and the group selector 23 is controlled to select a target group 13, thereby establishing a signal path from the target group 13 to the target module 12, from the target module 12 to the target subsystem 11, and from the target subsystem 11 to an output element for outputting the target group signal via the output element.
The register of the chip 1 pre-stores a corresponding relationship between information of each group of signals and selector configuration information, the microcontroller 40 may specifically respond to the input operation to obtain target information of a target group of signals to be output, and determine the selector configuration information corresponding to the target information according to the corresponding relationship between the information of each group of signals and the selector configuration information to obtain the selector configuration information.
Wherein the selector configuration information comprises subsystem selector configuration information, module selector configuration information, and group selector configuration information. The subsystem selector configuration information defines the target subsystem 11 to which the subsystem selector needs to be connected, the module selector configuration information defines the identity of the module selector 22 and the target module 12 to which the module selector 22 needs to be connected, and the group selector configuration information defines the identity of the group selector 23 and the target group 13 to which the group selector 23 needs to be connected. The microcontroller 40 may specifically control the subsystem selector 21 to establish a connection between the target subsystem 11 and the output element 30 according to the subsystem selector configuration information in the selector configuration information, determine the target module selector 22 according to the identity of the module selector 22 defined by the module selector configuration information, control the target module selector 22 to establish a connection between the corresponding target module 12 and the corresponding target subsystem 11 according to the target module 12 to be connected, determine the target group selector 23 according to the identity of the group selector 23 defined by the group selector configuration information, and control the target group selector 23 to establish a connection between the corresponding target group 11 and the corresponding target module 12 according to the target group 13 to be connected.
The functions executed by the microcontroller 40 may correspond to the steps of the foregoing method, and further functions executed by the microcontroller 40 may refer to the specific implementation process described in the foregoing method embodiment, which is not described herein again.
The chip 1 may be a chip such as a processor.
Obviously, in other embodiments, the steps in the foregoing method may also be performed by other controllers located outside the chip 1 in the electronic device of the chip 1, or may be performed by controllers in other electronic devices that do not include the chip 1, and the foregoing instructions for controlling the subsystem selector 21, the module selector 22, and the group selector 23 may also be generated by other controllers located outside the chip 1 in the electronic device of the chip 1, or may be generated by controllers in other electronic devices that do not include the chip 1, or the like. Obviously, at this point, the chip 1 may not include the microcontroller 40.
Please refer to fig. 6, which is a block diagram of an electronic device 100 according to an embodiment of the present application. As shown in fig. 6, the electronic device 100 comprises the chip 1 described above. The electronic device 100 may include a handheld device such as a Mobile phone and a tablet computer, and may also include a vehicle-mounted device, a wearable device, a computing device or other processing device connected to a wireless modem, and various forms of User Equipment (UE), a Mobile Station (MS), a terminal device (terminal device), and the like.
In order to more clearly illustrate the present invention, the following description is based on some specific scenarios.
In some scenarios, a user may control display of a user interface for chip signal output control by selecting a menu option of the electronic device 100 or by clicking a specific application icon displayed by the electronic device 100, for an operation performed by the user at the user interface to input target information of a target group signal to be output. For example, as mentioned above, the target information of the target group signal may be a name or a code of the target group signal, in an embodiment, the user interface displayed by the electronic device 100 may include a pull-down menu, where the pull-down menu includes options of all group signals included in the chip 1 for the user to select the target group signal to be output, and since each group signal is displayed by a code or by a name, the user may select the target group signal to be output as desired and may input the target information including the corresponding code or name accordingly. In some embodiments, the user interface displayed by the electronic device 100 may also include an input box for the user to directly input the name or code of the target group signal to input the target information.
As mentioned above, since the corresponding relationship between the information of each group of signals and the selector configuration information is preset, the microcontroller 40 of the chip 1 may respond to the input operation to obtain the target information of the target group of signals to be output, determine the selector configuration information corresponding to the target information according to the corresponding relationship between the information of each group of signals and the selector configuration information to obtain the corresponding selector configuration information, and enable the subsystem selector 21 in the chip 1 to select a target subsystem 11, the module selector 22 to select a target module 12, and control the group selector 23 to select a target group 13, thereby establishing a signal channel from the target group 13 to the target module 12, to the target subsystem 11, and to an output element, so as to output the target group of signals through the output element.
As shown in fig. 6, the electronic device 100 may further include a display screen 2, and the aforementioned menu options, specific application icons, and a user interface for controlling chip signal output may be displayed on the display screen 2. When the output element 30 is a specific register in the chip 1, the other processing chips of the electronic device 100 may obtain the target group signal from the output element 30 that is the specific register and control the display screen 2 displayed on the electronic device 100, so that, in some scenarios, the target group signal may be displayed on the display screen 2 of the electronic device 100.
When the output element 30 is a pin in the chip 1, a part of signals may not be readable due to a failure of the chip 1, at this time, the rear cover of the electronic device 100 may be detached to expose the chip 1 and the pin of the chip 1, the pin of the chip 1 may be connected to a logic analyzer or an oscilloscope, and the internal signal of the chip 1, that is, the target group signal of the chip 1, is displayed in a waveform manner by performing display output through the logic analyzer or the oscilloscope, so that display is performed in a more intuitive manner.
In some scenarios, when the back cover of the electronic device 100 is disassembled to expose the chip 1, other electronic devices may also be connected to the chip 1 through a debug interface (JTAG), so as to obtain the target group signal from a specific register of the chip 1, and control the display screen 2 displayed on the other electronic devices.
Therefore, according to the output control method of the internal signal of the chip, the chip and the electronic device provided by the application, the specific signal in the chip can be controlled to be output according to the requirement, and the output and acquisition requirements of the internal signal of the chip are met.
The foregoing embodiments mainly describe the solution of the embodiments of the present application in terms of a hardware framework from a method side execution process. It is understood that the electronic device comprises corresponding hardware structures and/or software modules for performing the respective functions in order to realize the above-mentioned functions. Those of skill in the art would readily appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiment of the present application, the electronic device may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
Embodiments of the present application also provide a computer storage medium, where the computer storage medium stores a computer program for electronic data exchange, the computer program enabling a computer to execute part or all of the steps of any one of the methods described in the above method embodiments, and the computer includes an electronic device.
Embodiments of the present application also provide a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods as described in the above method embodiments. The computer program product may be a software installation package, the computer comprising an electronic device.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core concept of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A method of controlling output of an internal signal of a chip, the method being for controlling output of the internal signal in a chip, the chip comprising a plurality of subsystems, each subsystem comprising a plurality of modules, each module comprising a plurality of groups, the chip and comprising a subsystem selector for selecting between the plurality of subsystems, a module selector for selecting between the plurality of modules, and a group selector for selecting between the plurality of groups; the method comprises the following steps:
responding to an input operation to obtain selector configuration information;
in accordance with the selector configuration information, control the subsystem selector to select a target subsystem, control the module selector to select a target module, and control the group selector to select a target group, thereby establishing a signal path from the target group to the target module, from the target module to the target subsystem, and from the target subsystem to an output element for outputting the target group signal through the output element.
2. The method of claim 1, wherein the input operation is an input operation performed through a user interface displayed on an electronic device for inputting target information of a target group signal to be output, and the obtaining a selector configuration information in response to an input operation includes:
responding to the input operation, and acquiring target information of a target group signal needing to be output;
and determining selector configuration information corresponding to the target information according to the corresponding relation between the information of each group of signals and the selector configuration information to obtain the selector configuration information.
3. The method of claim 1, wherein the subsystem selector is connected between the output element and a plurality of subsystems for selecting a subsystem to be connected to the output element; the number of the module selectors is multiple, the number of the module selectors corresponds to the number of all the subsystems, and each module selector is connected between a corresponding subsystem and a plurality of modules and used for selecting one module to be connected to the corresponding subsystem; the number of the group selectors is multiple, the number of the group selectors corresponds to the number of all the modules, and each group selector is connected between a corresponding module and a plurality of groups and used for selecting one group to be connected to the corresponding module;
the controlling the subsystem selector to select a target subsystem, the module selector to select a target module, and the group selector to select a target group, comprising: control the subsystem selector to select the target subsystem to connect to the output element, control a module selector connected to the target subsystem to select the target module to connect to the target subsystem, and control a group selector connected to the target module to select the target group to connect to the target module.
4. The method of claim 3, wherein the selector configuration information includes subsystem selector configuration information, module selector configuration information, and group selector configuration information, the subsystem selector configuration information defining a target subsystem to which a subsystem selector needs to be connected, the module selector configuration information defining an identity of a module selector and a target module to which a module selector needs to be connected, the group selector configuration information defining an identity of a group selector and a target group to which the group selector needs to be connected, controlling the subsystem selector to select a target subsystem, controlling the module selector to select a target module, and controlling the group selector to select a target group based on the selector configuration information, further comprising:
controlling the subsystem selector to establish a connection between a target subsystem and the output element according to subsystem selector configuration information in the selector configuration information;
determining a target module selector according to the identity of the module selector defined by the configuration information of the module selector, and controlling the target module selector to establish the connection between the corresponding target module and the corresponding target subsystem according to the target module to be connected; and
determining a target group selector according to the identity of the group selector defined by the group selector configuration information, and controlling the target group selector to establish a connection between a corresponding target group and a corresponding target module according to the target group to be connected, wherein the target module is a module under the target subsystem, and the target group is a group under the target module.
5. The method of any of claims 1-4, wherein the output element is a pin of the chip, and wherein outputting the target set of signals via the output element comprises:
and the output element outputs the data to a logic analyzer or an oscilloscope, and the logic analyzer or the oscilloscope outputs the data for display.
6. The method of any of claims 1-4, wherein the output element is a specific register in the chip, and wherein outputting the target set of signals through the output element comprises:
and after the target group signal is transmitted to the specific register, an electronic device acquires the target group signal from the specific register and performs display output, wherein the electronic device is an electronic device comprising the chip or other devices except the electronic device comprising the chip.
7. A chip, wherein the chip comprises:
a plurality of subsystems, each subsystem comprising a plurality of modules, each module comprising a plurality of groups;
wherein the chip further comprises a subsystem selector for selecting a target subsystem among the plurality of subsystems, a module selector for selecting a target module among the plurality of modules, and a group selector for selecting a target group among the plurality of groups, thereby establishing a signal path from the target group to the target module, from the target module to the target subsystem, and from the target subsystem to an output element for outputting the target group signal through the output element.
8. The chip of claim 7, wherein the subsystem selector is coupled between the output element and a plurality of subsystems for selecting the target subsystem to be coupled to the output element; the number of the module selectors is multiple, the number of the module selectors corresponds to the number of all the subsystems, each module selector is connected between a corresponding subsystem and the multiple modules, and the module selector connected with the target subsystem is used for selecting the target module to be connected to the corresponding target subsystem; the number of the group selectors is multiple and corresponds to the number of all the modules, each group selector is connected between a corresponding module and a plurality of groups, and the group selector connected with the target module is used for selecting to connect the target group to the target module.
9. The chip of claim 8, wherein the subsystem selector, module selector, and bank selector are single-pole, multi-throw switches.
10. An electronic device, characterized in that the electronic device comprises a chip according to any of claims 7-9.
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| CN202111147133.8A CN113918219A (en) | 2021-09-28 | 2021-09-28 | Chip internal signal output control method, chip and electronic equipment |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114880260A (en) * | 2022-04-30 | 2022-08-09 | 苏州浪潮智能科技有限公司 | VGA port selection method, device, equipment and medium |
| WO2023184842A1 (en) * | 2022-03-31 | 2023-10-05 | 苏州浪潮智能科技有限公司 | Chip internal signal coding method and system, and electronic device |
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- 2021-09-28 CN CN202111147133.8A patent/CN113918219A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023184842A1 (en) * | 2022-03-31 | 2023-10-05 | 苏州浪潮智能科技有限公司 | Chip internal signal coding method and system, and electronic device |
| CN114880260A (en) * | 2022-04-30 | 2022-08-09 | 苏州浪潮智能科技有限公司 | VGA port selection method, device, equipment and medium |
| CN114880260B (en) * | 2022-04-30 | 2023-08-18 | 苏州浪潮智能科技有限公司 | VGA port selection method, device, equipment and medium |
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