CN104126282A - 用于时钟和数据恢复(cdr)电路的可复位压控振荡器(vco)以及相关系统和方法 - Google Patents
用于时钟和数据恢复(cdr)电路的可复位压控振荡器(vco)以及相关系统和方法 Download PDFInfo
- Publication number
- CN104126282A CN104126282A CN201380009427.1A CN201380009427A CN104126282A CN 104126282 A CN104126282 A CN 104126282A CN 201380009427 A CN201380009427 A CN 201380009427A CN 104126282 A CN104126282 A CN 104126282A
- Authority
- CN
- China
- Prior art keywords
- clock
- phase
- output
- data stream
- phase control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
- H03K3/0322—Ring oscillators with differential cells
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201261599692P | 2012-02-16 | 2012-02-16 | |
| US61/599,692 | 2012-02-16 | ||
| US13/465,057 | 2012-05-07 | ||
| US13/465,057 US20130216003A1 (en) | 2012-02-16 | 2012-05-07 | RESETTABLE VOLTAGE CONTROLLED OSCILLATORS (VCOs) FOR CLOCK AND DATA RECOVERY (CDR) CIRCUITS, AND RELATED SYSTEMS AND METHODS |
| PCT/US2013/026488 WO2013123427A1 (en) | 2012-02-16 | 2013-02-15 | RESETTABLE VOLTAGE CONTROLLED OSCILLATORS (VCOs) FOR CLOCK AND DATA RECOVERY (CDR) CIRCUITS, AND RELATED SYSTEMS AND METHODS |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104126282A true CN104126282A (zh) | 2014-10-29 |
Family
ID=48982255
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380009427.1A Pending CN104126282A (zh) | 2012-02-16 | 2013-02-15 | 用于时钟和数据恢复(cdr)电路的可复位压控振荡器(vco)以及相关系统和方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20130216003A1 (enExample) |
| EP (1) | EP2815533A1 (enExample) |
| JP (1) | JP2015508262A (enExample) |
| KR (1) | KR20140125430A (enExample) |
| CN (1) | CN104126282A (enExample) |
| WO (1) | WO2013123427A1 (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107925563A (zh) * | 2015-09-01 | 2018-04-17 | 高通股份有限公司 | 用于3相接口的多相时钟数据恢复 |
| CN107925560A (zh) * | 2015-07-09 | 2018-04-17 | 赛灵思公司 | 基于相位内插器的收发系统中的时钟数据恢复(cdr)相位步移方案 |
| CN110635805A (zh) * | 2018-06-21 | 2019-12-31 | 三星显示有限公司 | 用于提供时序恢复的装置和方法 |
| CN112751660A (zh) * | 2015-09-01 | 2021-05-04 | 高通股份有限公司 | 用于多相时钟数据恢复电路校准的方法和装置 |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2508417B (en) * | 2012-11-30 | 2017-02-08 | Toshiba Res Europe Ltd | A speech processing system |
| JP6032082B2 (ja) * | 2013-03-25 | 2016-11-24 | 富士通株式会社 | 受信回路及び半導体集積回路 |
| US9432178B2 (en) | 2014-03-24 | 2016-08-30 | Mediatek Inc. | Clock and data recovery circuit using an injection locked oscillator |
| JP6512011B2 (ja) * | 2015-07-22 | 2019-05-15 | 富士通株式会社 | 受信回路 |
| JP6839354B2 (ja) * | 2017-02-03 | 2021-03-10 | 富士通株式会社 | Cdr回路及び受信回路 |
| US11095426B1 (en) * | 2018-04-05 | 2021-08-17 | Marvell Asia Pte, Ltd. | Method and apparatus for clock recovery |
| US10862666B2 (en) * | 2019-01-14 | 2020-12-08 | Texas Instruments Incorporated | Sampling point identification for low frequency asynchronous data capture |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1092577A (zh) * | 1992-11-25 | 1994-09-21 | 日本电气株式会社 | 时钟恢复电路 |
| US5920600A (en) * | 1995-09-18 | 1999-07-06 | Oki Electric Industry Co., Ltd. | Bit phase synchronizing circuitry for controlling phase and frequency, and PLL circuit therefor |
| US6166572A (en) * | 1997-06-13 | 2000-12-26 | Oki Electric Industry Co., Ltd. | Voltage-controlled delay line, direct phase controlled voltage-controlled oscillator, clock/data recovery circuit, and clock/data recovery apparatus |
| CN1622466A (zh) * | 2003-10-07 | 2005-06-01 | 三星电子株式会社 | 具有锁相检测功能的锁相环电路及其检测锁相的方法 |
| CN1913359A (zh) * | 2005-08-11 | 2007-02-14 | 三星电子株式会社 | 具有低时钟频率的时钟数据恢复装置及方法 |
| CN101227169A (zh) * | 2007-01-04 | 2008-07-23 | 国际商业机器公司 | 压控振荡器电路及其操作方法 |
| CN101247215A (zh) * | 2008-03-24 | 2008-08-20 | 无锡圆芯微电子有限公司 | 非线性时钟与数据恢复电路动态捕捉与跟踪范围的扩展技术 |
| CN101867368A (zh) * | 2009-04-20 | 2010-10-20 | 索尼公司 | 时钟数据恢复电路和倍频时钟生成电路 |
| CN101908884A (zh) * | 2009-06-02 | 2010-12-08 | 索尼公司 | 时钟再生装置和电子设备 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5347234A (en) * | 1993-03-26 | 1994-09-13 | International Business Machines Corp. | Digital voltage controlled oscillator |
| JP3346445B2 (ja) * | 1995-06-29 | 2002-11-18 | 日本電信電話株式会社 | 識別・タイミング抽出回路 |
| KR100250433B1 (ko) * | 1997-12-26 | 2000-04-01 | 서정욱 | 배열 안테나를 갖는 대역 확산 코드분할 다중접속 시스템을 위한 이차원 복조기의 구조 |
| US6407682B1 (en) * | 2000-06-30 | 2002-06-18 | Intel Corporation | High speed serial-deserializer receiver |
| TWI242929B (en) * | 2004-12-01 | 2005-11-01 | Ind Tech Res Inst | Clock and data recovery apparatus and method thereof |
| TWI300293B (en) * | 2005-10-07 | 2008-08-21 | Ind Tech Res Inst | Clock generator and data recovery circuit utilizing the same |
| US8379738B2 (en) * | 2007-03-16 | 2013-02-19 | Samsung Electronics Co., Ltd. | Methods and apparatus to improve performance and enable fast decoding of transmissions with multiple code blocks |
| JP2010288257A (ja) * | 2009-05-14 | 2010-12-24 | Nippon Telegr & Teleph Corp <Ntt> | クロックデータ再生回路 |
| US8559582B2 (en) * | 2010-09-13 | 2013-10-15 | Altera Corporation | Techniques for varying a periodic signal based on changes in a data rate |
| US8649444B2 (en) * | 2011-11-15 | 2014-02-11 | Aclara Power-Line Systems Inc. | TWACS pulse inductor reversal circuit |
| US8839020B2 (en) * | 2012-01-24 | 2014-09-16 | Qualcomm Incorporated | Dual mode clock/data recovery circuit |
| US9077349B2 (en) * | 2012-02-21 | 2015-07-07 | Qualcomm Incorporated | Automatic detection and compensation of frequency offset in point-to-point communication |
-
2012
- 2012-05-07 US US13/465,057 patent/US20130216003A1/en not_active Abandoned
-
2013
- 2013-02-15 CN CN201380009427.1A patent/CN104126282A/zh active Pending
- 2013-02-15 JP JP2014557845A patent/JP2015508262A/ja not_active Ceased
- 2013-02-15 KR KR1020147025531A patent/KR20140125430A/ko not_active Withdrawn
- 2013-02-15 WO PCT/US2013/026488 patent/WO2013123427A1/en not_active Ceased
- 2013-02-15 EP EP13710127.5A patent/EP2815533A1/en not_active Withdrawn
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1092577A (zh) * | 1992-11-25 | 1994-09-21 | 日本电气株式会社 | 时钟恢复电路 |
| US5920600A (en) * | 1995-09-18 | 1999-07-06 | Oki Electric Industry Co., Ltd. | Bit phase synchronizing circuitry for controlling phase and frequency, and PLL circuit therefor |
| US6166572A (en) * | 1997-06-13 | 2000-12-26 | Oki Electric Industry Co., Ltd. | Voltage-controlled delay line, direct phase controlled voltage-controlled oscillator, clock/data recovery circuit, and clock/data recovery apparatus |
| CN1622466A (zh) * | 2003-10-07 | 2005-06-01 | 三星电子株式会社 | 具有锁相检测功能的锁相环电路及其检测锁相的方法 |
| CN1913359A (zh) * | 2005-08-11 | 2007-02-14 | 三星电子株式会社 | 具有低时钟频率的时钟数据恢复装置及方法 |
| CN101227169A (zh) * | 2007-01-04 | 2008-07-23 | 国际商业机器公司 | 压控振荡器电路及其操作方法 |
| CN101247215A (zh) * | 2008-03-24 | 2008-08-20 | 无锡圆芯微电子有限公司 | 非线性时钟与数据恢复电路动态捕捉与跟踪范围的扩展技术 |
| CN101867368A (zh) * | 2009-04-20 | 2010-10-20 | 索尼公司 | 时钟数据恢复电路和倍频时钟生成电路 |
| CN101908884A (zh) * | 2009-06-02 | 2010-12-08 | 索尼公司 | 时钟再生装置和电子设备 |
Non-Patent Citations (1)
| Title |
|---|
| PYUNG-SU HAN,WOO-YOUNG CHOI: "1.25/2.5-Gb/s Burst-Mode Clock Recovery Circuit with a Novel Dual Bit-Rate Structure in 0.18-um CMOS", 《IEEE》 * |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107925560A (zh) * | 2015-07-09 | 2018-04-17 | 赛灵思公司 | 基于相位内插器的收发系统中的时钟数据恢复(cdr)相位步移方案 |
| CN107925560B (zh) * | 2015-07-09 | 2021-01-26 | 赛灵思公司 | 基于相位内插器的收发系统中的时钟数据恢复(cdr)相位步移方案 |
| CN107925563A (zh) * | 2015-09-01 | 2018-04-17 | 高通股份有限公司 | 用于3相接口的多相时钟数据恢复 |
| CN107925563B (zh) * | 2015-09-01 | 2020-12-08 | 高通股份有限公司 | 用于3相接口的多相时钟数据恢复的方法和装置 |
| CN112751660A (zh) * | 2015-09-01 | 2021-05-04 | 高通股份有限公司 | 用于多相时钟数据恢复电路校准的方法和装置 |
| CN112751660B (zh) * | 2015-09-01 | 2024-03-08 | 高通股份有限公司 | 用于多相时钟数据恢复电路校准的方法和装置 |
| CN110635805A (zh) * | 2018-06-21 | 2019-12-31 | 三星显示有限公司 | 用于提供时序恢复的装置和方法 |
| CN110635805B (zh) * | 2018-06-21 | 2024-05-24 | 三星显示有限公司 | 用于提供时序恢复的装置和方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2013123427A1 (en) | 2013-08-22 |
| US20130216003A1 (en) | 2013-08-22 |
| KR20140125430A (ko) | 2014-10-28 |
| EP2815533A1 (en) | 2014-12-24 |
| JP2015508262A (ja) | 2015-03-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104126282A (zh) | 用于时钟和数据恢复(cdr)电路的可复位压控振荡器(vco)以及相关系统和方法 | |
| US11374558B2 (en) | Measurement and correction of multiphase clock duty cycle and skew | |
| US10840920B2 (en) | Method and apparatus for source-synchronous signaling | |
| US9049001B2 (en) | Apparatus, system, and method for timing recovery | |
| US9036755B2 (en) | Circuits and methods for time-average frequency based clock data recovery | |
| US11973856B2 (en) | Drive and data transmission method | |
| US7482841B1 (en) | Differential bang-bang phase detector (BBPD) with latency reduction | |
| JP5452767B2 (ja) | デューティサイクルのバランスがとれたレベルシフタ | |
| US11853115B1 (en) | Low-latency retimer with seamless clock switchover | |
| US10419204B2 (en) | Serializer-deserializer with frequency doubler | |
| US20200259630A1 (en) | Phase detector, phase synchronization circuit, and method of controlling phase synchronization circuit | |
| Kim et al. | An input data and power noise inducing clock jitter tolerant reference-less digital CDR for LCD intra-panel interface | |
| CN104682954B (zh) | 一种半速率随机数据相位检测电路 | |
| US10250267B2 (en) | Differential phase-frequency detector | |
| JP2004356701A (ja) | ハーフレートcdr回路 | |
| KR102265187B1 (ko) | 클럭 복구 회로 | |
| CN1741387B (zh) | 锁存反向电路与使用其的触发器与双锁存数据触发器 | |
| CN120785322A (zh) | 时钟信号分配电路以及操作该时钟信号分配电路的方法 | |
| TW202541437A (zh) | 時脈訊號分配電路及電子裝置 | |
| KR20250149093A (ko) | 클록 신호 분배 회로 및 이의 동작 방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| AD01 | Patent right deemed abandoned |
Effective date of abandoning: 20180302 |
|
| AD01 | Patent right deemed abandoned |